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authorEric Miao <eric.y.miao@gmail.com>2007-06-06 05:22:20 (GMT)
committerRussell King <rmk+kernel@arm.linux.org.uk>2007-07-12 13:28:09 (GMT)
commit486c955118dbbb0f13dc4d40cc5dac2b23f82676 (patch)
treea38ba53eb3d924e34c312ec6e2eaa1d491a82446 /arch
parent88dfe98c688e1700a4a9f73f8b7d570f4f52170d (diff)
downloadlinux-fsl-qoriq-486c955118dbbb0f13dc4d40cc5dac2b23f82676.tar.xz
[ARM] 4434/1: PXA: remove PXA_IRQ_SKIP
1. PXA_IRQ_SKIP is defined to be 7 on PXA25x so that the first IRQ starts from zero. This makes IRQ numbering inconsistent between PXA25x and PXA27x. Remove this macro so that the same IRQ_XXXXX definition has the same value on both PXA25x and PXA27x. 2. make IRQ_SSP3..IRQ_PWRI2C valid only if PXA27x is defined, this avoids unintentional use of these macros on PXA25x Signed-off-by: eric miao <eric.miao@marvell.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch')
-rw-r--r--arch/arm/mach-pxa/irq.c10
1 files changed, 5 insertions, 5 deletions
diff --git a/arch/arm/mach-pxa/irq.c b/arch/arm/mach-pxa/irq.c
index 4619d5f..45ce711 100644
--- a/arch/arm/mach-pxa/irq.c
+++ b/arch/arm/mach-pxa/irq.c
@@ -30,12 +30,12 @@
static void pxa_mask_low_irq(unsigned int irq)
{
- ICMR &= ~(1 << (irq + PXA_IRQ_SKIP));
+ ICMR &= ~(1 << irq);
}
static void pxa_unmask_low_irq(unsigned int irq)
{
- ICMR |= (1 << (irq + PXA_IRQ_SKIP));
+ ICMR |= (1 << irq);
}
static int pxa_set_wake(unsigned int irq, unsigned int on)
@@ -75,12 +75,12 @@ static struct irq_chip pxa_internal_chip_low = {
static void pxa_mask_high_irq(unsigned int irq)
{
- ICMR2 &= ~(1 << (irq - 32 + PXA_IRQ_SKIP));
+ ICMR2 &= ~(1 << (irq - 32));
}
static void pxa_unmask_high_irq(unsigned int irq)
{
- ICMR2 |= (1 << (irq - 32 + PXA_IRQ_SKIP));
+ ICMR2 |= (1 << (irq - 32));
}
static struct irq_chip pxa_internal_chip_high = {
@@ -351,7 +351,7 @@ void __init pxa_init_irq(void)
/* GPIO 0 and 1 must have their mask bit always set */
GPIO_IRQ_mask[0] = 3;
- for (irq = PXA_IRQ(PXA_IRQ_SKIP); irq <= PXA_IRQ(31); irq++) {
+ for (irq = PXA_IRQ(0); irq <= PXA_IRQ(31); irq++) {
set_irq_chip(irq, &pxa_internal_chip_low);
set_irq_handler(irq, handle_level_irq);
set_irq_flags(irq, IRQF_VALID);