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authorRoland Scheidegger <rscheidegger_lists@hispeed.ch>2006-08-30 22:17:55 (GMT)
committerLinus Torvalds <torvalds@g5.osdl.org>2006-08-30 23:06:14 (GMT)
commit18f2905fcec3e06deafd25a02e37eabaaaaef744 (patch)
tree4d5b14ddd63782e46056892a8b3c644f03a38842 /drivers/char
parenta7dec1e0dbb9e8e032b56a62d07ab6ac009109d3 (diff)
downloadlinux-fsl-qoriq-18f2905fcec3e06deafd25a02e37eabaaaaef744.tar.xz
[PATCH] drm: radeon flush TCL VAP for vertex program enable/disable
The radeon requires a VAP state flush when enabling/disabling vertex programs on the r200 cards. Signed-off-by: Dave Airlie <airlied@linux.ie> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
Diffstat (limited to 'drivers/char')
-rw-r--r--drivers/char/drm/radeon_state.c9
1 files changed, 8 insertions, 1 deletions
diff --git a/drivers/char/drm/radeon_state.c b/drivers/char/drm/radeon_state.c
index 5bb2234..39a7f68 100644
--- a/drivers/char/drm/radeon_state.c
+++ b/drivers/char/drm/radeon_state.c
@@ -175,6 +175,14 @@ static __inline__ int radeon_check_and_fixup_packets(drm_radeon_private_t *
}
break;
+ case R200_EMIT_VAP_CTL:{
+ RING_LOCALS;
+ BEGIN_RING(2);
+ OUT_RING_REG(RADEON_SE_TCL_STATE_FLUSH, 0);
+ ADVANCE_RING();
+ }
+ break;
+
case RADEON_EMIT_RB3D_COLORPITCH:
case RADEON_EMIT_RE_LINE_PATTERN:
case RADEON_EMIT_SE_LINE_WIDTH:
@@ -202,7 +210,6 @@ static __inline__ int radeon_check_and_fixup_packets(drm_radeon_private_t *
case R200_EMIT_TCL_LIGHT_MODEL_CTL_0:
case R200_EMIT_TFACTOR_0:
case R200_EMIT_VTX_FMT_0:
- case R200_EMIT_VAP_CTL:
case R200_EMIT_MATRIX_SELECT_0:
case R200_EMIT_TEX_PROC_CTL_2:
case R200_EMIT_TCL_UCP_VERT_BLEND_CTL: