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authorStephen Hemminger <shemminger@osdl.org>2006-12-05 01:08:19 (GMT)
committerJeff Garzik <jeff@garzik.org>2006-12-07 09:58:33 (GMT)
commitc3905bc4b71ab562acf69765e8c4778bd263b9db (patch)
tree95010fa74bf41e03efa907589d740416838af2b5 /drivers/net/sky2.c
parent6771290102c4703dae56bc3e121deb63530e206c (diff)
downloadlinux-fsl-qoriq-c3905bc4b71ab562acf69765e8c4778bd263b9db.tar.xz
[PATCH] sky2: receive queue watermark tweak
This patch makes the receive performance on some systems go from 714MB/s to 941MB/s. It adjusts the watermark of the receive queue to be lower, thereby avoiding excess hardware flow control. This is most important on the systems which have little/no additional buffering. Signed-off-by: Stephen Hemminger <shemminger@osdl.org> Signed-off-by: Jeff Garzik <jeff@garzik.org>
Diffstat (limited to 'drivers/net/sky2.c')
-rw-r--r--drivers/net/sky2.c11
1 files changed, 8 insertions, 3 deletions
diff --git a/drivers/net/sky2.c b/drivers/net/sky2.c
index b9f7eb5..a8e0963 100644
--- a/drivers/net/sky2.c
+++ b/drivers/net/sky2.c
@@ -1062,11 +1062,16 @@ static int sky2_rx_start(struct sky2_port *sky2)
sky2->rx_put = sky2->rx_next = 0;
sky2_qset(hw, rxq);
+ /* On PCI express lowering the watermark gives better performance */
+ if (pci_find_capability(hw->pdev, PCI_CAP_ID_EXP))
+ sky2_write32(hw, Q_ADDR(rxq, Q_WM), BMU_WM_PEX);
+
+ /* These chips have no ram buffer?
+ * MAC Rx RAM Read is controlled by hardware */
if (hw->chip_id == CHIP_ID_YUKON_EC_U &&
- (hw->chip_rev == CHIP_REV_YU_EC_U_A1 || hw->chip_rev == CHIP_REV_YU_EC_U_B0)) {
- /* MAC Rx RAM Read is controlled by hardware */
+ (hw->chip_rev == CHIP_REV_YU_EC_U_A1
+ || hw->chip_rev == CHIP_REV_YU_EC_U_B0))
sky2_write32(hw, Q_ADDR(rxq, Q_F), F_M_RX_RAM_DIS);
- }
sky2_prefetch_init(hw, rxq, sky2->rx_le_map, RX_LE_SIZE - 1);