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authorVaibhav Hiremath <hvaibhav@ti.com>2012-06-18 06:47:25 (GMT)
committerPaul Walmsley <paul@pwsan.com>2012-06-18 06:47:25 (GMT)
commit2e113c648dc29c3d8418fe277917b04397375939 (patch)
treed3b7f3d9fd5d15806f412c2fc3cee78b1a54b319 /kernel/pid_namespace.c
parent08f3098928c991560408e8c71d4af8b1a3ff2d67 (diff)
downloadlinux-fsl-qoriq-2e113c648dc29c3d8418fe277917b04397375939.tar.xz
ARM: OMAP2+: control: Add AM33XX control reg & sec clkctrl offset
Define AM33XX control register, in order to allow access to control register address space, also add CONTROL_SEC_CLK_CTRL register offset; both are required in clock tree data, for wdt0 and timer0 clock source select configuration. CONTROL.SEC_CLK_CTRL register is provided to select/configure clock input for WDT0 and TIMER0. Signed-off-by: Vaibhav Hiremath <hvaibhav@ti.com> Cc: Paul Walmsley <paul@pwsan.com> Cc: Tony Lindgren <tony@atomide.com> [paul@pwsan.com: added include of plat/am33xx.h to fix build break; added AM33XX_CONTROL_STATUS bitfields that will be needed for the clock tree; fixed some control.h whitespace problems while here] Signed-off-by: Paul Walmsley <paul@pwsan.com>
Diffstat (limited to 'kernel/pid_namespace.c')
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