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-rw-r--r--Documentation/devicetree/bindings/i2c/ina2xx.txt22
-rw-r--r--Documentation/devicetree/bindings/mmc/fsl-esdhc.txt4
-rw-r--r--Documentation/devicetree/bindings/net/fsl-tsec-phy.txt12
-rw-r--r--Documentation/devicetree/bindings/powerpc/fsl/board.txt18
-rw-r--r--Documentation/devicetree/bindings/powerpc/fsl/cpm_qe/qe/ucc.txt43
-rw-r--r--Documentation/devicetree/bindings/powerpc/fsl/fman_chosen_node_device_tree.txt183
-rwxr-xr-xDocumentation/devicetree/bindings/powerpc/fsl/fman_device_tree.txt712
-rw-r--r--Documentation/devicetree/bindings/powerpc/fsl/fsl-dce.txt66
-rw-r--r--Documentation/devicetree/bindings/powerpc/fsl/pmc.txt59
-rw-r--r--Documentation/devicetree/bindings/powerpc/fsl/rman.txt178
-rw-r--r--Documentation/devicetree/bindings/tdm/fsl-tdm.txt65
-rw-r--r--Documentation/devicetree/bindings/tdm/pq-mds-t1.txt63
12 files changed, 1398 insertions, 27 deletions
diff --git a/Documentation/devicetree/bindings/i2c/ina2xx.txt b/Documentation/devicetree/bindings/i2c/ina2xx.txt
new file mode 100644
index 0000000..a2ad85d
--- /dev/null
+++ b/Documentation/devicetree/bindings/i2c/ina2xx.txt
@@ -0,0 +1,22 @@
+ina2xx properties
+
+Required properties:
+- compatible: Must be one of the following:
+ - "ti,ina219" for ina219
+ - "ti,ina220" for ina220
+ - "ti,ina226" for ina226
+ - "ti,ina230" for ina230
+- reg: I2C address
+
+Optional properties:
+
+- shunt-resistor
+ Shunt resistor value in micro-Ohm
+
+Example:
+
+ina220@44 {
+ compatible = "ti,ina220";
+ reg = <0x44>;
+ shunt-resistor = <1000>;
+};
diff --git a/Documentation/devicetree/bindings/mmc/fsl-esdhc.txt b/Documentation/devicetree/bindings/mmc/fsl-esdhc.txt
index bd9be0b..b7943f3 100644
--- a/Documentation/devicetree/bindings/mmc/fsl-esdhc.txt
+++ b/Documentation/devicetree/bindings/mmc/fsl-esdhc.txt
@@ -19,6 +19,9 @@ Optional properties:
"bus-width = <1>" property.
- sdhci,auto-cmd12: specifies that a controller can only handle auto
CMD12.
+ - voltage-ranges : two cells are required, first cell specifies minimum
+ slot voltage (mV), second cell specifies maximum slot voltage (mV).
+ Several ranges could be specified.
Example:
@@ -29,4 +32,5 @@ sdhci@2e000 {
interrupt-parent = <&ipic>;
/* Filled in by U-Boot */
clock-frequency = <0>;
+ voltage-ranges = <3300 3300>;
};
diff --git a/Documentation/devicetree/bindings/net/fsl-tsec-phy.txt b/Documentation/devicetree/bindings/net/fsl-tsec-phy.txt
index 2c6be03..7d61c7e 100644
--- a/Documentation/devicetree/bindings/net/fsl-tsec-phy.txt
+++ b/Documentation/devicetree/bindings/net/fsl-tsec-phy.txt
@@ -92,6 +92,16 @@ Clock Properties:
- fsl,tmr-fiper1 Fixed interval period pulse generator.
- fsl,tmr-fiper2 Fixed interval period pulse generator.
- fsl,max-adj Maximum frequency adjustment in parts per billion.
+ - fsl,clock-source-select Value type: <u32>,
+ select 1588 Timer reference clock source.
+ 0. External high precision timer reference
+ clock (TSEC_1588_CLK_IN)
+ 1. eTSEC system clock
+ 2. eTSEC1 transmit clock
+ 3. RTC clock input.
+ - fsl,ts-to-buffer Value type <none>, if present, indicates that TSEC
+ has ability to write time stamp of the transmitted
+ frame to memory in the padding.
These properties set the operational parameters for the PTP
clock. You must choose these carefully for the clock to work right.
@@ -127,4 +137,6 @@ Example:
fsl,tmr-fiper1 = <0x3B9AC9F6>;
fsl,tmr-fiper2 = <0x00018696>;
fsl,max-adj = <659999998>;
+ fsl,clock-source-select = <1>;
+ fsl,ts-to-buffer;
};
diff --git a/Documentation/devicetree/bindings/powerpc/fsl/board.txt b/Documentation/devicetree/bindings/powerpc/fsl/board.txt
index 380914e..ecc2e52 100644
--- a/Documentation/devicetree/bindings/powerpc/fsl/board.txt
+++ b/Documentation/devicetree/bindings/powerpc/fsl/board.txt
@@ -67,3 +67,21 @@ Example:
gpio-controller;
};
};
+
+* Freescale on-board FPGA connected on I2C bus
+
+Some Freescale boards like BSC9132QDS have on board FPGA connected on
+the i2c bus.
+
+Required properties:
+- compatible: Should be a board-specific string followed by a string
+ indicating the type of FPGA. Example:
+ "fsl,<board>-fpga", "fsl,fpga-qixis-i2c"
+- reg: Should contain the address of the FPGA
+
+Example:
+ fpga: fpga@66 {
+ compatible = "fsl,bsc9132qds-fpga", "fsl,fpga-qixis-i2c";
+ reg = <0x66>;
+ };
+
diff --git a/Documentation/devicetree/bindings/powerpc/fsl/cpm_qe/qe/ucc.txt b/Documentation/devicetree/bindings/powerpc/fsl/cpm_qe/qe/ucc.txt
index e47734b..b1b569f 100644
--- a/Documentation/devicetree/bindings/powerpc/fsl/cpm_qe/qe/ucc.txt
+++ b/Documentation/devicetree/bindings/powerpc/fsl/cpm_qe/qe/ucc.txt
@@ -2,8 +2,9 @@
Required properties:
- device_type : should be "network", "hldc", "uart", "transparent"
- "bisync", "atm", or "serial".
-- compatible : could be "ucc_geth" or "fsl_atm" and so on.
+ "bisync", "atm", "tdm" or "serial".
+- compatible : Describes the specific device attached to the UCC.
+ Examples include "ucc_geth", "fsl_atm", "ucc_uart" and "fsl,ucc-tdm".
- cell-index : the ucc number(1-8), corresponding to UCCx in UM.
- reg : Offset and length of the register set for the device
- interrupts : <a b> where a is the interrupt number and b is a
@@ -53,6 +54,24 @@ Recommended properties:
Delay), "rgmii-txid" (delay on TX only), "rgmii-rxid" (delay on RX only),
"tbi", or "rtbi".
+Required properties for fsl, ucc-tdm, compatible:
+- fsl,rx-sync-clock, fsl,tx-sync-clock: the TDM sync clock source for
+ receive/transmit
+ "none": clock source is disabled
+ "rsync_pin" : clock source is TDM_A1 RSYNC pin
+ "brg9" through "brg15" : clock source is BRG9-BRG15, respectively
+- fsl,tdm-tx-timeslot, fsl,tdm-rx-timeslot: time slot mask for transmit/receive
+ Each bit (LSB first) corresponds to a time slot. The time slot is enabled
+ if the bit is set
+- fsl,tdm-id : It is the tdm port number. e.g. P1021E has 4 ports - port
+ A/B/C/D mapping to number 0/1/2/3.
+- fsl,tdm-framer-type : It should be "t1" or "e1", "t1" for T1 line rate, and
+ "e1" for E1 line rate
+- fsl,tdm-mode : It is tsa working mode. It should be "normal" or
+ "internal-loopback"
+- fsl,siram-entry-id : This number is used for setting index siram entry
+ It should be 0/2/4.../14. Each TDM should not use the same number
+ with others
Example:
ucc@2000 {
device_type = "network";
@@ -68,3 +87,23 @@ Example:
phy-connection-type = "gmii";
pio-handle = <140001>;
};
+
+ tdmc: ucc@2400 {
+ compatible = "fsl,ucc-tdm";
+ cell-index = <5>;
+ reg = <0x2400 0x200>;
+ interrupts = <40>;
+ interrupt-parent = <&qeic>;
+ rx-clock-name = "clk7";
+ tx-clock-name = "clk13";
+ fsl,rx-sync-clock = "rsync_pin";
+ fsl,tx-sync-clock = "tsync_pin";
+ fsl,tx-timeslot = <0x00ffffff>;
+ fsl,rx-timeslot = <0x00ffffff>;
+ pio-handle = <&pio_tdmc>;
+ fsl,tdm-framer-type = "t1";
+ fsl,tdm-mode = "normal";
+ fsl,tdm-id = <2>;
+ fsl,siram-entry-id = <4>;
+ phy-handle = <&tdmphy>;
+ };
diff --git a/Documentation/devicetree/bindings/powerpc/fsl/fman_chosen_node_device_tree.txt b/Documentation/devicetree/bindings/powerpc/fsl/fman_chosen_node_device_tree.txt
new file mode 100644
index 0000000..abdd9ad
--- /dev/null
+++ b/Documentation/devicetree/bindings/powerpc/fsl/fman_chosen_node_device_tree.txt
@@ -0,0 +1,183 @@
+=================================================================================
+Chosen Node - DPAA extended arguments Bindings
+
+Copyright 2013 Freescale Semiconductor Inc.
+
+CONTENTS
+ - FMan Extended Args Node
+ - FMan-Port Extended Args Node
+ - Example
+
+NOTE: The bindings described in this document are preliminary and subject to change.
+
+=================================================================================
+FMan Extended Args Node
+
+DESCRIPTION
+
+The purpose of this node it to provide means to implicitly initialize some of the
+FMan advanced arguments as described below. This node is entirely optional; i.e.
+the FMan Linux driver already sets the appropriate default values that should
+fit most of the standard applications.
+
+PROPERTIES
+
+ - compatible
+ Usage: required
+ Value type: <string>
+ Definition: Must include "fsl,fman-extended-args"
+
+ - cell-index
+ Usage: required
+ Value type: <u32>
+ Definition: Specifies the index of the FMan unit. The index should match
+ exactly the numbering of the cell-index of the FMan device-tree node.
+ It is recommended to use the "reference-to-node" method to assure matching.
+
+ - dma-aid-mode
+ Usage: optional
+ Value type: <string>
+ Definition: Sets the AID mode.
+ The optional values are "port" and "tnum".
+
+Example
+
+fman1-extd-args {
+ cell-index = <1>;
+ compatible = "fsl,fman-extended-args";
+ dma-aid-mode = "port";
+};
+
+=================================================================================
+FMan-Port Extended Args Node
+
+DESCRIPTION
+
+The purpose of this node it to provide means to implicitly initialize some of the
+FMan-port advanced arguments as described below. This node supports all FMan-Port
+types: OP, RX, 10G-RX, TX and 10G-TX ports. This node is entirely optional; i.e.
+the FMan Linux driver already sets the appropriate default values that should
+fit most of the standard applications.
+
+PROPERTIES
+
+ - compatible
+ Usage: required
+ Value type: <string>
+ Definition: A standard property.
+ An Offline-Parsing port must include "fsl,fman-port-op-extended-args".
+ The Rx port must include "fsl,fman-port-1g-rx-extended-args" or
+ "fsl,fman-port-10g-rx-extended-args" for 10G Rx ports.
+ The Tx port must include "fsl,fman-port-1g-tx-extended-args" or
+ "fsl,fman-port-10g-tx-extended-args" for 10G Tx ports.
+
+ - cell-index
+ Usage: required
+ Value type: <u32>
+ Definition: Specifies the index of the FMan Port unit.
+ The types of ports: offline-parsing, 1G Rx, 10G Rx, 1G Tx and 10G Tx
+ ports. The index should match exactly the numbering of the cell-index of the
+ FMan-Port device-tree node. It is recommended to use the "reference-to-node"
+ method to assure matching.
+
+ - num-tnums
+ Usage: optional
+ Value type: <prop-encoded-array>
+ Definition: Specifies the number of tnums required (first value)
+ as well as the extra required tnums (second value).
+ In the fman-port case "tnums" represent the number of tasks that the
+ Fman controller allocates to handle the appropriate port RX or TX activities.
+ For more details please refer to the Fman RM.
+
+ - num-dmas
+ Usage: optional
+ Value type: <prop-encoded-array>
+ Definition: Specifies the number of dmas required (first value)
+ as well as the extra required dmas (second value).
+ In the fman-port case "num-dmas" represent the number of dma channels
+ that the Fman controller allocates to handle the appropriate port
+ RX or TX activities.
+ For more details please refer to the Fman RM.
+
+ - fifo-size
+ Usage: optional
+ Value type: <prop-encoded-array>
+ Definition: Specifies the fifo size required (first value)
+ as well as the extra size required (second value).
+ In the fman-port case "fifo-size" represent the size of memory (in bytes)
+ that the Fman controller allocates to handle the appropriate port
+ RX or TX activities.
+ For more details please refer to the Fman RM.
+
+ - buffer-layout
+ Usage: optional
+ Value type: <prop-encoded-array>
+ Definition: Specifies the manipulation extra space needed (first value)
+ and the data alignment (second value).
+ For more information please refer to the FMan User's guide
+
+ - vsp-window
+ Usage: optional
+ Value type: <prop-encoded-array>
+ Definition: Specifies the number of profiles for this port (first value)
+ and the dfault virtual port relative id (second value). Note that the
+ kernel FMan driver automatically initializes the default VSP (using
+ the configuration from the Linux dpaa Ethernet Driver of the equivalent
+ port) while the rest of the VSPs should be initialized by the user
+ (using the appropriate IOCTLs).
+ For more information please refer to the FMan User's guide
+
+ - errors-to-discard
+ Usage: optional
+ Value type: <u32>
+ Definition: Specifies which errors should be discarded.
+ Errors that are not in the mask, will not be discarded;
+ I.e. those errors will be enqueued and sent to the default error queue.
+
+Example
+
+fman1_rx4-extd-args {
+ cell-index = <4>;
+ compatible = "fsl,fman-port-1g-rx-extended-args";
+ num-tnums = <16 0>;
+ num-dmas = <8 0>;
+ fifo-size = <0x3000 0>;
+ buffer-layout = <64 128>;
+ vsp-window = <8 0>;
+ errors-to-discard = <0x00020000>;
+};
+
+=================================================================================
+Example
+
+chosen {
+ name = "chosen";
+
+ dpaa-extended-args {
+ fman1-extd-args {
+ cell-index = <1>;
+ compatible = "fsl,fman-extended-args";
+ dma-aid-mode = "port";
+
+ fman1_rx4-extd-args {
+ cell-index = <4>;
+ compatible = "fsl,fman-port-1g-rx-extended-args";
+ policer-profile-window = <8>;
+ num-tnums = <16 0>;
+ num-dmas = <8 0>;
+ fifo-size = <0x3000 0>;
+ buffer-layout = <64 128>;
+ vsp-window = <8 0>;
+ errors-to-discard = <0x00020000>;
+ };
+
+ fman1_tx4-extd-args {
+ cell-index = <4>;
+ compatible = "fsl,fman-port-1g-tx-extended-args";
+ num-tnums = <16 0>;
+ num-dmas = <8 0>;
+ fifo-size = <0x3000 0>;
+ };
+ };
+ };
+};
diff --git a/Documentation/devicetree/bindings/powerpc/fsl/fman_device_tree.txt b/Documentation/devicetree/bindings/powerpc/fsl/fman_device_tree.txt
new file mode 100755
index 0000000..0d670b0
--- /dev/null
+++ b/Documentation/devicetree/bindings/powerpc/fsl/fman_device_tree.txt
@@ -0,0 +1,712 @@
+=================================================================================
+P4080 Frame Manager Device Bindings
+Copyright 2008 Freescale Semiconductor Inc.
+Version 1, September 16, 2008
+
+CONTENTS
+ - FMan Node
+ - FMan Port Node
+ - FMan MURAM Node
+ - FMan Parser Node
+ - FMan KeyGen Node
+ - FMan Coarse-Classification Node
+ - FMan Policer Node
+ - FMan dTSEC/XGEC Node
+ - FMan MDIO Node
+ - Example
+
+NOTE: The bindings described in this document are preliminary and subject to
+change.
+
+=================================================================================
+FMan Node
+
+DESCRIPTION
+
+Due to the fact that the FMan is an aggregation of sub-engines (ports, MACs,
+KeyGen, etc.) the FMan node will have child nodes for each of them. In order for
+these child nodes to be probed by the kernel, the FMan node must be "simple-bus"
+compatible.
+
+PROPERTIES
+
+ - compatible
+ Usage: required
+ Value type: <string>
+ Definition: Must include "fsl,fman" and "simple-bus"
+
+ - #address-cells
+ Usage: required
+ Value type: <u32>
+ Definition: A standard property. Defines the number of cells
+ for representing physical addresses in child nodes. Must
+ have a value of 1.
+
+ - #size-cells
+ Usage: required
+ Value type: <u32>
+ Definition: A standard property. Defines the number of cells
+ for representing the size of physical addresses in
+ child nodes. Must have a value of 1.
+
+ - cell-index
+ Usage: required
+ Value type: <u32>
+ Definition: Specifies the index of the FMan unit. In P4080 there
+ two FMan blocks.
+
+ - reg
+ Usage: required
+ Value type: <prop-encoded-array>
+ Definition: A standard property. Specifies the physical
+ address and length of the FMan configuration (SkyBlue)
+ registers
+
+ - ranges
+ Usage: required
+ Value type: <prop-encoded-array>
+ Definition: A standard property. Specifies the physical address
+ and length of the FMan memory space
+
+ - clock-frequency
+ Usage: required
+ Value type: <u32>
+ Definition: Specifies the FM clock frequency in Hz units.
+
+Note(s): All other standard properties (see the ePAPR) are allowed but are
+ optional.
+
+=================================================================================
+FMan MURAM Node
+
+DESCRIPTION
+
+FMan Internal memory - shared between all the FMan modules.
+It contains data structures that are common and written to or read by the modules.
+FMan internal memory is split into the following parts:
+ Packet buffering (Tx/Rx FIFOs)
+ Coarse classification table
+ Frames internal context
+
+PROPERTIES
+
+ - compatible
+ Usage: required
+ Value type: <string>
+ Definition: Must include "fsl,fman-muram"
+
+ - ranges
+ Usage: required
+ Value type: <prop-encoded-array>
+ Definition: A standard property. Specifies the physical address
+ and length of the FMan memory space
+
+EXAMPLE
+
+muram@0 {
+ compatible = "fsl,fman-muram";
+ ranges = <0 0x000000 0x28000>;
+};
+
+=================================================================================
+FMan Port Node
+
+DESCRIPTION
+
+The Frame Manager (FMan) supports several types of hardware ports:
+ Ethernet receiver (RX)
+ Ethernet transmitter (TX)
+ Offline (O/H)
+ Host command (O/H)
+
+PROPERTIES
+
+ - compatible
+ Usage: required
+ Value type: <string>
+ Definition: A standard property. Must include "fsl,fman-port".
+ An OH must include "fsl,fman-port-hc" for Host-Command port
+ or "fsl,fman-port-op" for Offline-Parsing port.
+ The Rx port must include "fsl,fman-port-rx" or "fsl,fman-port-xgrx"
+ for 10G Rx ports.
+ The Tx port must include "fsl,fman-port-tx" or "fsl,fman-port-xgtx"
+ for 10G Tx ports.
+
+ - cell-index
+ Usage: optional
+ Value type: <u32>
+ Definition: Specifies the index of the FMan Port unit. Note that there are
+ types of ports: host-command/offline-parsing, Rx, 10G Rx, Tx and 10G Tx
+ ports. The index is the port location according to its memory-map.
+ I.e. the index is relative for each group/type of ports (rx, 10grx, tx,
+ 10gtx, oh).
+
+ - reg
+ Usage: required
+ Value type: <prop-encoded-array>
+ Definition: A standard property. Specifies the physical address
+ offset and length of the port configuration (SkyBlue)
+ registers within the Fman node's address space.
+
+ - fsl,liodn
+ Usage: see definition
+ Value type: <u32>
+ Definition: The logical I/O device number (LIODN) for this
+ device. The LIODN is a number expressed by this device
+ and used to perform look-ups in the IOMMU (PAMU) address
+ table when performing DMAs. This property is required
+ if the PAMU is enabled.
+
+ - fsl,qman-channel-id
+ Usage: required for Tx, HC, and OP ports, unused for Rx ports.
+ Value type <u32>
+ Definition: Specifies the channel to dequeue from for this port.
+
+Note(s): All other standard properties (see the ePAPR) are allowed but are
+ optional.
+
+EXAMPLE
+
+fman0_tx0: port@a8000 {
+ cell-index = <0>;
+ compatible = "fsl,p4080-fman-port-1g-tx", "fsl,fman-port-1g-tx";
+ reg = <0xa8000 0x1000>;
+ fsl,qman-channel-id = <0x47>;
+};
+
+=================================================================================
+FMan Parser Node
+
+DESCRIPTION
+
+The FMan Parser parses incoming frames and generates parser results that
+contain header types and indexes to the headers
+
+PROPERTIES
+
+ - compatible
+ Usage: required
+ Value type: <string>
+ Definition: A standard property. Must include "fsl,fman-parser".
+
+ - reg
+ Usage: required
+ Value type: <prop-encoded-array>
+ Definition: A standard property. Specifies the physical address
+ offset and length of the KeyGen configuration (SkyBlue)
+ registers within the Fman node's address space.
+
+EXAMPLE
+
+parser@80000 {
+ compatible = "fsl,fman-parser";
+ reg = <0x80000 0x1000>;
+};
+
+=================================================================================
+FMan KeyGen Node
+
+DESCRIPTION
+
+KeyGen - key generator module.
+ This module determines how frames are distributed to a range of FQs
+
+PROPERTIES
+
+ - compatible
+ Usage: required
+ Value type: <string>
+ Definition: A standard property. Must include "fsl,fman-keygen".
+
+ - reg
+ Usage: required
+ Value type: <prop-encoded-array>
+ Definition: A standard property. Specifies the physical address
+ offset and length of the KeyGen configuration (SkyBlue)
+ registers within the Fman node's address space.
+
+EXAMPLE
+
+keygen@c1000 {
+ compatible = "fsl,fman-keygen";
+ reg = <0xc1000 0x1000>;
+};
+
+=================================================================================
+FMan Coarse-Classification Node
+
+DESCRIPTION
+
+The Coarse Classification block is a tree data structure inside the FMan controller
+that provides exact matching by searching predefined classification tables.
+
+PROPERTIES
+
+ - compatible
+ Usage: required
+ Value type: <string>
+ Definition: A standard property. Must include "fsl,fman-cc".
+
+EXAMPLE
+
+cc: {
+ compatible = "fsl,fman-cc";
+};
+
+=================================================================================
+FMan Policer Node
+
+DESCRIPTION
+
+The Ploicer provides means to configure policy profiles that are used to
+prioritize a flow of frames over the other
+
+PROPERTIES
+
+ - compatible
+ Usage: required
+ Value type: <string>
+ Definition: A standard property. Must include "fsl,fman-policer".
+
+ - reg
+ Usage: required
+ Value type: <prop-encoded-array>
+ Definition: A standard property. Specifies the physical address
+ offset and length of the KeyGen configuration (SkyBlue)
+ registers within the Fman node's address space.
+
+EXAMPLE
+
+policer@c2000 {
+ compatible = "fsl,fman-policer";
+ reg = <0xc2000 0x1000>;
+};
+
+=================================================================================
+FMan common BMI Node
+
+DESCRIPTION
+
+Tha BMI is the FMan interfacet to the Buffer Manager (BMan)
+which allocates/deallocates frames buffers
+
+PROPERTIES
+
+ - compatible
+ Usage: required
+ Value type: <string>
+ Definition: A standard property. Must include "fsl,fman-bmi".
+
+ - reg
+ Usage: required
+ Value type: <prop-encoded-array>
+ Definition: A standard property. Specifies the physical address
+ offset and length of the KeyGen configuration (SkyBlue)
+ registers within the Fman node's address space.
+
+EXAMPLE
+
+bmi@80000 {
+ compatible = "fsl,p4080-fman-bmi", "fsl,fman-bmi";
+ reg = <0x80000 0x400>;
+};
+
+=================================================================================
+FMan common QMI Node
+
+DESCRIPTION
+
+The QMI is the FMan interface to the Queue Manager (QMan)
+It dequeues/enqueues frame descriptors (FD) from/to the QMan
+
+PROPERTIES
+
+ - compatible
+ Usage: required
+ Value type: <string>
+ Definition: A standard property. Must include "fsl,fman-qmi".
+
+ - reg
+ Usage: required
+ Value type: <prop-encoded-array>
+ Definition: A standard property. Specifies the physical address
+ offset and length of the KeyGen configuration (SkyBlue)
+ registers within the Fman node's address space.
+
+EXAMPLE
+
+bmi@80400 {
+ compatible = "fsl,p4080-fman-qmi", "fsl,fman-qmi";
+ reg = <0x80400 0x400>;
+};
+
+=================================================================================
+FMan dTSEC/XGEC Node
+
+DESCRIPTION
+
+dTSEC/XGEC are the Ethernet network interfaces
+
+PROPERTIES
+
+ - compatible
+ Usage: required
+ Value type: <string>
+ Definition: A standard property. Must include "fsl,fman-mac".
+ dTSEC MAC must include "fsl,fman-mac-dtsec".
+ 10G MAC must include "fsl,fman-mac-xgec".
+
+ - cell-index
+ Usage: optional
+ Value type: <u32>
+ Definition: Specifies the index of the FMan MAC unit. Note that there are
+ types of MACs: dTSEC and XGMAC. The index is the MAC location according
+ to its memory-map. I.e. the index is relative for each group/type of MACs.
+
+ - reg
+ Usage: required
+ Value type: <prop-encoded-array>
+ Definition: A standard property. Specifies the physical address
+ offset and length of the MAC configuration (SkyBlue)
+ registers within the Fman node's address space.
+
+ - fsl,port-handles
+ Usage: required
+ Value type: <prop-encoded-array>
+ Definition: An array of two phandles-- the first references the
+ FMan RX port and the second the TX port used by this MAC.
+
+ - local-mac-address
+ Usage: required
+ Value type: <prop-encoded-array>, encoded as array of 6 hex numbers
+ Definition: Specifies IEEE 802.3 MAC address for this MAC.
+
+ - phy-handle
+ Usage: required
+ Value type: <phandle>
+ Definition: Specifies the PHY connected to this MAC
+
+ - phy-connection-type
+ Usage: required
+ Value type: <string>
+ Definition: Specifies the PHY type connected to this MAC.
+ Defaults to "mii". See the ePAPR for further details.
+
+Note(s): All other standard properties (see the ePAPR) are allowed but are
+ optional.
+
+EXAMPLE
+
+enet0: ethernet@e0000 {
+ cell-index = <0>;
+ compatible = "fsl,p4080-fman-1g-mac", "fsl,fman-1g-mac";
+ reg = <0xe0000 0x1000>;
+ fsl,port-handles = <&fman0_rx0 &fman0_tx0>;
+ phy-handle = <&phy0>;
+ phy-connection-type = "rgmii-id";
+};
+
+=================================================================================
+FMan MDIO Node
+
+DESCRIPTION
+
+The MDIO is a bus to which network PHY devices are attached. Each PHY device on
+the MDIO bus should be represented by a child node.
+
+PROPERTIES
+
+ - compatible
+ Usage: required
+ Value type: <string>
+ Definition: A standard property. Must include "fsl,fman-mdio".
+
+ - #address-cells
+ Usage: required
+ Value type: <u32>
+ Definition: A standard property. Defines the number of cells
+ for representing physical addresses in child node. Must
+ have a value of 1.
+
+ - #size-cells
+ Usage: required
+ Value type: <u32>
+ Definition: A standard property. Must be 0.
+
+ - reg
+ Usage: required
+ Value type: <prop-encoded-array>
+ Definition: A standard property. Specifies the physical address
+ offset and length of the MDIO configuration (SkyBlue)
+ registers within the Fman node's address space.
+
+Note(s): All other standard properties (see the ePAPR) are allowed but are
+ optional.
+
+EXAMPLE
+
+mdio@e1000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "fsl,fman-mdio";
+ reg = <0xe1000 0x1000>;
+ interrupts = <100 1>;
+
+ phy0: ethernet-phy@0 {
+ reg = <0>;
+ };
+};
+
+=================================================================================
+Example
+
+fman0: fman@400000 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ cell-index = <0>;
+ compatible = "fsl,p4080-fman", "fsl,fman", "simple-bus";
+ ranges = <0 0x400000 0x100000>;
+ reg = <0x400000 0x100000>;
+ clock-frequency = <666>;
+ interrupts = <96 2 16 2>;
+ interrupt-parent = <&mpic>;
+
+ cc@0 {
+ compatible = "fsl,p4080-fman-cc", "fsl,fman-cc";
+ };
+
+ parser@c7000 {
+ compatible = "fsl,p4080-fman-parser", "fsl,fman-parser";
+ reg = <0xc7000 0x1000>;
+ };
+
+ keygen@c1000 {
+ compatible = "fsl,p4080-fman-keygen", "fsl,fman-keygen";
+ reg = <0xc1000 0x1000>;
+ };
+
+ policer@c0000 {
+ compatible = "fsl,p4080-fman-policer", "fsl,fman-policer";
+ reg = <0xc0000 0x1000>;
+ };
+
+ muram@0 {
+ compatible = "fsl,p4080-fman-muram", "fsl,fman-muram";
+ reg = <0x0 0x28000>;
+ };
+
+ bmi@80000 {
+ compatible = "fsl,p4080-fman-bmi", "fsl,fman-bmi";
+ reg = <0x80000 0x400>;
+ };
+
+ qmi@80400 {
+ compatible = "fsl,p4080-fman-qmi", "fsl,fman-qmi";
+ reg = <0x80400 0x400>;
+ };
+
+ fman0_oh0: port@81000 {
+ cell-index = <0>;
+ compatible = "fsl,p4080-fman-port-oh", "fsl,fman-port-oh";
+ reg = <0x81000 0x1000>;
+ fsl,qman-channel-id = <0x40>;
+ };
+ fman0_oh1: port@82000 {
+ cell-index = <1>;
+ compatible = "fsl,p4080-fman-port-oh", "fsl,fman-port-oh";
+ reg = <0x82000 0x1000>;
+ fsl,qman-channel-id = <0x41>;
+ };
+ fman0_oh2: port@83000 {
+ cell-index = <2>;
+ compatible = "fsl,p4080-fman-port-oh", "fsl,fman-port-oh";
+ reg = <0x83000 0x1000>;
+ fsl,qman-channel-id = <0x42>;
+ };
+ fman0_oh3: port@84000 {
+ cell-index = <3>;
+ compatible = "fsl,p4080-fman-port-oh", "fsl,fman-port-oh";
+ reg = <0x84000 0x1000>;
+ fsl,qman-channel-id = <0x43>;
+ };
+ fman0_oh4: port@85000 {
+ cell-index = <4>;
+ compatible = "fsl,p4080-fman-port-oh", "fsl,fman-port-oh";
+ reg = <0x85000 0x1000>;
+ fsl,qman-channel-id = <0x44>;
+ };
+ fman0_oh5: port@86000 {
+ cell-index = <5>;
+ compatible = "fsl,p4080-fman-port-oh", "fsl,fman-port-oh";
+ reg = <0x86000 0x1000>;
+ fsl,qman-channel-id = <0x45>;
+ };
+ fman0_oh6: port@87000 {
+ cell-index = <6>;
+ compatible = "fsl,p4080-fman-port-oh", "fsl,fman-port-oh";
+ reg = <0x87000 0x1000>;
+ fsl,qman-channel-id = <0x46>;
+ };
+
+ fman0_rx0: port@88000 {
+ cell-index = <0>;
+ compatible = "fsl,p4080-fman-port-1g-rx", "fsl,fman-port-1g-rx";
+ reg = <0x88000 0x1000>;
+ };
+ fman0_rx1: port@89000 {
+ cell-index = <1>;
+ compatible = "fsl,p4080-fman-port-1g-rx", "fsl,fman-port-1g-rx";
+ reg = <0x89000 0x1000>;
+ };
+ fman0_rx2: port@8a000 {
+ cell-index = <2>;
+ compatible = "fsl,p4080-fman-port-1g-rx", "fsl,fman-port-1g-rx";
+ reg = <0x8a000 0x1000>;
+ };
+ fman0_rx3: port@8b000 {
+ cell-index = <3>;
+ compatible = "fsl,p4080-fman-port-1g-rx", "fsl,fman-port-1g-rx";
+ reg = <0x8b000 0x1000>;
+ };
+ fman0_rx4: port@90000 {
+ cell-index = <0>;
+ compatible = "fsl,p4080-fman-port-10g-rx", "fsl,fman-port-10g-rx";
+ reg = <0x90000 0x1000>;
+ };
+
+ fman0_tx0: port@a8000 {
+ cell-index = <0>;
+ compatible = "fsl,p4080-fman-port-1g-tx", "fsl,fman-port-1g-tx";
+ reg = <0xa8000 0x1000>;
+ fsl,qman-channel-id = <0x47>;
+ };
+ fman0_tx1: port@a9000 {
+ cell-index = <1>;
+ compatible = "fsl,p4080-fman-port-1g-tx", "fsl,fman-port-1g-tx";
+ reg = <0xa9000 0x1000>;
+ fsl,qman-channel-id = <0x48>;
+ };
+ fman0_tx2: port@aa000 {
+ cell-index = <2>;
+ compatible = "fsl,p4080-fman-port-1g-tx", "fsl,fman-port-1g-tx";
+ reg = <0xaa000 0x1000>;
+ fsl,qman-channel-id = <0x49>;
+ };
+ fman0_tx3: port@ab000 {
+ cell-index = <3>;
+ compatible = "fsl,p4080-fman-port-1g-tx", "fsl,fman-port-1g-tx";
+ reg = <0xab000 0x1000>;
+ fsl,qman-channel-id = <0x4a>;
+ };
+ fman0_tx4: port@b0000 {
+ cell-index = <0>;
+ compatible = "fsl,p4080-fman-port-10g-tx", "fsl,fman-port-10g-tx";
+ reg = <0xb0000 0x1000>;
+ fsl,qman-channel-id = <0x4b>;
+ };
+
+ enet0: ethernet@e0000 {
+ cell-index = <0>;
+ compatible = "fsl,p4080-fman-1g-mac", "fsl,fman-1g-mac";
+ reg = <0xe0000 0x1000>;
+ fsl,port-handles = <&fman0_rx0 &fman0_tx0>;
+ phy-handle = <&phy0>;
+ phy-connection-type = "rgmii-id";
+ };
+
+ mdio@e1000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "fsl,fman-mdio";
+ reg = <0xe1000 0x1000>;
+ interrupts = <100 1>;
+
+ phy0: ethernet-phy@0 {
+ reg = <0>;
+ };
+ };
+
+ enet1: ethernet@e2000 {
+ cell-index = <1>;
+ compatible = "fsl,p4080-fman-1g-mac", "fsl,fman-1g-mac";
+ reg = <0xe2000 0x1000>;
+ fsl,port-handles = <&fman0_rx1 &fman0_tx1>;
+ phy-handle = <&phy1>;
+ phy-connection-type = "rgmii-id";
+ };
+
+ mdio@e3000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "fsl,fman-mdio";
+ reg = <0xe3000 0x1000>;
+ interrupts = <100 1>;
+
+ phy1: ethernet-phy@0 {
+ reg = <0>;
+ };
+ };
+
+ enet2: ethernet@e4000 {
+ cell-index = <2>;
+ compatible = "fsl,p4080-fman-1g-mac", "fsl,fman-1g-mac";
+ reg = <0xe4000 0x1000>;
+ fsl,port-handles = <&fman0_rx2 &fman0_tx2>;
+ phy-handle = <&phy2>;
+ phy-connection-type = "rgmii-id";
+ };
+
+ mdio@e5000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "fsl,fman-mdio";
+ reg = <0xe5000 0x1000>;
+ interrupts = <100 1>;
+
+ phy2: ethernet-phy@0 {
+ reg = <0>;
+ };
+ };
+
+ enet3: ethernet@e6000 {
+ cell-index = <3>;
+ compatible = "fsl,p4080-fman-1g-mac", "fsl,fman-1g-mac";
+ reg = <0xe6000 0x1000>;
+ fsl,port-handles = <&fman0_rx3 &fman0_tx3>;
+ phy-handle = <&phy3>;
+ phy-connection-type = "rgmii-id";
+ };
+
+ mdio@e7000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "fsl,fman-mdio";
+ reg = <0xe7000 0x1000>;
+ interrupts = <100 1>;
+
+ phy3: ethernet-phy@0 {
+ reg = <0>;
+ };
+ };
+
+ enet4: ethernet@f0000 {
+ cell-index = <0>;
+ compatible = "fsl,p4080-fman-10g-mac", "fsl,fman-10g-mac";
+ reg = <0xf0000 0x1000>;
+ fsl,port-handles = <&fman0_rx4 &fman0_tx4>;
+ phy-handle = <&phy4>;
+ phy-connection-type = "rgmii-id";
+ };
+
+ mdio@f1000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "fsl,fman-mdio";
+ reg = <0xf1000 0x1000>;
+ interrupts = <100 1>;
+
+ phy4: ethernet-phy@0 {
+ reg = <0>;
+ };
+ };
+};
diff --git a/Documentation/devicetree/bindings/powerpc/fsl/fsl-dce.txt b/Documentation/devicetree/bindings/powerpc/fsl/fsl-dce.txt
new file mode 100644
index 0000000..7eb50d2
--- /dev/null
+++ b/Documentation/devicetree/bindings/powerpc/fsl/fsl-dce.txt
@@ -0,0 +1,66 @@
+=====================================================================
+DCE Device Tree Binding
+Copyright (C) 2012 Freescale Semiconductor Inc.
+
+ CONTENTS
+ -Overview
+ -DCE Node and Example
+
+NOTE: the DCE is also known as Freescale's Decompression and Compression Engine
+
+=====================================================================
+Overview
+
+DESCRIPTION
+
+ The Decompression and Compression Engine is an accelerator compatible
+ with Datapath Architecture providing lossless data decompression and
+ compression for the QorIQ family of SoCs.
+
+=====================================================================
+DCE Node
+
+Description
+
+ Node defines the base address of the DCE block.
+ This block specifies the address range of all global
+ configuration registers for the DCE block. It
+ also receives error interrupts
+
+
+PROPERTIES
+
+ - compatible
+ Usage: required
+ Value type: <string>
+ Definition: Must include "fsl,dce"
+
+ - reg
+ Usage: required
+ Value type: <prop-encoded-array>
+ Definition: A standard property. Specifies the physical
+ address and length of the DCE configuration registers.
+ registers
+
+ - interrupts
+ Usage: required
+ Value type: <prop_encoded-array>
+ Definition: Specifies the interrupts generated by this
+ device. The value of the interrupts property
+ consists of one interrupt specifier. The format
+ of the specifier is defined by the binding document
+ describing the node's interrupt parent.
+ This device only generates an error interrupt.
+
+ Note: All other standard properties (see the ePAPR) are allowed
+ but are optional.
+
+
+EXAMPLE
+ dce@312000 {
+ compatible = "fsl,dce";
+ reg = <0x312000 0x10000>;
+ interrupts = <16 2 1 4>;
+ };
+
+=====================================================================
diff --git a/Documentation/devicetree/bindings/powerpc/fsl/pmc.txt b/Documentation/devicetree/bindings/powerpc/fsl/pmc.txt
index 07256b7..f1f749f 100644
--- a/Documentation/devicetree/bindings/powerpc/fsl/pmc.txt
+++ b/Documentation/devicetree/bindings/powerpc/fsl/pmc.txt
@@ -9,15 +9,20 @@ Properties:
"fsl,mpc8548-pmc" should be listed for any chip whose PMC is
compatible. "fsl,mpc8536-pmc" should also be listed for any chip
- whose PMC is compatible, and implies deep-sleep capability.
+ whose PMC is compatible, and implies deep-sleep capability and
+ wake on user defined packet(wakeup on ARP).
+
+ "fsl,p1022-pmc" should be listed for any chip whose PMC is
+ compatible, and implies lossless Ethernet capability during sleep.
"fsl,mpc8641d-pmc" should be listed for any chip whose PMC is
compatible; all statements below that apply to "fsl,mpc8548-pmc" also
apply to "fsl,mpc8641d-pmc".
Compatibility does not include bit assignments in SCCR/PMCDR/DEVDISR; these
- bit assignments are indicated via the sleep specifier in each device's
- sleep property.
+ bit assignments are indicated via the clock nodes. Device which has a
+ controllable clock source should have a "fsl,pmc-handle" property pointing
+ to the clock node.
- reg: For devices compatible with "fsl,mpc8349-pmc", the first resource
is the PMC block, and the second resource is the Clock Configuration
@@ -33,31 +38,35 @@ Properties:
this is a phandle to an "fsl,gtm" node on which timer 4 can be used as
a wakeup source from deep sleep.
-Sleep specifiers:
+Clock nodes:
+The clock nodes are to describe the masks in PM controller registers for each
+soc clock.
+- fsl,pmcdr-mask: For "fsl,mpc8548-pmc"-compatible devices, the mask will be
+ ORed into PMCDR before suspend if the device using this clock is the wake-up
+ source and need to be running during low power mode; clear the mask if
+ otherwise.
- fsl,mpc8349-pmc: Sleep specifiers consist of one cell. For each bit
- that is set in the cell, the corresponding bit in SCCR will be saved
- and cleared on suspend, and restored on resume. This sleep controller
- supports disabling and resuming devices at any time.
+- fsl,sccr-mask: For "fsl,mpc8349-pmc"-compatible devices, the corresponding
+ bit specified by the mask in SCCR will be saved and cleared on suspend, and
+ restored on resume.
- fsl,mpc8536-pmc: Sleep specifiers consist of three cells, the third of
- which will be ORed into PMCDR upon suspend, and cleared from PMCDR
- upon resume. The first two cells are as described for fsl,mpc8578-pmc.
- This sleep controller only supports disabling devices during system
- sleep, or permanently.
-
- fsl,mpc8548-pmc: Sleep specifiers consist of one or two cells, the
- first of which will be ORed into DEVDISR (and the second into
- DEVDISR2, if present -- this cell should be zero or absent if the
- hardware does not have DEVDISR2) upon a request for permanent device
- disabling. This sleep controller does not support configuring devices
- to disable during system sleep (unless supported by another compatible
- match), or dynamically.
+- fsl,devdisr-mask: Contain one or two cells, depending on the availability of
+ DEVDISR2 register. For compatible devices, the mask will be ORed into DEVDISR
+ or DEVDISR2 when the clock should be permenently disabled.
Example:
- power@b00 {
- compatible = "fsl,mpc8313-pmc", "fsl,mpc8349-pmc";
- reg = <0xb00 0x100 0xa00 0x100>;
- interrupts = <80 8>;
+ power@e0070 {
+ compatible = "fsl,mpc8536-pmc", "fsl,mpc8548-pmc";
+ reg = <0xe0070 0x20>;
+
+ etsec1_clk: soc-clk@24 {
+ fsl,pmcdr-mask = <0x00000080>;
+ };
+ etsec2_clk: soc-clk@25 {
+ fsl,pmcdr-mask = <0x00000040>;
+ };
+ etsec3_clk: soc-clk@26 {
+ fsl,pmcdr-mask = <0x00000020>;
+ };
};
diff --git a/Documentation/devicetree/bindings/powerpc/fsl/rman.txt b/Documentation/devicetree/bindings/powerpc/fsl/rman.txt
new file mode 100644
index 0000000..76a86fd
--- /dev/null
+++ b/Documentation/devicetree/bindings/powerpc/fsl/rman.txt
@@ -0,0 +1,178 @@
+=================================================================================
+Freescale RapidIO Message Manager Device Bindings
+Copyright 2013 Freescale Semiconductor Inc.
+
+CONTENTS
+ - RMan Node
+ - RMan Inbound Block Node
+ - RMan Global CFG Node
+ - Example
+
+NOTE: The bindings described in this document are preliminary and subject to
+change.
+
+=================================================================================
+RMan Node
+
+DESCRIPTION
+
+The RapidIO message manager (RMan) supports a message passing programming model
+for inter-processor and inter-device communication. Due to the fact RMan has
+multiple inbound blocks, the RMan node will have child nodes for each block.
+The RMan's revision information can be get from IPBRRO and IPBRR1 registers.
+
+PROPERTIES
+
+ - compatible
+ Usage: required
+ Value type: <string>
+ Definition: Must include "fsl,rman".
+ Definition: Must include "fsl,rman" for IP blocks with IP Block
+ Revision Register (SRIO IPBRR1) Major ID equal to 0x0a20.
+
+ Optionally, a compatiable string of "fsl,rman-vX.Y" where X is Major
+ version in IP Block Revision Register and Y is Minor version. If this
+ compatiable is provided it should be ordered before "fsl,rman".
+
+ - #address-cells
+ Usage: required
+ Value type: <u32>
+ Definition: A standard property. Defines the number of cells for
+ representing physical addresses in child nodes. Must have a
+ value of 1.
+
+ - #size-cells
+ Usage: required
+ Value type: <u32>
+ Definition: A standard property. Defines the number of cells for
+ representing the size of physical addresses in child nodes.
+ Must have a value of 1.
+
+ - reg
+ Usage: required
+ Value type: <prop-encoded-array>
+ Definition: A standard property. Specifies the physical address and
+ length of the RMan configuration registers within the CCSR
+ address space.
+
+ - ranges
+ Usage: required
+ Value type: <prop-encoded-array>
+ Definition: A standard property. Specifies the physical address and=
+ length of the RMan memory space.
+
+ - interrupts:
+ Usage: required
+ Value type: <prop-encoded-array>
+ Definition: Interrupt mapping for RMAN error IRQ.
+
+ - fsl,qman-channels-id
+ Usage: required
+ Value type: <prop-encoded-array>
+ Definition: This property represents the ID value for the specific QMan
+ dequeue channel(s) asssociate with RMan. Typically there is a
+ dequeue channel per RapidIO port.
+
+=================================================================================
+RMan Inbound Block Node
+
+DESCRIPTION
+
+RMan has multiple inbound blocks. Each inbound block has eight classification
+units.
+
+PROPERTIES
+
+ - compatible
+ Usage: required
+ Value type: <string>
+ Definition: A standard property. Must include "fsl,rman-inbound-block".
+
+ - reg
+ Usage: required
+ Value type: <prop-encoded-array>
+ Definition: A standard property. Specifies the physical address offset
+ and length of the RMan inbound block configuration registers
+ within the RMan node's address space.
+
+ - fsl,liodn
+ Usage: see definition
+ Value type: <u32>
+ Definition: The logical I/O device number (LIODN) for this device. The
+ LIODN is a number expressed by this device and used to perform
+ look-ups in the IOMMU (PAMU) address table when performing DMAs.
+ This property is required if the PAMU is enabled.
+
+Example
+
+inbound-block@0 {
+ fsl,liodn = <203>;
+ compatible = "fsl,rman-inbound-block";
+ reg = <0x0 0x800>;
+};
+
+=================================================================================
+RMan Global CFG Node
+
+DESCRIPTION
+
+This node describes the RMan global registers located within the first 4K bytes
+resource block.
+
+PROPERTIES
+
+ - compatible
+ Usage: required
+ Value type: <string>
+ Definition: A standard property. Must include "fsl,rman-global-cfg".
+
+ - reg
+ Usage: required
+ Value type: <prop-encoded-array>
+ Definition: A standard property. Specifies the physical address offset
+ and length of the RMan global configuration registers within the
+ RMan node's address space.
+
+Example
+
+global-cfg@b00 {
+ compatible = "fsl,rman-global-cfg";
+ reg = <0xb00 0x500>;
+};
+
+=================================================================================
+Example
+
+rman: rman@1e0000 {
+ compatible = "fsl,rman";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0x0 0x1e0000 0x20000>;
+ reg = <0x1e0000 0x20000>;
+ interrupts = <16 2 1 11>; /* err_irq */
+ fsl,qman-channels-id = <0x62 0x63>;
+ inbound-block@0 {
+ fsl,liodn = <203>;
+ compatible = "fsl,rman-inbound-block";
+ reg = <0x0 0x800>;
+ };
+ global-cfg@b00 {
+ compatible = "fsl,rman-global-cfg";
+ reg = <0xb00 0x500>;
+ };
+ inbound-block@1000 {
+ fsl,liodn = <204>;
+ compatible = "fsl,rman-inbound-block";
+ reg = <0x1000 0x800>;
+ };
+ inbound-block@2000 {
+ fsl,liodn = <205>;
+ compatible = "fsl,rman-inbound-block";
+ reg = <0x2000 0x800>;
+ };
+ inbound-block@3000 {
+ fsl,liodn = <206>;
+ compatible = "fsl,rman-inbound-block";
+ reg = <0x3000 0x800>;
+ };
+};
diff --git a/Documentation/devicetree/bindings/tdm/fsl-tdm.txt b/Documentation/devicetree/bindings/tdm/fsl-tdm.txt
new file mode 100644
index 0000000..1258b89
--- /dev/null
+++ b/Documentation/devicetree/bindings/tdm/fsl-tdm.txt
@@ -0,0 +1,65 @@
+=====================================================================
+TDM Device Tree Binding
+Copyright (C) 2012 Freescale Semiconductor Inc.
+
+NOTE: The bindings described in this document are preliminary
+and subject to change.
+
+=====================================================================
+TDM (Time Division Multiplexing)
+
+DESCRIPTION
+
+The TDM is full duplex serial port designed to allow various devices including
+digital signal processors (DSPs) to communicate with a variety of serial devices
+including industry standard framers, codecs, other DSPs and microprocessors.
+
+The below properties describe the device tree bindings for Freescale TDM
+controller.
+This TDM controller is available on various Freescale Processors like
+MPC8313, P1020, P1022 and P1010.
+
+PROPERTIES
+
+ - compatible
+ Usage: required
+ Value type: <string>
+ Definition: Should contain "fsl,tdm1.0".
+
+ - reg
+ Usage: required
+ Definition: A standard property. The first reg specifier describes the
+ TDM registers, and the second describes the TDM DMAC registers.
+
+ - clock-frequency
+ Usage: optional
+ Value type: <u32 or u64>
+ Definition: The frequency at which the TDM block is operating.
+
+ - interrupts
+ Usage: required
+ Definition: Definition: Two interrupt specifiers. The first is TDM
+ error, and the second is TDM EMAC.
+
+ - phy-handle
+ Usage: optional
+ Value type: <phandle>
+ Definition: Phandle of the line controller node or framer node eg. SLIC,
+ E1/T1 etc.
+
+ - fsl,max-time-slots
+ Usage: required
+ Value type: <u32>
+ Definition: Maximum number of 8-bit time slots in one TDM frame.
+ This is the maximum number which TDM hardware supports.
+
+EXAMPLE
+
+ tdm@16000 {
+ compatible = "fsl,tdm1.0";
+ reg = <0x16000 0x200 0x2c000 0x2000>;
+ clock-frequency = <0>;
+ interrupts = <16 8 62 8>;
+ phy-handle = <&zarlink1>;
+ fsl,max-time-slots = <128>;
+ };
diff --git a/Documentation/devicetree/bindings/tdm/pq-mds-t1.txt b/Documentation/devicetree/bindings/tdm/pq-mds-t1.txt
new file mode 100644
index 0000000..d5a9240
--- /dev/null
+++ b/Documentation/devicetree/bindings/tdm/pq-mds-t1.txt
@@ -0,0 +1,63 @@
+=====================================================================
+FSL PQ_MDS_T1 Device Tree Binding
+Copyright (C) 2012 Freescale Semiconductor Inc.
+
+=====================================================================
+Introduction
+
+The PQ-MDS-T1 - A board card with the T1/E1/DS3/T3/SLIC-SLAC module
+ which serves as a platform for S/W and H/W development
+ around the host device, it is connected by PMC sockets.
+
+1.TDM PHY
+ Function : DS26528 T1/E1/J1 transceiver
+
+Properties
+ - compatible
+ Usage: required
+ Value type: <string>
+ Definition: Should be "fsl,pq-mds-t1".
+ - reg
+ Usage: required
+ Value type: <prop-encoded-array>
+ Definition: The first reg specifier describes the the address,
+ and the second describes the length.
+ - line-rate
+ Usage: required
+ Value type: <string>
+ Definition: It descrbets the line rate "e1" or "t1". "e1" is 2.048MHz
+ "t1" is 1.544MHz.
+ - fsl,trans-mode
+ Usage: required
+ Value type: <string>
+ Definition: TDM controller transfer mode setting
+ Normal operation: set fsl,trans-mode = "normal". In this mode,
+ controller sends and receives data normally.
+ Loopback operation: set fsl,trans-mode = "internal-loopback".
+ In this mode, the data is sent via tsa tx pin and
+ received from tsa rx pin.
+Example
+
+ ds26528: tdm-phy@0 {
+ compatible = "dallas,ds26528";
+ reg = <0 0x2000>;
+ line-rate = "e1";
+ fsl,trans-mode = "normal";
+ };
+
+2.PQ-MDS-T1 PLD
+ Function: Board identification, control and clock/signal routing
+
+Properties
+ - fsl,card-support
+ Usage: required
+ Value type: <u32>
+ Definition: This property use phandle to describe which it serves as,
+ ds26528 or zarlink.
+
+Example
+ pld-reg@2000 {
+ compatible = "fsl,pq-mds-t1-pld";
+ reg = <0x2000 0x1000>;
+ fsl,card-support = <&ds26528>;
+ }