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Diffstat (limited to 'arch/arm/Kconfig')
-rw-r--r--arch/arm/Kconfig31
1 files changed, 29 insertions, 2 deletions
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index d70260d..7a13c2c 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -735,6 +735,7 @@ config ARCH_S3C64XX
select SAMSUNG_CLKSRC
select SAMSUNG_GPIOLIB_4BIT
select SAMSUNG_IRQ_VIC_TIMER
+ select SAMSUNG_WDT_RESET
select USB_ARCH_HAS_OHCI
help
Samsung S3C64XX series based systems
@@ -751,6 +752,7 @@ config ARCH_S5P64X0
select HAVE_S3C2410_WATCHDOG if WATCHDOG
select HAVE_S3C_RTC if RTC_CLASS
select NEED_MACH_GPIO_H
+ select SAMSUNG_WDT_RESET
select SAMSUNG_ATAGS
help
Samsung S5P64X0 CPU based systems, such as the Samsung SMDK6440,
@@ -769,6 +771,7 @@ config ARCH_S5PC100
select HAVE_S3C2410_WATCHDOG if WATCHDOG
select HAVE_S3C_RTC if RTC_CLASS
select NEED_MACH_GPIO_H
+ select SAMSUNG_WDT_RESET
select SAMSUNG_ATAGS
help
Samsung S5PC100 series based systems
@@ -1091,6 +1094,20 @@ if !MMU
source "arch/arm/Kconfig-nommu"
endif
+config PJ4B_ERRATA_4742
+ bool "PJ4B Errata 4742: IDLE Wake Up Commands can Cause the CPU Core to Cease Operation"
+ depends on CPU_PJ4B && MACH_ARMADA_370
+ default y
+ help
+ When coming out of either a Wait for Interrupt (WFI) or a Wait for
+ Event (WFE) IDLE states, a specific timing sensitivity exists between
+ the retiring WFI/WFE instructions and the newly issued subsequent
+ instructions. This sensitivity can result in a CPU hang scenario.
+ Workaround:
+ The software must insert either a Data Synchronization Barrier (DSB)
+ or Data Memory Barrier (DMB) command immediately after the WFI/WFE
+ instruction
+
config ARM_ERRATA_326103
bool "ARM errata: FSR write bit incorrect on a SWP to read-only memory"
depends on CPU_V6
@@ -1193,6 +1210,16 @@ config PL310_ERRATA_588369
is not correctly implemented in PL310 as clean lines are not
invalidated as a result of these operations.
+config ARM_ERRATA_643719
+ bool "ARM errata: LoUIS bit field in CLIDR register is incorrect"
+ depends on CPU_V7 && SMP
+ help
+ This option enables the workaround for the 643719 Cortex-A9 (prior to
+ r1p0) erratum. On affected cores the LoUIS bit field of the CLIDR
+ register returns zero when it should return one. The workaround
+ corrects this value, ensuring cache maintenance operations which use
+ it behave as intended and avoiding data corruption.
+
config ARM_ERRATA_720789
bool "ARM errata: TLBIASIDIS and TLBIMVAIS operations can broadcast a faulty ASID"
depends on CPU_V7
@@ -1533,7 +1560,7 @@ config NR_CPUS
config HOTPLUG_CPU
bool "Support for hot-pluggable CPUs"
- depends on SMP && HOTPLUG
+ depends on SMP
help
Say Y here to experiment with turning CPUs off and on. CPUs
can be controlled through /sys/devices/system/cpu.
@@ -2012,7 +2039,7 @@ config XIP_PHYS_ADDR
config KEXEC
bool "Kexec system call (EXPERIMENTAL)"
- depends on (!SMP || HOTPLUG_CPU)
+ depends on (!SMP || PM_SLEEP_SMP)
help
kexec is a system call that implements the ability to shutdown your
current kernel, and to start another kernel. It is like a reboot