diff options
Diffstat (limited to 'arch/arm/mach-ks8695')
-rw-r--r-- | arch/arm/mach-ks8695/Kconfig | 61 | ||||
-rw-r--r-- | arch/arm/mach-ks8695/Makefile | 11 | ||||
-rw-r--r-- | arch/arm/mach-ks8695/board-og.c | 199 | ||||
-rw-r--r-- | arch/arm/mach-ks8695/board-sg.c | 121 | ||||
-rw-r--r-- | arch/arm/mach-ks8695/cpu.c | 2 | ||||
-rw-r--r-- | arch/arm/mach-ks8695/devices.c | 21 | ||||
-rw-r--r-- | arch/arm/mach-ks8695/include/mach/devices.h | 5 | ||||
-rw-r--r-- | arch/arm/mach-ks8695/include/mach/hardware.h | 2 | ||||
-rw-r--r-- | arch/arm/mach-ks8695/include/mach/regs-timer.h | 40 | ||||
-rw-r--r-- | arch/arm/mach-ks8695/include/mach/uncompress.h | 6 | ||||
-rw-r--r-- | arch/arm/mach-ks8695/leds.c | 92 | ||||
-rw-r--r-- | arch/arm/mach-ks8695/time.c | 133 |
12 files changed, 484 insertions, 209 deletions
diff --git a/arch/arm/mach-ks8695/Kconfig b/arch/arm/mach-ks8695/Kconfig index f5c39a8..a545976 100644 --- a/arch/arm/mach-ks8695/Kconfig +++ b/arch/arm/mach-ks8695/Kconfig @@ -21,6 +21,67 @@ config MACH_ACS5K say 'Y' here if you want your kernel to run on the Brivo Systems LLC, ACS-5000 Master board. +config MACH_LITE300 + bool "SecureComputing SG300" + help + Say 'Y' here if you want your kernel to support the + SecureComputing / SnapGear SG300 VPN Internet Router. + See http://www.securecomputing.com for more details. + +config MACH_SG310 + bool "McAfee SG310" + help + Say 'Y' here if you want your kernel to support the + McAfee / SnapGear SG310 VPN Internet Router. + See http://www.mcafee.com for more details. + +config MACH_SE4200 + bool "SecureComputing SE4200" + help + Say 'Y' here if you want your kernel to support the + SecureComputing / SnapGear SE4200 Secure Wireless VPN + Internet Router. + See http://www.securecomputing.com for more details. + +config MACH_CM4002 + bool "OpenGear CM4002" + help + Say 'Y' here if you want your kernel to support the OpenGear + CM4002 Secure Access Server. See http://www.opengear.com for + more details. + +config MACH_CM4008 + bool "OpenGear CM4008" + select MIGHT_HAVE_PCI + help + Say 'Y' here if you want your kernel to support the OpenGear + CM4008 Console Server. See http://www.opengear.com for more + details. + +config MACH_CM41xx + bool "OpenGear CM41xx" + select MIGHT_HAVE_PCI + help + Say 'Y' here if you want your kernel to support the OpenGear + CM4016 or CM4048 Console Servers. See http://www.opengear.com for + more details. + +config MACH_IM4004 + bool "OpenGear IM4004" + select MIGHT_HAVE_PCI + help + Say 'Y' here if you want your kernel to support the OpenGear + IM4004 Secure Access Server. See http://www.opengear.com for + more details. + +config MACH_IM42xx + bool "OpenGear IM42xx" + select MIGHT_HAVE_PCI + help + Say 'Y' here if you want your kernel to support the OpenGear + IM4216 or IM4248 Console Servers. See http://www.opengear.com for + more details. + endmenu endif diff --git a/arch/arm/mach-ks8695/Makefile b/arch/arm/mach-ks8695/Makefile index 853efd9..e370caf 100644 --- a/arch/arm/mach-ks8695/Makefile +++ b/arch/arm/mach-ks8695/Makefile @@ -11,10 +11,15 @@ obj- := # PCI support is optional obj-$(CONFIG_PCI) += pci.o -# LEDs -obj-$(CONFIG_LEDS) += leds.o - # Board-specific support obj-$(CONFIG_MACH_KS8695) += board-micrel.o obj-$(CONFIG_MACH_DSM320) += board-dsm320.o obj-$(CONFIG_MACH_ACS5K) += board-acs5k.o +obj-$(CONFIG_MACH_LITE300) += board-sg.o +obj-$(CONFIG_MACH_SG310) += board-sg.o +obj-$(CONFIG_MACH_SE4200) += board-sg.o +obj-$(CONFIG_MACH_CM4002) += board-og.o +obj-$(CONFIG_MACH_CM4008) += board-og.o +obj-$(CONFIG_MACH_CM41xx) += board-og.o +obj-$(CONFIG_MACH_IM4004) += board-og.o +obj-$(CONFIG_MACH_IM42xx) += board-og.o diff --git a/arch/arm/mach-ks8695/board-og.c b/arch/arm/mach-ks8695/board-og.c new file mode 100644 index 0000000..1623ba4 --- /dev/null +++ b/arch/arm/mach-ks8695/board-og.c @@ -0,0 +1,199 @@ +/* + * board-og.c -- support for the OpenGear KS8695 based boards. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#include <linux/kernel.h> +#include <linux/types.h> +#include <linux/interrupt.h> +#include <linux/init.h> +#include <linux/delay.h> +#include <linux/platform_device.h> +#include <linux/serial_8250.h> +#include <linux/gpio.h> +#include <linux/irq.h> +#include <asm/mach-types.h> +#include <asm/mach/arch.h> +#include <asm/mach/map.h> +#include <mach/devices.h> +#include <mach/regs-gpio.h> +#include <mach/gpio-ks8695.h> +#include "generic.h" + +static int og_pci_map_irq(const struct pci_dev *dev, u8 slot, u8 pin) +{ + if (machine_is_im4004() && (slot == 8)) + return KS8695_IRQ_EXTERN1; + return KS8695_IRQ_EXTERN0; +} + +static struct ks8695_pci_cfg __initdata og_pci = { + .mode = KS8695_MODE_PCI, + .map_irq = og_pci_map_irq, +}; + +static void __init og_register_pci(void) +{ + /* Initialize the GPIO lines for interrupt mode */ + ks8695_gpio_interrupt(KS8695_GPIO_0, IRQ_TYPE_LEVEL_LOW); + + /* Cardbus Slot */ + if (machine_is_im4004()) + ks8695_gpio_interrupt(KS8695_GPIO_1, IRQ_TYPE_LEVEL_LOW); + + ks8695_init_pci(&og_pci); +} + +/* + * The PCI bus reset is driven by a dedicated GPIO line. Toggle it here + * and bring the PCI bus out of reset. + */ +static void __init og_pci_bus_reset(void) +{ + unsigned int rstline = 1; + + /* Some boards use a different GPIO as the PCI reset line */ + if (machine_is_im4004()) + rstline = 2; + else if (machine_is_im42xx()) + rstline = 0; + + gpio_request(rstline, "PCI reset"); + gpio_direction_output(rstline, 0); + + /* Drive a reset on the PCI reset line */ + gpio_set_value(rstline, 1); + gpio_set_value(rstline, 0); + mdelay(100); + gpio_set_value(rstline, 1); + mdelay(100); +} + +/* + * Direct connect serial ports (non-PCI that is). + */ +#define S8250_PHYS 0x03800000 +#define S8250_VIRT 0xf4000000 +#define S8250_SIZE 0x00100000 + +static struct __initdata map_desc og_io_desc[] = { + { + .virtual = S8250_VIRT, + .pfn = __phys_to_pfn(S8250_PHYS), + .length = S8250_SIZE, + .type = MT_DEVICE, + } +}; + +static struct resource og_uart_resources[] = { + { + .start = S8250_VIRT, + .end = S8250_VIRT + S8250_SIZE, + .flags = IORESOURCE_MEM + }, +}; + +static struct plat_serial8250_port og_uart_data[] = { + { + .mapbase = S8250_VIRT, + .membase = (char *) S8250_VIRT, + .irq = 3, + .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST, + .iotype = UPIO_MEM, + .regshift = 2, + .uartclk = 115200 * 16, + }, + { }, +}; + +static struct platform_device og_uart = { + .name = "serial8250", + .id = 0, + .dev.platform_data = og_uart_data, + .num_resources = 1, + .resource = og_uart_resources +}; + +static struct platform_device *og_devices[] __initdata = { + &og_uart +}; + +static void __init og_init(void) +{ + ks8695_register_gpios(); + + if (machine_is_cm4002()) { + ks8695_gpio_interrupt(KS8695_GPIO_1, IRQ_TYPE_LEVEL_HIGH); + iotable_init(og_io_desc, ARRAY_SIZE(og_io_desc)); + platform_add_devices(og_devices, ARRAY_SIZE(og_devices)); + } else { + og_pci_bus_reset(); + og_register_pci(); + } + + ks8695_add_device_lan(); + ks8695_add_device_wan(); +} + +#ifdef CONFIG_MACH_CM4002 +MACHINE_START(CM4002, "OpenGear/CM4002") + /* OpenGear Inc. */ + .atag_offset = 0x100, + .map_io = ks8695_map_io, + .init_irq = ks8695_init_irq, + .init_machine = og_init, + .timer = &ks8695_timer, + .restart = ks8695_restart, +MACHINE_END +#endif + +#ifdef CONFIG_MACH_CM4008 +MACHINE_START(CM4008, "OpenGear/CM4008") + /* OpenGear Inc. */ + .atag_offset = 0x100, + .map_io = ks8695_map_io, + .init_irq = ks8695_init_irq, + .init_machine = og_init, + .timer = &ks8695_timer, + .restart = ks8695_restart, +MACHINE_END +#endif + +#ifdef CONFIG_MACH_CM41xx +MACHINE_START(CM41XX, "OpenGear/CM41xx") + /* OpenGear Inc. */ + .atag_offset = 0x100, + .map_io = ks8695_map_io, + .init_irq = ks8695_init_irq, + .init_machine = og_init, + .timer = &ks8695_timer, + .restart = ks8695_restart, +MACHINE_END +#endif + +#ifdef CONFIG_MACH_IM4004 +MACHINE_START(IM4004, "OpenGear/IM4004") + /* OpenGear Inc. */ + .atag_offset = 0x100, + .map_io = ks8695_map_io, + .init_irq = ks8695_init_irq, + .init_machine = og_init, + .timer = &ks8695_timer, + .restart = ks8695_restart, +MACHINE_END +#endif + +#ifdef CONFIG_MACH_IM42xx +MACHINE_START(IM42XX, "OpenGear/IM42xx") + /* OpenGear Inc. */ + .atag_offset = 0x100, + .map_io = ks8695_map_io, + .init_irq = ks8695_init_irq, + .init_machine = og_init, + .timer = &ks8695_timer, + .restart = ks8695_restart, +MACHINE_END +#endif diff --git a/arch/arm/mach-ks8695/board-sg.c b/arch/arm/mach-ks8695/board-sg.c new file mode 100644 index 0000000..f35b98b --- /dev/null +++ b/arch/arm/mach-ks8695/board-sg.c @@ -0,0 +1,121 @@ +/* + * board-sg.c -- support for the SnapGear KS8695 based boards + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#include <linux/kernel.h> +#include <linux/types.h> +#include <linux/init.h> +#include <linux/platform_device.h> +#include <linux/mtd/mtd.h> +#include <linux/mtd/map.h> +#include <linux/mtd/physmap.h> +#include <linux/mtd/partitions.h> +#include <asm/mach-types.h> +#include <asm/mach/arch.h> +#include <mach/devices.h> +#include "generic.h" + +/* + * The SG310 machine type is fitted with a conventional 8MB Strataflash + * device. Define its partitioning. + */ +#define FL_BASE 0x02000000 +#define FL_SIZE SZ_8M + +static struct mtd_partition sg_mtd_partitions[] = { + [0] = { + .name = "SnapGear Boot Loader", + .size = SZ_128K, + }, + [1] = { + .name = "SnapGear non-volatile configuration", + .size = SZ_512K, + .offset = SZ_256K, + }, + [2] = { + .name = "SnapGear image", + .offset = SZ_512K + SZ_256K, + }, + [3] = { + .name = "SnapGear StrataFlash", + }, + [4] = { + .name = "SnapGear Boot Tags", + .size = SZ_128K, + .offset = SZ_128K, + }, +}; + +static struct physmap_flash_data sg_mtd_pdata = { + .width = 1, + .nr_parts = ARRAY_SIZE(sg_mtd_partitions), + .parts = sg_mtd_partitions, +}; + + +static struct resource sg_mtd_resource[] = { + [0] = { + .start = FL_BASE, + .end = FL_BASE + FL_SIZE - 1, + .flags = IORESOURCE_MEM, + }, +}; + +static struct platform_device sg_mtd_device = { + .name = "physmap-flash", + .id = 0, + .num_resources = ARRAY_SIZE(sg_mtd_resource), + .resource = sg_mtd_resource, + .dev = { + .platform_data = &sg_mtd_pdata, + }, +}; + +static void __init sg_init(void) +{ + ks8695_add_device_lan(); + ks8695_add_device_wan(); + + if (machine_is_sg310()) + platform_device_register(&sg_mtd_device); +} + +#ifdef CONFIG_MACH_LITE300 +MACHINE_START(LITE300, "SecureComputing/SG300") + /* SnapGear */ + .atag_offset = 0x100, + .map_io = ks8695_map_io, + .init_irq = ks8695_init_irq, + .init_machine = sg_init, + .timer = &ks8695_timer, + .restart = ks8695_restart, +MACHINE_END +#endif + +#ifdef CONFIG_MACH_SG310 +MACHINE_START(SG310, "McAfee/SG310") + /* SnapGear */ + .atag_offset = 0x100, + .map_io = ks8695_map_io, + .init_irq = ks8695_init_irq, + .init_machine = sg_init, + .timer = &ks8695_timer, + .restart = ks8695_restart, +MACHINE_END +#endif + +#ifdef CONFIG_MACH_SE4200 +MACHINE_START(SE4200, "SecureComputing/SE4200") + /* SnapGear */ + .atag_offset = 0x100, + .map_io = ks8695_map_io, + .init_irq = ks8695_init_irq, + .init_machine = sg_init, + .timer = &ks8695_timer, + .restart = ks8695_restart, +MACHINE_END +#endif diff --git a/arch/arm/mach-ks8695/cpu.c b/arch/arm/mach-ks8695/cpu.c index 7f3f240..ddb2422 100644 --- a/arch/arm/mach-ks8695/cpu.c +++ b/arch/arm/mach-ks8695/cpu.c @@ -36,7 +36,7 @@ static struct __initdata map_desc ks8695_io_desc[] = { { - .virtual = KS8695_IO_VA, + .virtual = (unsigned long)KS8695_IO_VA, .pfn = __phys_to_pfn(KS8695_IO_PA), .length = KS8695_IO_SIZE, .type = MT_DEVICE, diff --git a/arch/arm/mach-ks8695/devices.c b/arch/arm/mach-ks8695/devices.c index 73bd638..47399bc 100644 --- a/arch/arm/mach-ks8695/devices.c +++ b/arch/arm/mach-ks8695/devices.c @@ -182,27 +182,6 @@ static void __init ks8695_add_device_watchdog(void) } -/* -------------------------------------------------------------------- - * LEDs - * -------------------------------------------------------------------- */ - -#if defined(CONFIG_LEDS) -short ks8695_leds_cpu = -1; -short ks8695_leds_timer = -1; - -void __init ks8695_init_leds(u8 cpu_led, u8 timer_led) -{ - /* Enable GPIO to access the LEDs */ - gpio_direction_output(cpu_led, 1); - gpio_direction_output(timer_led, 1); - - ks8695_leds_cpu = cpu_led; - ks8695_leds_timer = timer_led; -} -#else -void __init ks8695_init_leds(u8 cpu_led, u8 timer_led) {} -#endif - /* -------------------------------------------------------------------- */ /* diff --git a/arch/arm/mach-ks8695/include/mach/devices.h b/arch/arm/mach-ks8695/include/mach/devices.h index 85a3c9a..1e6594a 100644 --- a/arch/arm/mach-ks8695/include/mach/devices.h +++ b/arch/arm/mach-ks8695/include/mach/devices.h @@ -18,11 +18,6 @@ extern void __init ks8695_add_device_wan(void); extern void __init ks8695_add_device_lan(void); extern void __init ks8695_add_device_hpna(void); - /* LEDs */ -extern short ks8695_leds_cpu; -extern short ks8695_leds_timer; -extern void __init ks8695_init_leds(u8 cpu_led, u8 timer_led); - /* PCI */ #define KS8695_MODE_PCI 0 #define KS8695_MODE_MINIPCI 1 diff --git a/arch/arm/mach-ks8695/include/mach/hardware.h b/arch/arm/mach-ks8695/include/mach/hardware.h index 5e0c388..5090338 100644 --- a/arch/arm/mach-ks8695/include/mach/hardware.h +++ b/arch/arm/mach-ks8695/include/mach/hardware.h @@ -33,7 +33,7 @@ * head debug code as the initial MMU setup only deals in L1 sections. */ #define KS8695_IO_PA 0x03F00000 -#define KS8695_IO_VA 0xF0000000 +#define KS8695_IO_VA IOMEM(0xF0000000) #define KS8695_IO_SIZE SZ_1M #define KS8695_PCIMEM_PA 0x60000000 diff --git a/arch/arm/mach-ks8695/include/mach/regs-timer.h b/arch/arm/mach-ks8695/include/mach/regs-timer.h deleted file mode 100644 index e620cda..0000000 --- a/arch/arm/mach-ks8695/include/mach/regs-timer.h +++ /dev/null @@ -1,40 +0,0 @@ -/* - * arch/arm/mach-ks8695/include/mach/regs-timer.h - * - * Copyright (C) 2006 Ben Dooks <ben@simtec.co.uk> - * Copyright (C) 2006 Simtec Electronics - * - * KS8695 - Timer registers and bit definitions. - * - * This file is licensed under the terms of the GNU General Public - * License version 2. This program is licensed "as is" without any - * warranty of any kind, whether express or implied. - */ - -#ifndef KS8695_TIMER_H -#define KS8695_TIMER_H - -#define KS8695_TMR_OFFSET (0xF0000 + 0xE400) -#define KS8695_TMR_VA (KS8695_IO_VA + KS8695_TMR_OFFSET) -#define KS8695_TMR_PA (KS8695_IO_PA + KS8695_TMR_OFFSET) - - -/* - * Timer registers - */ -#define KS8695_TMCON (0x00) /* Timer Control Register */ -#define KS8695_T1TC (0x04) /* Timer 1 Timeout Count Register */ -#define KS8695_T0TC (0x08) /* Timer 0 Timeout Count Register */ -#define KS8695_T1PD (0x0C) /* Timer 1 Pulse Count Register */ -#define KS8695_T0PD (0x10) /* Timer 0 Pulse Count Register */ - - -/* Timer Control Register */ -#define TMCON_T1EN (1 << 1) /* Timer 1 Enable */ -#define TMCON_T0EN (1 << 0) /* Timer 0 Enable */ - -/* Timer0 Timeout Counter Register */ -#define T0TC_WATCHDOG (0xff) /* Enable watchdog mode */ - - -#endif diff --git a/arch/arm/mach-ks8695/include/mach/uncompress.h b/arch/arm/mach-ks8695/include/mach/uncompress.h index 9495cb4..8879d61 100644 --- a/arch/arm/mach-ks8695/include/mach/uncompress.h +++ b/arch/arm/mach-ks8695/include/mach/uncompress.h @@ -19,15 +19,15 @@ static void putc(char c) { - while (!(__raw_readl(KS8695_UART_PA + KS8695_URLS) & URLS_URTHRE)) + while (!(__raw_readl((void __iomem*)KS8695_UART_PA + KS8695_URLS) & URLS_URTHRE)) barrier(); - __raw_writel(c, KS8695_UART_PA + KS8695_URTH); + __raw_writel(c, (void __iomem*)KS8695_UART_PA + KS8695_URTH); } static inline void flush(void) { - while (!(__raw_readl(KS8695_UART_PA + KS8695_URLS) & URLS_URTE)) + while (!(__raw_readl((void __iomem*)KS8695_UART_PA + KS8695_URLS) & URLS_URTE)) barrier(); } diff --git a/arch/arm/mach-ks8695/leds.c b/arch/arm/mach-ks8695/leds.c deleted file mode 100644 index 4bd7075..0000000 --- a/arch/arm/mach-ks8695/leds.c +++ /dev/null @@ -1,92 +0,0 @@ -/* - * LED driver for KS8695-based boards. - * - * Copyright (C) Andrew Victor - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ -#include <linux/gpio.h> -#include <linux/kernel.h> -#include <linux/module.h> -#include <linux/init.h> - -#include <asm/leds.h> -#include <mach/devices.h> - - -static inline void ks8695_led_on(unsigned int led) -{ - gpio_set_value(led, 0); -} - -static inline void ks8695_led_off(unsigned int led) -{ - gpio_set_value(led, 1); -} - -static inline void ks8695_led_toggle(unsigned int led) -{ - unsigned long is_off = gpio_get_value(led); - if (is_off) - ks8695_led_on(led); - else - ks8695_led_off(led); -} - - -/* - * Handle LED events. - */ -static void ks8695_leds_event(led_event_t evt) -{ - unsigned long flags; - - local_irq_save(flags); - - switch(evt) { - case led_start: /* System startup */ - ks8695_led_on(ks8695_leds_cpu); - break; - - case led_stop: /* System stop / suspend */ - ks8695_led_off(ks8695_leds_cpu); - break; - -#ifdef CONFIG_LEDS_TIMER - case led_timer: /* Every 50 timer ticks */ - ks8695_led_toggle(ks8695_leds_timer); - break; -#endif - -#ifdef CONFIG_LEDS_CPU - case led_idle_start: /* Entering idle state */ - ks8695_led_off(ks8695_leds_cpu); - break; - - case led_idle_end: /* Exit idle state */ - ks8695_led_on(ks8695_leds_cpu); - break; -#endif - - default: - break; - } - - local_irq_restore(flags); -} - - -static int __init leds_init(void) -{ - if ((ks8695_leds_timer == -1) || (ks8695_leds_cpu == -1)) - return -ENODEV; - - leds_event = ks8695_leds_event; - - leds_event(led_start); - return 0; -} - -__initcall(leds_init); diff --git a/arch/arm/mach-ks8695/time.c b/arch/arm/mach-ks8695/time.c index ec783a3..46c84bc 100644 --- a/arch/arm/mach-ks8695/time.c +++ b/arch/arm/mach-ks8695/time.c @@ -25,53 +25,98 @@ #include <linux/kernel.h> #include <linux/sched.h> #include <linux/io.h> +#include <linux/clockchips.h> #include <asm/mach/time.h> #include <asm/system_misc.h> -#include <mach/regs-timer.h> #include <mach/regs-irq.h> #include "generic.h" +#define KS8695_TMR_OFFSET (0xF0000 + 0xE400) +#define KS8695_TMR_VA (KS8695_IO_VA + KS8695_TMR_OFFSET) +#define KS8695_TMR_PA (KS8695_IO_PA + KS8695_TMR_OFFSET) + /* - * Returns number of ms since last clock interrupt. Note that interrupts - * will have been disabled by do_gettimeoffset() + * Timer registers */ -static unsigned long ks8695_gettimeoffset (void) +#define KS8695_TMCON (0x00) /* Timer Control Register */ +#define KS8695_T1TC (0x04) /* Timer 1 Timeout Count Register */ +#define KS8695_T0TC (0x08) /* Timer 0 Timeout Count Register */ +#define KS8695_T1PD (0x0C) /* Timer 1 Pulse Count Register */ +#define KS8695_T0PD (0x10) /* Timer 0 Pulse Count Register */ + +/* Timer Control Register */ +#define TMCON_T1EN (1 << 1) /* Timer 1 Enable */ +#define TMCON_T0EN (1 << 0) /* Timer 0 Enable */ + +/* Timer0 Timeout Counter Register */ +#define T0TC_WATCHDOG (0xff) /* Enable watchdog mode */ + +static void ks8695_set_mode(enum clock_event_mode mode, + struct clock_event_device *evt) { - unsigned long elapsed, tick2, intpending; + u32 tmcon; - /* - * Get the current number of ticks. Note that there is a race - * condition between us reading the timer and checking for an - * interrupt. We solve this by ensuring that the counter has not - * reloaded between our two reads. - */ - elapsed = __raw_readl(KS8695_TMR_VA + KS8695_T1TC) + __raw_readl(KS8695_TMR_VA + KS8695_T1PD); - do { - tick2 = elapsed; - intpending = __raw_readl(KS8695_IRQ_VA + KS8695_INTST) & (1 << KS8695_IRQ_TIMER1); - elapsed = __raw_readl(KS8695_TMR_VA + KS8695_T1TC) + __raw_readl(KS8695_TMR_VA + KS8695_T1PD); - } while (elapsed > tick2); - - /* Convert to number of ticks expired (not remaining) */ - elapsed = (CLOCK_TICK_RATE / HZ) - elapsed; - - /* Is interrupt pending? If so, then timer has been reloaded already. */ - if (intpending) - elapsed += (CLOCK_TICK_RATE / HZ); - - /* Convert ticks to usecs */ - return (unsigned long)(elapsed * (tick_nsec / 1000)) / LATCH; + if (mode == CLOCK_EVT_FEAT_PERIODIC) { + u32 rate = DIV_ROUND_CLOSEST(KS8695_CLOCK_RATE, HZ); + u32 half = DIV_ROUND_CLOSEST(rate, 2); + + /* Disable timer 1 */ + tmcon = readl_relaxed(KS8695_TMR_VA + KS8695_TMCON); + tmcon &= ~TMCON_T1EN; + writel_relaxed(tmcon, KS8695_TMR_VA + KS8695_TMCON); + + /* Both registers need to count down */ + writel_relaxed(half, KS8695_TMR_VA + KS8695_T1TC); + writel_relaxed(half, KS8695_TMR_VA + KS8695_T1PD); + + /* Re-enable timer1 */ + tmcon |= TMCON_T1EN; + writel_relaxed(tmcon, KS8695_TMR_VA + KS8695_TMCON); + } } +static int ks8695_set_next_event(unsigned long cycles, + struct clock_event_device *evt) + +{ + u32 half = DIV_ROUND_CLOSEST(cycles, 2); + u32 tmcon; + + /* Disable timer 1 */ + tmcon = readl_relaxed(KS8695_TMR_VA + KS8695_TMCON); + tmcon &= ~TMCON_T1EN; + writel_relaxed(tmcon, KS8695_TMR_VA + KS8695_TMCON); + + /* Both registers need to count down */ + writel_relaxed(half, KS8695_TMR_VA + KS8695_T1TC); + writel_relaxed(half, KS8695_TMR_VA + KS8695_T1PD); + + /* Re-enable timer1 */ + tmcon |= TMCON_T1EN; + writel_relaxed(tmcon, KS8695_TMR_VA + KS8695_TMCON); + + return 0; +} + +static struct clock_event_device clockevent_ks8695 = { + .name = "ks8695_t1tc", + .rating = 300, /* Reasonably fast and accurate clock event */ + .features = CLOCK_EVT_FEAT_ONESHOT | CLOCK_EVT_FEAT_PERIODIC, + .set_next_event = ks8695_set_next_event, + .set_mode = ks8695_set_mode, +}; + /* * IRQ handler for the timer. */ static irqreturn_t ks8695_timer_interrupt(int irq, void *dev_id) { - timer_tick(); + struct clock_event_device *evt = &clockevent_ks8695; + + evt->event_handler(evt); return IRQ_HANDLED; } @@ -83,18 +128,22 @@ static struct irqaction ks8695_timer_irq = { static void ks8695_timer_setup(void) { - unsigned long tmout = CLOCK_TICK_RATE / HZ; unsigned long tmcon; - /* disable timer1 */ - tmcon = __raw_readl(KS8695_TMR_VA + KS8695_TMCON); - __raw_writel(tmcon & ~TMCON_T1EN, KS8695_TMR_VA + KS8695_TMCON); - - __raw_writel(tmout / 2, KS8695_TMR_VA + KS8695_T1TC); - __raw_writel(tmout / 2, KS8695_TMR_VA + KS8695_T1PD); + /* Disable timer 0 and 1 */ + tmcon = readl_relaxed(KS8695_TMR_VA + KS8695_TMCON); + tmcon &= ~TMCON_T0EN; + tmcon &= ~TMCON_T1EN; + writel_relaxed(tmcon, KS8695_TMR_VA + KS8695_TMCON); - /* re-enable timer1 */ - __raw_writel(tmcon | TMCON_T1EN, KS8695_TMR_VA + KS8695_TMCON); + /* + * Use timer 1 to fire IRQs on the timeline, minimum 2 cycles + * (one on each counter) maximum 2*2^32, but the API will only + * accept up to a 32bit full word (0xFFFFFFFFU). + */ + clockevents_config_and_register(&clockevent_ks8695, + KS8695_CLOCK_RATE, 2, + 0xFFFFFFFFU); } static void __init ks8695_timer_init (void) @@ -107,8 +156,6 @@ static void __init ks8695_timer_init (void) struct sys_timer ks8695_timer = { .init = ks8695_timer_init, - .offset = ks8695_gettimeoffset, - .resume = ks8695_timer_setup, }; void ks8695_restart(char mode, const char *cmd) @@ -119,12 +166,12 @@ void ks8695_restart(char mode, const char *cmd) soft_restart(0); /* disable timer0 */ - reg = __raw_readl(KS8695_TMR_VA + KS8695_TMCON); - __raw_writel(reg & ~TMCON_T0EN, KS8695_TMR_VA + KS8695_TMCON); + reg = readl_relaxed(KS8695_TMR_VA + KS8695_TMCON); + writel_relaxed(reg & ~TMCON_T0EN, KS8695_TMR_VA + KS8695_TMCON); /* enable watchdog mode */ - __raw_writel((10 << 8) | T0TC_WATCHDOG, KS8695_TMR_VA + KS8695_T0TC); + writel_relaxed((10 << 8) | T0TC_WATCHDOG, KS8695_TMR_VA + KS8695_T0TC); /* re-enable timer0 */ - __raw_writel(reg | TMCON_T0EN, KS8695_TMR_VA + KS8695_TMCON); + writel_relaxed(reg | TMCON_T0EN, KS8695_TMR_VA + KS8695_TMCON); } |