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Diffstat (limited to 'arch/arm/mach-sti/platsmp.c')
-rw-r--r--arch/arm/mach-sti/platsmp.c10
1 files changed, 5 insertions, 5 deletions
diff --git a/arch/arm/mach-sti/platsmp.c b/arch/arm/mach-sti/platsmp.c
index c05b764..dce50d9 100644
--- a/arch/arm/mach-sti/platsmp.c
+++ b/arch/arm/mach-sti/platsmp.c
@@ -35,7 +35,7 @@ static void write_pen_release(int val)
outer_clean_range(__pa(&pen_release), __pa(&pen_release + 1));
}
-static DEFINE_RAW_SPINLOCK(boot_lock);
+static DEFINE_SPINLOCK(boot_lock);
void sti_secondary_init(unsigned int cpu)
{
@@ -50,8 +50,8 @@ void sti_secondary_init(unsigned int cpu)
/*
* Synchronise with the boot thread.
*/
- raw_spin_lock(&boot_lock);
- raw_spin_unlock(&boot_lock);
+ spin_lock(&boot_lock);
+ spin_unlock(&boot_lock);
}
int sti_boot_secondary(unsigned int cpu, struct task_struct *idle)
@@ -62,7 +62,7 @@ int sti_boot_secondary(unsigned int cpu, struct task_struct *idle)
* set synchronisation state between this boot processor
* and the secondary one
*/
- raw_spin_lock(&boot_lock);
+ spin_lock(&boot_lock);
/*
* The secondary processor is waiting to be released from
@@ -93,7 +93,7 @@ int sti_boot_secondary(unsigned int cpu, struct task_struct *idle)
* now the secondary core is starting up let it run its
* calibrations, then wait for it to finish
*/
- raw_spin_unlock(&boot_lock);
+ spin_unlock(&boot_lock);
return pen_release != -1 ? -ENOSYS : 0;
}