diff options
Diffstat (limited to 'arch/blackfin')
| -rw-r--r-- | arch/blackfin/kernel/setup.c | 5 | ||||
| -rw-r--r-- | arch/blackfin/mach-bf533/head.S | 243 |
2 files changed, 0 insertions, 248 deletions
diff --git a/arch/blackfin/kernel/setup.c b/arch/blackfin/kernel/setup.c index 448e6aa..dfc464d 100644 --- a/arch/blackfin/kernel/setup.c +++ b/arch/blackfin/kernel/setup.c @@ -192,11 +192,6 @@ void __init setup_arch(char **cmdline_p) } #endif -#ifdef DEBUG_SERIAL_EARLY_INIT - bfin_console_init(); /* early console registration */ - /* this give a chance to get printk() working before crash. */ -#endif - printk(KERN_INFO "Hardware Trace "); if (bfin_read_TBUFCTL() & 0x1 ) printk("Active "); diff --git a/arch/blackfin/mach-bf533/head.S b/arch/blackfin/mach-bf533/head.S index 6e1b5f6..fa6dc0d 100644 --- a/arch/blackfin/mach-bf533/head.S +++ b/arch/blackfin/mach-bf533/head.S @@ -35,9 +35,6 @@ #include <asm/mach-common/clocks.h> #include <asm/mach/mem_init.h> #endif -#if CONFIG_DEBUG_KERNEL_START -#include <asm/mach-common/def_LPBlackfin.h> -#endif .global __rambase .global __ramstart @@ -104,36 +101,6 @@ ENTRY(__start) P0 = R1; R0 = R1; -#if CONFIG_DEBUG_KERNEL_START - -/* - * Set up a temporary Event Vector Table, so if something bad happens before - * the kernel is fully started, it doesn't vector off into the bootloaders - * table - */ - P0.l = lo(EVT2); - P0.h = hi(EVT2); - P1.l = lo(EVT15); - P1.h = hi(EVT15); - P2.l = debug_kernel_start_trap; - P2.h = debug_kernel_start_trap; - - RTS = P2; - RTI = P2; - RTX = P2; - RTN = P2; - RTE = P2; - -.Lfill_temp_vector_table: - [P0++] = P2; /* Core Event Vector Table */ - CC = P0 == P1; - if !CC JUMP .Lfill_temp_vector_table - P0 = r0; - P1 = r0; - P2 = r0; - -#endif - p0.h = hi(FIO_MASKA_C); p0.l = lo(FIO_MASKA_C); r0 = 0xFFFF(Z); @@ -459,216 +426,6 @@ ENTRY(_start_dma_code) ENDPROC(_start_dma_code) #endif /* CONFIG_BFIN_KERNEL_CLOCK */ -#if CONFIG_DEBUG_KERNEL_START -debug_kernel_start_trap: - /* Set up a temp stack in L1 - SDRAM might not be working */ - P0.L = lo(L1_DATA_A_START + 0x100); - P0.H = hi(L1_DATA_A_START + 0x100); - SP = P0; - - /* Make sure the Clocks are the way I think they should be */ - r0 = CONFIG_VCO_MULT & 63; /* Load the VCO multiplier */ - r0 = r0 << 9; /* Shift it over, */ - r1 = CLKIN_HALF; /* Do we need to divide CLKIN by 2?*/ - r0 = r1 | r0; - r1 = PLL_BYPASS; /* Bypass the PLL? */ - r1 = r1 << 8; /* Shift it over */ - r0 = r1 | r0; /* add them all together */ - - p0.h = hi(PLL_CTL); - p0.l = lo(PLL_CTL); /* Load the address */ - cli r2; /* Disable interrupts */ - ssync; - w[p0] = r0.l; /* Set the value */ - idle; /* Wait for the PLL to stablize */ - sti r2; /* Enable interrupts */ - -.Lcheck_again1: - p0.h = hi(PLL_STAT); - p0.l = lo(PLL_STAT); - R0 = W[P0](Z); - CC = BITTST(R0,5); - if ! CC jump .Lcheck_again1; - - /* Configure SCLK & CCLK Dividers */ - r0 = (CONFIG_CCLK_ACT_DIV | CONFIG_SCLK_DIV); - p0.h = hi(PLL_DIV); - p0.l = lo(PLL_DIV); - w[p0] = r0.l; - ssync; - - /* Make sure UART is enabled - you can never be sure */ - -/* - * Setup for console. Argument comes from the menuconfig - */ - -#ifdef CONFIG_BAUD_9600 -#define CONSOLE_BAUD_RATE 9600 -#elif CONFIG_BAUD_19200 -#define CONSOLE_BAUD_RATE 19200 -#elif CONFIG_BAUD_38400 -#define CONSOLE_BAUD_RATE 38400 -#elif CONFIG_BAUD_57600 -#define CONSOLE_BAUD_RATE 57600 -#elif CONFIG_BAUD_115200 -#define CONSOLE_BAUD_RATE 115200 -#endif - - p0.h = hi(UART_GCTL); - p0.l = lo(UART_GCTL); - r0 = 0x00(Z); - w[p0] = r0.L; /* To Turn off UART clocks */ - ssync; - - p0.h = hi(UART_LCR); - p0.l = lo(UART_LCR); - r0 = 0x83(Z); - w[p0] = r0.L; /* To enable DLL writes */ - ssync; - - R1 = (((CONFIG_CLKIN_HZ * CONFIG_VCO_MULT) / CONFIG_SCLK_DIV) / (CONSOLE_BAUD_RATE * 16)); - - p0.h = hi(UART_DLL); - p0.l = lo(UART_DLL); - r0 = 0xFF(Z); - r0 = R1 & R0; - w[p0] = r0.L; - ssync; - - p0.h = hi(UART_DLH); - p0.l = lo(UART_DLH); - r1 >>= 8 ; - w[p0] = r1.L; - ssync; - - p0.h = hi(UART_GCTL); - p0.l = lo(UART_GCTL); - r0 = 0x0(Z); - w[p0] = r0.L; /* To enable UART clock */ - ssync; - - p0.h = hi(UART_LCR); - p0.l = lo(UART_LCR); - r0 = 0x03(Z); - w[p0] = r0.L; /* To Turn on UART */ - ssync; - - p0.h = hi(UART_GCTL); - p0.l = lo(UART_GCTL); - r0 = 0x01(Z); - w[p0] = r0.L; /* To Turn on UART Clocks */ - ssync; - - P0.h = hi(UART_THR); - P0.l = lo(UART_THR); - P1.h = hi(UART_LSR); - P1.l = lo(UART_LSR); - - R0.L = 'K'; - call .Lwait_char; - R0.L='e'; - call .Lwait_char; - R0.L='r'; - call .Lwait_char; - R0.L='n' - call .Lwait_char; - R0.L='e' - call .Lwait_char; - R0.L='l'; - call .Lwait_char; - R0.L=' '; - call .Lwait_char; - R0.L='c'; - call .Lwait_char; - R0.L='r'; - call .Lwait_char; - R0.L='a'; - call .Lwait_char; - R0.L='s'; - call .Lwait_char; - R0.L='h'; - call .Lwait_char; - R0.L='\r'; - call .Lwait_char; - R0.L='\n'; - call .Lwait_char; - - R0.L='S'; - call .Lwait_char; - R0.L='E'; - call .Lwait_char; - R0.L='Q' - call .Lwait_char; - R0.L='S' - call .Lwait_char; - R0.L='T'; - call .Lwait_char; - R0.L='A'; - call .Lwait_char; - R0.L='T'; - call .Lwait_char; - R0.L='='; - call .Lwait_char; - R2 = SEQSTAT; - call .Ldump_reg; - - R0.L=' '; - call .Lwait_char; - R0.L='R'; - call .Lwait_char; - R0.L='E' - call .Lwait_char; - R0.L='T' - call .Lwait_char; - R0.L='X'; - call .Lwait_char; - R0.L='='; - call .Lwait_char; - R2 = RETX; - call .Ldump_reg; - - R0.L='\r'; - call .Lwait_char; - R0.L='\n'; - call .Lwait_char; - -.Ldebug_kernel_start_trap_done: - JUMP .Ldebug_kernel_start_trap_done; -.Ldump_reg: - R3 = 32; - R4 = 0x0F; - R5 = ':'; /* one past 9 */ - -.Ldump_reg2: - R0 = R2; - R3 += -4; - R0 >>>= R3; - R0 = R0 & R4; - R0 += 0x30; - CC = R0 <= R5; - if CC JUMP .Ldump_reg1; - R0 += 7; - -.Ldump_reg1: - R1.l = W[P1]; - CC = BITTST(R1, 5); - if !CC JUMP .Ldump_reg1; - W[P0] = r0; - - CC = R3 == 0; - if !CC JUMP .Ldump_reg2 - RTS; - -.Lwait_char: - R1.l = W[P1]; - CC = BITTST(R1, 5); - if !CC JUMP .Lwait_char; - W[P0] = r0; - RTS; - -#endif /* CONFIG_DEBUG_KERNEL_START */ - .data /* |