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-rw-r--r--arch/powerpc/boot/dts/t4240qds.dts468
1 files changed, 467 insertions, 1 deletions
diff --git a/arch/powerpc/boot/dts/t4240qds.dts b/arch/powerpc/boot/dts/t4240qds.dts
index 0555976..1781d02 100644
--- a/arch/powerpc/boot/dts/t4240qds.dts
+++ b/arch/powerpc/boot/dts/t4240qds.dts
@@ -41,6 +41,36 @@
#size-cells = <2>;
interrupt-parent = <&mpic>;
+ aliases {
+ phy_rgmii1 = &phyrgmii1;
+ phy_rgmii2 = &phyrgmii2;
+ phy_sgmii3 = &phy3;
+ phy_sgmii4 = &phy4;
+ phy_sgmii11 = &phy11;
+ phy_sgmii12 = &phy12;
+ sgmii_phy11 = &sgmiiphy11;
+ sgmii_phy12 = &sgmiiphy12;
+ sgmii_phy13 = &sgmiiphy13;
+ sgmii_phy14 = &sgmiiphy14;
+ sgmii_phy21 = &sgmiiphy21;
+ sgmii_phy22 = &sgmiiphy22;
+ sgmii_phy23 = &sgmiiphy23;
+ sgmii_phy24 = &sgmiiphy24;
+ sgmii_phy31 = &sgmiiphy31;
+ sgmii_phy32 = &sgmiiphy32;
+ sgmii_phy33 = &sgmiiphy33;
+ sgmii_phy34 = &sgmiiphy34;
+ sgmii_phy41 = &sgmiiphy41;
+ sgmii_phy42 = &sgmiiphy42;
+ sgmii_phy43 = &sgmiiphy43;
+ sgmii_phy44 = &sgmiiphy44;
+ emi1_rgmii = &t4240mdio0;
+ emi1_slot1 = &t4240mdio1;
+ emi1_slot2 = &t4240mdio2;
+ emi1_slot3 = &t4240mdio3;
+ emi1_slot4 = &t4240mdio4;
+ };
+
ifc: localbus@ffe124000 {
reg = <0xf 0xfe124000 0 0x2000>;
ranges = <0 0 0xf 0xe8000000 0x08000000
@@ -91,8 +121,165 @@
};
board-control@3,0 {
- compatible = "fsl,t4240qds-fpga", "fsl,fpga-qixis";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "fsl,tetra-fpga", "fsl,fpga-qixis";
reg = <3 0 0x300>;
+ ranges = <0 3 0 0x300>;
+
+ mdio-mux-emi1 {
+ compatible = "mdio-mux-mmioreg", "mdio-mux";
+ mdio-parent-bus = <&mdio0>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0x54 1>; // BRDCFG1
+ mux-mask = <0xe0>; // EMI1
+
+ /* Onboard PHYs */
+ t4240mdio0: mdio@0 {
+ reg = <0>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ phyrgmii1: ethernet-phy@1 { /* FM2.5 */
+ reg = <0x1>;
+ };
+ phyrgmii2: ethernet-phy@2 { /* FM1.5 */
+ reg = <0x2>;
+ };
+ };
+
+ /* Slot 1 */
+ t4240mdio1: mdio@20 {
+ reg = <0x20>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+
+ phy1: ethernet-phy@0 {
+ reg = <0x0>;
+ };
+ phy2: ethernet-phy@1 {
+ reg = <0x1>;
+ };
+ phy3: ethernet-phy@2 {
+ reg = <0x2>;
+ };
+ phy4: ethernet-phy@3 {
+ reg = <0x3>;
+ };
+ sgmiiphy11: ethernet-phy@1c {
+ reg = <0x1c>;
+ };
+ sgmiiphy12: ethernet-phy@1d {
+ reg = <0x1d>;
+ };
+ sgmiiphy13: ethernet-phy@1e {
+ reg = <0x1e>;
+ };
+ sgmiiphy14: ethernet-phy@1f {
+ reg = <0x1f>;
+ };
+ };
+
+ /* Slot 2 */
+ t4240mdio2: mdio@40 {
+ reg = <0x40>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+
+ phy5: ethernet-phy@4 {
+ reg = <0x4>;
+ };
+ phy6: ethernet-phy@5 {
+ reg = <0x5>;
+ };
+ phy7: ethernet-phy@6 {
+ reg = <0x6>;
+ };
+ phy8: ethernet-phy@7 {
+ reg = <0x7>;
+ };
+ sgmiiphy21: ethernet-phy@1c {
+ reg = <0x1c>;
+ };
+ sgmiiphy22: ethernet-phy@1d {
+ reg = <0x1d>;
+ };
+ sgmiiphy23: ethernet-phy@1e {
+ reg = <0x1e>;
+ };
+ sgmiiphy24: ethernet-phy@1f {
+ reg = <0x1f>;
+ };
+ };
+
+ /* Slot 3 */
+ t4240mdio3: mdio@60 {
+ reg = <0x60>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+
+ phy9: ethernet-phy@8 {
+ reg = <0x8>;
+ };
+ phy10: ethernet-phy@9 {
+ reg = <0x9>;
+ };
+ phy11: ethernet-phy@a {
+ reg = <0xa>;
+ };
+ phy12: ethernet-phy@b {
+ reg = <0xb>;
+ };
+ sgmiiphy31: ethernet-phy@1c {
+ reg = <0x1c>;
+ };
+ sgmiiphy32: ethernet-phy@1d {
+ reg = <0x1d>;
+ };
+ sgmiiphy33: ethernet-phy@1e {
+ reg = <0x1e>;
+ };
+ sgmiiphy34: ethernet-phy@1f {
+ reg = <0x1f>;
+ };
+ };
+
+ t4240mdio4: mdio@80 {
+ reg = <0x80>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+
+ phy13: ethernet-phy@c {
+ reg = <0xc>;
+ };
+ phy14: ethernet-phy@d {
+ reg = <0xd>;
+ };
+ phy15: ethernet-phy@e {
+ reg = <0xe>;
+ };
+ phy16: ethernet-phy@f {
+ reg = <0xf>;
+ };
+ sgmiiphy41: ethernet-phy@1c {
+ reg = <0x1c>;
+ };
+ sgmiiphy42: ethernet-phy@1d {
+ reg = <0x1d>;
+ };
+ sgmiiphy43: ethernet-phy@1e {
+ reg = <0x1e>;
+ };
+ sgmiiphy44: ethernet-phy@1f {
+ reg = <0x1f>;
+ };
+ };
+ };
};
};
@@ -104,6 +291,18 @@
ranges = <0x00000000 0xf 0x00000000 0x01072000>;
};
+ bportals: bman-portals@ff4000000 {
+ ranges = <0x0 0xf 0xf4000000 0x2000000>;
+ };
+
+ qportals: qman-portals@ff6000000 {
+ ranges = <0x0 0xf 0xf6000000 0x2000000>;
+ };
+
+ lportals: lac-portals@ff8000000 {
+ ranges = <0x0 0xf 0xf8000000 0x20000>;
+ };
+
soc: soc@ffe000000 {
ranges = <0x00000000 0xf 0xfe000000 0x1000000>;
reg = <0xf 0xfe000000 0 0x00001000>;
@@ -118,6 +317,54 @@
};
i2c@118000 {
+ pca9547@77 {
+ compatible = "philips,pca9547";
+ reg = <0x77>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ i2c@2 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0x2>;
+
+ ina220@40 {
+ compatible = "ti,ina220";
+ reg = <0x40>;
+ shunt-resistor = <1000>;
+ };
+
+ ina220@41 {
+ compatible = "ti,ina220";
+ reg = <0x41>;
+ shunt-resistor = <1000>;
+ };
+
+ ina220@44 {
+ compatible = "ti,ina220";
+ reg = <0x44>;
+ shunt-resistor = <1000>;
+ };
+
+ ina220@45 {
+ compatible = "ti,ina220";
+ reg = <0x45>;
+ shunt-resistor = <1000>;
+ };
+
+ ina220@46 {
+ compatible = "ti,ina220";
+ reg = <0x46>;
+ shunt-resistor = <1000>;
+ };
+
+ ina220@47 {
+ compatible = "ti,ina220";
+ reg = <0x47>;
+ shunt-resistor = <1000>;
+ };
+ };
+ };
eeprom@51 {
compatible = "at24,24c256";
reg = <0x51>;
@@ -148,6 +395,156 @@
interrupts = <0x1 0x1 0 0>;
};
};
+
+ fman0: fman@400000 {
+ enet0: ethernet@e0000 {
+ phy-handle = <&phy5>;
+ phy-connection-type = "sgmii";
+ };
+
+ enet1: ethernet@e2000 {
+ phy-handle = <&phy6>;
+ phy-connection-type = "sgmii";
+ };
+
+ enet2: ethernet@e4000 {
+ phy-handle = <&phy7>;
+ phy-connection-type = "sgmii";
+ };
+
+ enet3: ethernet@e6000 {
+ phy-handle = <&phy8>;
+ phy-connection-type = "sgmii";
+ };
+
+ enet4: ethernet@e8000 {
+ phy-handle = <&phyrgmii2>;
+ phy-connection-type = "rgmii";
+ };
+
+ enet5: ethernet@ea000 {
+ phy-handle = <&phy2>;
+ phy-connection-type = "sgmii";
+ };
+
+ enet6: ethernet@f0000 { /* FM1@TSEC9/FM1@TGEC1 */
+ phy-handle = <&xauiphy1>;
+ phy-connection-type = "xgmii";
+ };
+
+ enet7: ethernet@f2000 { /* FM1@TSEC10/FM1@TGEC2 */
+ phy-handle = <&xauiphy2>;
+ phy-connection-type = "xgmii";
+ };
+
+ mdio@fc000 {
+ status = "disabled";
+ };
+
+ mdio@fd000 {
+ status = "disabled";
+ };
+
+ fman0_oh2 {
+ status = "disabled";
+ };
+ fman0_oh3 {
+ status = "disabled";
+ };
+ fman0_oh4 {
+ status = "disabled";
+ };
+ fman0_oh5 {
+ status = "disabled";
+ };
+ fman0_oh6 {
+ status = "disabled";
+ };
+ };
+
+ fman1: fman@500000 {
+ enet8: ethernet@e0000 {
+ phy-handle = <&phy13>;
+ phy-connection-type = "sgmii";
+ };
+
+ enet9: ethernet@e2000 {
+ phy-handle = <&phy14>;
+ phy-connection-type = "sgmii";
+ };
+
+ enet10: ethernet@e4000 {
+ phy-handle = <&phy15>;
+ phy-connection-type = "sgmii";
+ };
+
+ enet11: ethernet@e6000 {
+ phy-handle = <&phy16>;
+ phy-connection-type = "sgmii";
+ };
+
+ enet12: ethernet@e8000 {
+ phy-handle = <&phyrgmii1>;
+ phy-connection-type = "rgmii";
+ };
+
+ enet13: ethernet@ea000 {
+ phy-handle = <&phy10>;
+ phy-connection-type = "sgmii";
+ };
+
+ enet14: ethernet@f0000 { /* FM2@TSEC9/FM2@TGEC1 */
+ phy-handle = <&xauiphy3>;
+ phy-connection-type = "xgmii";
+ };
+
+ enet15: ethernet@f2000 { /* FM2@TSEC10/FM2@TGEC2 */
+ phy-handle = <&xauiphy4>;
+ phy-connection-type = "xgmii";
+ };
+
+ mdio0: mdio@fc000 {
+ };
+
+ xmdio0: mdio@fd000 {
+ xauiphy1: ethernet-phy@0 {
+ compatible = "ethernet-phy-ieee802.3-c45";
+ reg = <0x0>;
+ };
+
+ xauiphy2: ethernet-phy@1 {
+ compatible = "ethernet-phy-ieee802.3-c45";
+ reg = <0x1>;
+ };
+
+ xauiphy3: ethernet-phy@2 {
+ compatible = "ethernet-phy-ieee802.3-c45";
+ reg = <0x2>;
+ };
+
+ xauiphy4: ethernet-phy@3 {
+ compatible = "ethernet-phy-ieee802.3-c45";
+ reg = <0x3>;
+ };
+ };
+
+ fman1_oh3 {
+ status = "disabled";
+ };
+ fman1_oh4 {
+ status = "disabled";
+ };
+ fman1_oh5 {
+ status = "disabled";
+ };
+ fman1_oh6 {
+ status = "disabled";
+ };
+ };
+
+ sdhc@114000 {
+ voltage-ranges = <1800 1800 3300 3300>;
+ };
};
pci0: pcie@ffe240000 {
@@ -219,6 +616,75 @@
ranges = <0 0 0xc 0x30000000 0 0x10000000>;
};
};
+
+ fsl,dpaa {
+ compatible = "fsl,t4240-dpaa", "fsl,dpaa";
+ ethernet@0 {
+ compatible = "fsl,t4240-dpa-ethernet", "fsl,dpa-ethernet";
+ fsl,fman-mac = <&enet0>;
+ };
+ ethernet@1 {
+ compatible = "fsl,t4240-dpa-ethernet", "fsl,dpa-ethernet";
+ fsl,fman-mac = <&enet1>;
+ };
+ ethernet@2 {
+ compatible = "fsl,t4240-dpa-ethernet", "fsl,dpa-ethernet";
+ fsl,fman-mac = <&enet2>;
+ };
+ ethernet@3 {
+ compatible = "fsl,t4240-dpa-ethernet", "fsl,dpa-ethernet";
+ fsl,fman-mac = <&enet3>;
+ };
+ ethernet@4 {
+ compatible = "fsl,t4240-dpa-ethernet", "fsl,dpa-ethernet";
+ fsl,fman-mac = <&enet4>;
+ };
+ ethernet@5 {
+ compatible = "fsl,t4240-dpa-ethernet", "fsl,dpa-ethernet";
+ fsl,fman-mac = <&enet5>;
+ };
+ ethernet@6 {
+ compatible = "fsl,t4240-dpa-ethernet", "fsl,dpa-ethernet";
+ fsl,fman-mac = <&enet6>;
+ };
+ ethernet@7 {
+ compatible = "fsl,t4240-dpa-ethernet", "fsl,dpa-ethernet";
+ fsl,fman-mac = <&enet7>;
+ };
+ ethernet@8 {
+ compatible = "fsl,t4240-dpa-ethernet", "fsl,dpa-ethernet";
+ fsl,fman-mac = <&enet8>;
+ };
+ ethernet@9 {
+ compatible = "fsl,t4240-dpa-ethernet", "fsl,dpa-ethernet";
+ fsl,fman-mac = <&enet9>;
+ };
+ ethernet@10 {
+ compatible = "fsl,t4240-dpa-ethernet", "fsl,dpa-ethernet";
+ fsl,fman-mac = <&enet10>;
+ };
+ ethernet@11 {
+ compatible = "fsl,t4240-dpa-ethernet", "fsl,dpa-ethernet";
+ fsl,fman-mac = <&enet11>;
+ };
+ ethernet@12 {
+ compatible = "fsl,t4240-dpa-ethernet", "fsl,dpa-ethernet";
+ fsl,fman-mac = <&enet12>;
+ };
+ ethernet@13 {
+ compatible = "fsl,t4240-dpa-ethernet", "fsl,dpa-ethernet";
+ fsl,fman-mac = <&enet13>;
+ };
+ ethernet@14 {
+ compatible = "fsl,t4240-dpa-ethernet", "fsl,dpa-ethernet";
+ fsl,fman-mac = <&enet14>;
+ };
+ ethernet@15 {
+ compatible = "fsl,t4240-dpa-ethernet", "fsl,dpa-ethernet";
+ fsl,fman-mac = <&enet15>;
+ };
+ };
};
/include/ "fsl/t4240si-post.dtsi"
+/include/ "fsl/qoriq-dpaa-res3.dtsi"
generated by cgit v0.10.2 at 2024-08-19 11:44:49 (GMT)