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-rw-r--r--arch/sh/Kconfig12
-rw-r--r--arch/sh/kernel/cpu/irq/ipr.c7
2 files changed, 14 insertions, 5 deletions
diff --git a/arch/sh/Kconfig b/arch/sh/Kconfig
index b5629cd..586cd04 100644
--- a/arch/sh/Kconfig
+++ b/arch/sh/Kconfig
@@ -678,6 +678,18 @@ config GUSA_RB
LLSC, this should be more efficient than the other alternative of
disabling interrupts around the atomic sequence.
+config SPARSE_IRQ
+ bool "Support sparse irq numbering"
+ depends on EXPERIMENTAL
+ help
+ This enables support for sparse irqs. This is useful in general
+ as most CPUs have a fairly sparse array of IRQ vectors, which
+ the irq_desc then maps directly on to. Systems with a high
+ number of off-chip IRQs will want to treat this as
+ experimental until they have been independently verified.
+
+ If you don't know what to do here, say N.
+
endmenu
menu "Boot options"
diff --git a/arch/sh/kernel/cpu/irq/ipr.c b/arch/sh/kernel/cpu/irq/ipr.c
index 6ad40db..808d99a 100644
--- a/arch/sh/kernel/cpu/irq/ipr.c
+++ b/arch/sh/kernel/cpu/irq/ipr.c
@@ -21,6 +21,7 @@
#include <linux/module.h>
#include <linux/io.h>
#include <linux/interrupt.h>
+#include <linux/topology.h>
static inline struct ipr_desc *get_ipr_desc(unsigned int irq)
{
@@ -59,21 +60,17 @@ void register_ipr_controller(struct ipr_desc *desc)
for (i = 0; i < desc->nr_irqs; i++) {
struct ipr_data *p = desc->ipr_data + i;
-#ifdef CONFIG_SPARSE_IRQ
struct irq_desc *irq_desc;
-#endif
BUG_ON(p->ipr_idx >= desc->nr_offsets);
BUG_ON(!desc->ipr_offsets[p->ipr_idx]);
-#ifdef CONFIG_SPARSE_IRQ
- irq_desc = irq_to_desc_alloc_cpu(p->irq, smp_processor_id());
+ irq_desc = irq_to_desc_alloc_node(p->irq, numa_node_id());
if (unlikely(!irq_desc)) {
printk(KERN_INFO "can not get irq_desc for %d\n",
p->irq);
continue;
}
-#endif
disable_irq_nosync(p->irq);
set_irq_chip_and_handler_name(p->irq, &desc->chip,