diff options
Diffstat (limited to 'include')
-rw-r--r-- | include/asm-cris/arch-v10/dma.h | 28 | ||||
-rw-r--r-- | include/asm-cris/arch-v10/io.h | 1 | ||||
-rw-r--r-- | include/asm-cris/arch-v10/io_interface_mux.h | 75 |
3 files changed, 104 insertions, 0 deletions
diff --git a/include/asm-cris/arch-v10/dma.h b/include/asm-cris/arch-v10/dma.h index 9e078b9..ecb9dba 100644 --- a/include/asm-cris/arch-v10/dma.h +++ b/include/asm-cris/arch-v10/dma.h @@ -44,3 +44,31 @@ #define USB_RX_DMA_NBR 9 #endif + +enum dma_owner +{ + dma_eth, + dma_ser0, + dma_ser1, /* Async and sync */ + dma_ser2, + dma_ser3, /* Async and sync */ + dma_ata, + dma_par0, + dma_par1, + dma_ext0, + dma_ext1, + dma_int6, + dma_int7, + dma_usb, + dma_scsi0, + dma_scsi1 +}; + +/* Masks used by cris_request_dma options: */ +#define DMA_VERBOSE_ON_ERROR (1<<0) +#define DMA_PANIC_ON_ERROR ((1<<1)|DMA_VERBOSE_ON_ERROR) + +int cris_request_dma(unsigned int dmanr, const char * device_id, + unsigned options, enum dma_owner owner); + +void cris_free_dma(unsigned int dmanr, const char * device_id); diff --git a/include/asm-cris/arch-v10/io.h b/include/asm-cris/arch-v10/io.h index 0bc38a0..dd39198 100644 --- a/include/asm-cris/arch-v10/io.h +++ b/include/asm-cris/arch-v10/io.h @@ -6,6 +6,7 @@ /* Etrax shadow registers - which live in arch/cris/kernel/shadows.c */ +extern unsigned long gen_config_ii_shadow; extern unsigned long port_g_data_shadow; extern unsigned char port_pa_dir_shadow; extern unsigned char port_pa_data_shadow; diff --git a/include/asm-cris/arch-v10/io_interface_mux.h b/include/asm-cris/arch-v10/io_interface_mux.h new file mode 100644 index 0000000..d925000 --- /dev/null +++ b/include/asm-cris/arch-v10/io_interface_mux.h @@ -0,0 +1,75 @@ +/* IO interface mux allocator for ETRAX100LX. + * Copyright 2004, Axis Communications AB + * $Id: io_interface_mux.h,v 1.1 2004/12/13 12:21:53 starvik Exp $ + */ + + +#ifndef _IO_INTERFACE_MUX_H +#define _IO_INTERFACE_MUX_H + + +/* C.f. ETRAX100LX Designer's Reference 20.9 */ + +/* The order in enum must match the order of interfaces[] in + * io_interface_mux.c */ +enum cris_io_interface { + /* Begin Non-multiplexed interfaces */ + if_eth = 0, + if_serial_0, + /* End Non-multiplexed interfaces */ + if_serial_1, + if_serial_2, + if_serial_3, + if_sync_serial_1, + if_sync_serial_3, + if_shared_ram, + if_shared_ram_w, + if_par_0, + if_par_1, + if_par_w, + if_scsi8_0, + if_scsi8_1, + if_scsi_w, + if_ata, + if_csp, + if_i2c, + if_usb_1, + if_usb_2, + /* GPIO pins */ + if_gpio_grp_a, + if_gpio_grp_b, + if_gpio_grp_c, + if_gpio_grp_d, + if_gpio_grp_e, + if_gpio_grp_f, + if_max_interfaces, + if_unclaimed +}; + +int cris_request_io_interface(enum cris_io_interface ioif, const char *device_id); + +void cris_free_io_interface(enum cris_io_interface ioif); + +/* port can be 'a', 'b' or 'g' */ +int cris_io_interface_allocate_pins(const enum cris_io_interface ioif, + const char port, + const unsigned start_bit, + const unsigned stop_bit); + +/* port can be 'a', 'b' or 'g' */ +int cris_io_interface_free_pins(const enum cris_io_interface ioif, + const char port, + const unsigned start_bit, + const unsigned stop_bit); + +int cris_io_interface_register_watcher(void (*notify)(const unsigned int gpio_in_available, + const unsigned int gpio_out_available, + const unsigned char pa_available, + const unsigned char pb_available)); + +void cris_io_interface_delete_watcher(void (*notify)(const unsigned int gpio_in_available, + const unsigned int gpio_out_available, + const unsigned char pa_available, + const unsigned char pb_available)); + +#endif /* _IO_INTERFACE_MUX_H */ |