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This is done so that same function can be called from SREGS and
ONE_REG interface (follow up patch).
Signed-off-by: Bharat Bhushan <bharat.bhushan@freescale.com>
Signed-off-by: Alexander Graf <agraf@suse.de>
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When the guest triggers an alignment interrupt, we don't handle it properly
today and instead BUG_ON(). This really shouldn't happen.
Instead, we should just pass the interrupt back into the guest so it can deal
with it.
Reported-by: Gao Guanhua-B22826 <B22826@freescale.com>
Tested-by: Gao Guanhua-B22826 <B22826@freescale.com>
Signed-off-by: Alexander Graf <agraf@suse.de>
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Current kvmppc_booke_handlers uses the same macro (KVM_HANDLER) and
all handlers are considered to be the same size. This will not be
the case if we want to use different macros for different handlers.
This patch improves the kvmppc_booke_handler so that it can
support different macros for different handlers.
Signed-off-by: Liu Yu <yu.liu@freescale.com>
[bharat.bhushan@freescale.com: Substantial changes]
Signed-off-by: Bharat Bhushan <bharat.bhushan@freescale.com>
Signed-off-by: Alexander Graf <agraf@suse.de>
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Like other places, use thread_struct to get vcpu reference.
Signed-off-by: Bharat Bhushan <bharat.bhushan@freescale.com>
Signed-off-by: Alexander Graf <agraf@suse.de>
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The guest TLB handling code should not have any insight into how the host
TLB shadow code works.
kvmppc_e500_tlbil_all() is a function that is used for distinction between
e500v2 and e500mc (E.HV) on how to flush shadow entries. This function really
is private between the e500.c/e500mc.c file and e500_mmu_host.c.
Instead of this one, use the public kvmppc_core_flush_tlb() function to flush
all shadow TLB entries. As a nice side effect, with this we also end up
flushing TLB1 entries which we forgot to do before.
Signed-off-by: Alexander Graf <agraf@suse.de>
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Host shadow TLB flushing is logic that the guest TLB code should have
no insight about. Declare the internal clear_tlb_refs and clear_tlb1_bitmap
functions static to the host TLB handling file.
Instead of these, we can use the already exported kvmppc_core_flush_tlb().
This gives us a common API across the board to say "please flush any
pending host shadow translation".
Signed-off-by: Alexander Graf <agraf@suse.de>
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When a host mapping fault happens in a guest TLB1 entry today, we
map the translated guest entry into the host's TLB1.
This isn't particularly clever when the guest is mapped by normal 4k
pages, since these would be a lot better to put into TLB0 instead.
This patch adds the required logic to map 4k TLB1 shadow maps into
the host's TLB0.
Signed-off-by: Alexander Graf <agraf@suse.de>
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This patch splits the file e500_tlb.c into e500_mmu.c (guest TLB handling)
and e500_mmu_host.c (host TLB handling).
The main benefit of this split is readability and maintainability. It's
just a lot harder to write dirty code :).
Signed-off-by: Alexander Graf <agraf@suse.de>
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When emulating tlbwe, we want to automatically map the entry that just got
written in our shadow TLB map, because chances are quite high that it's
going to be used very soon.
Today this happens explicitly, duplicating all the logic that is in
kvmppc_mmu_map() already. Just call that one instead.
Signed-off-by: Alexander Graf <agraf@suse.de>
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When shadow mapping a page, mapping this page can fail. In that case we
don't have a shadow map.
Take this case into account, otherwise we might end up writing bogus TLB
entries into the host TLB.
While at it, also move the write_stlbe() calls into the respective TLBn
handlers.
Signed-off-by: Alexander Graf <agraf@suse.de>
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When we invalidate shadow TLB maps on the host, we don't mark them
as not valid. But we should.
Fix this by removing the E500_TLB_VALID from their flags when
invalidating.
Signed-off-by: Alexander Graf <agraf@suse.de>
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Later patches want to call the function and it doesn't have
dependencies on anything below write_host_tlbe.
Move it higher up in the file.
Signed-off-by: Alexander Graf <agraf@suse.de>
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We need to be able to read and write the contents of the EPR register
from user space.
This patch implements that logic through the ONE_REG API and declares
its (never implemented) SREGS counterpart as deprecated.
Signed-off-by: Alexander Graf <agraf@suse.de>
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The External Proxy Facility in FSL BookE chips allows the interrupt
controller to automatically acknowledge an interrupt as soon as a
core gets its pending external interrupt delivered.
Today, user space implements the interrupt controller, so we need to
check on it during such a cycle.
This patch implements logic for user space to enable EPR exiting,
disable EPR exiting and EPR exiting itself, so that user space can
acknowledge an interrupt when an external interrupt has successfully
been delivered into the guest vcpu.
Signed-off-by: Alexander Graf <agraf@suse.de>
Conflicts:
Documentation/virtual/kvm/api.txt
include/uapi/linux/kvm.h
Signed-off-by: Stuart Yoder <stuart.yoder@freescale.com>
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The EPR register is potentially valid for PR KVM as well, so we need
to emulate accesses to it. It's only defined for reading, so only
handle the mfspr case.
Signed-off-by: Alexander Graf <agraf@suse.de>
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When injecting an interrupt into guest context, we usually don't need
to check for requests anymore. At least not until today.
With the introduction of EPR, we will have to create a request when the
guest has successfully accepted an external interrupt though.
So we need to prepare the interrupt delivery to abort guest entry
gracefully. Otherwise we'd delay the EPR request.
Signed-off-by: Alexander Graf <agraf@suse.de>
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On mfspr/mtspr emulation path Book3E's MMUCFG SPR with value 1015 clashes
with G4's MSSSR0 SPR. Move MSSSR0 emulation from generic part to Books3S.
MSSSR0 also clashes with Book3S's DABRX SPR. DABRX was not explicitly
handled so Book3S execution flow will behave as before.
Signed-off-by: Mihai Caraman <mihai.caraman@freescale.com>
Signed-off-by: Alexander Graf <agraf@suse.de>
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When running on top of pHyp, the hypercall instruction "sc 1" goes
straight into pHyp without trapping in supervisor mode.
So if we want to support PAPR guest in this configuration we need to
add a second way of accessing PAPR hypercalls, preferably with the
exact same semantics except for the instruction.
So let's overlay an officially reserved instruction and emulate PAPR
hypercalls whenever we hit that one.
Signed-off-by: Alexander Graf <agraf@suse.de>
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When we hit an emulation result that we didn't expect, that is an error,
but it's nothing that warrants a BUG(), because it can be guest triggered.
So instead, let's only WARN() the user that this happened.
Signed-off-by: Alexander Graf <agraf@suse.de>
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Reflect the uapi folder change in SREGS API documentation.
Signed-off-by: Mihai Caraman <mihai.caraman@freescale.com>
Reviewed-by: Amos Kong <kongjianjun@gmail.com>
Signed-off-by: Alexander Graf <agraf@suse.de>
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Signed-off-by: Stuart Yoder <stuart.yoder@freescale.com>
Change-Id: If5ab595de2ca9423d36cf002f7382767365011c3
Reviewed-on: http://git.am.freescale.net:8181/1174
Reviewed-by: Wood Scott-B07421 <scottwood@freescale.com>
Reviewed-by: Caraman Mihai Claudiu-B02008 <mihai.caraman@freescale.com>
Reviewed-by: Fleming Andrew-AFLEMING <AFLEMING@freescale.com>
Tested-by: Fleming Andrew-AFLEMING <AFLEMING@freescale.com>
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Signed-off-by: Shaveta Leekha <shaveta@freescale.com>
Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com>
Change-Id: Ib05321d3b73c2f1d817df5e9e439e4e379e9e8b5
Reviewed-on: http://git.am.freescale.net:8181/1225
Reviewed-by: Aggrwal Poonam-B10812 <Poonam.Aggrwal@freescale.com>
Reviewed-by: Fleming Andrew-AFLEMING <AFLEMING@freescale.com>
Tested-by: Fleming Andrew-AFLEMING <AFLEMING@freescale.com>
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- Add p2041rdb and p5040ds shared interface device trees
- Update buffer size for shared port to next cacheline
Signed-off-by: Cristian Sovaiala <cristian.sovaiala@freescale.com>
Signed-off-by: Yashpal Dutta <yashpal.dutta@freescale.com>
Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com>
Change-Id: Id017dbdec000985b78668efa89707106491c0138
Reviewed-on: http://git.am.freescale.net:8181/1245
Reviewed-by: Fleming Andrew-AFLEMING <AFLEMING@freescale.com>
Tested-by: Fleming Andrew-AFLEMING <AFLEMING@freescale.com>
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Update the buffer size to 1728, and remove q/bman portals because we use
dynamic portal allocation, and remove pool-channel for ethernet nodes.
Signed-off-by: Geoff Thorpe <Geoff.Thorpe@freescale.com>
Signed-off-by: Yashpal Dutta <yashpal.dutta@freescale.com>
Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com>
Change-Id: I9b98706b89f79069a285c33989e7409f277dcd57
Reviewed-on: http://git.am.freescale.net:8181/1244
Reviewed-by: Fleming Andrew-AFLEMING <AFLEMING@freescale.com>
Tested-by: Fleming Andrew-AFLEMING <AFLEMING@freescale.com>
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Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com>
Signed-off-by: Vakul Garg <vakul@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
Change-Id: I3666e5a58ded7ab3715b928a8caef37e67e69df1
Reviewed-on: http://git.am.freescale.net:8181/1243
Reviewed-by: Fleming Andrew-AFLEMING <AFLEMING@freescale.com>
Tested-by: Fleming Andrew-AFLEMING <AFLEMING@freescale.com>
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Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com>
Signed-off-by: Mingkai Hu <Mingkai.hu@freescale.com>
Signed-off-by: Yashpal Dutta <yashpal.dutta@freescale.com>
Signed-off-by: Minghuan Lian <Minghuan.Lian@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Change-Id: I02782428ee2dcdf0ef08c2fe7276cd50b9010add
Reviewed-on: http://git.am.freescale.net:8181/1242
Reviewed-by: Fleming Andrew-AFLEMING <AFLEMING@freescale.com>
Tested-by: Fleming Andrew-AFLEMING <AFLEMING@freescale.com>
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Signed-off-by: Geoff Thorpe <Geoff.Thorpe@freescale.com>
Signed-off-by: Mingkai Hu <Mingkai.hu@freescale.com>
Signed-off-by: Emil Medve <Emilian.Medve@Freescale.com>
Signed-off-by: Yashpal Dutta <yashpal.dutta@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com>
Change-Id: I6be876ae350d97a1d9a19f4e84eebd8e03db6211
Reviewed-on: http://git.am.freescale.net:8181/1241
Reviewed-by: Fleming Andrew-AFLEMING <AFLEMING@freescale.com>
Tested-by: Fleming Andrew-AFLEMING <AFLEMING@freescale.com>
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Signed-off-by: Vakul Garg <vakul@freescale.com>
Signed-off-by: Shaveta Leekha <shaveta@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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Signed-off-by: Shaveta Leekha <shaveta@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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- Add support for B4 board in board file b4_qds.c,
It is common for B4860, B4420 and B4220QDS as they share same QDS board
- Add B4QDS support in Kconfig and Makefile
B4860QDS is a high-performance computing evaluation, development and
test platform supporting the B4860 QorIQ Power Architecture processor,
with following major features:
- Four dual-threaded e6500 Power Architecture processors
organized in one cluster-each core runs up to 1.8 GHz
- Two DDR3/3L controllers for high-speed memory interface each
runs at up to 1866.67 MHz
- CoreNet fabric that fully supports coherency using MESI protocol
between the e6500 cores, SC3900 FVP cores, memories and
external interfaces.
- Data Path Acceleration Architecture having FMAN, QMan, BMan,
SEC 5.3 and RMAN
- Large internal cache memory with snooping and stashing capabilities
- Sixteen 10-GHz SerDes lanes that serve:
- Two SRIO interfaces. Each supports up to 4 lanes and
a total of up to 8 lanes
- Up to 8-lanes Common Public Radio Interface (CPRI) controller
for glue-less antenna connection
- Two 10-Gbit Ethernet controllers (10GEC)
- Six 1G/2.5-Gbit Ethernet controllers for network communications
- PCI Express controller
- Debug (Aurora)
- Various system peripherals
B4420 and B4220 have some differences in comparison to B4860 with fewer
core/clusters(both SC3900 and e6500), fewer DDR controllers,
fewer serdes lanes, fewer SGMII interfaces and reduced target frequencies.
Key differences between B4860 and B4420:
B4420 has:
- Fewer e6500 cores:
1 cluster with 2 e6500 cores
- Fewer SC3900 cores/clusters:
1 cluster with 2 SC3900 cores per cluster
- Single DDRC @ 1.6GHz
- 2 X 4 lane serdes
- 3 SGMII interfaces
- no sRIO
- no 10G
Key differences between B4860 and B4220:
B4220 has:
- Fewer e6500 cores:
1 cluster with 1 e6500 core
- Fewer SC3900 cores/clusters:
1 cluster with 2 SC3900 cores per cluster
- Single DDRC @ 1.33GHz
- 2 X 2 lane serdes
- 2 SGMII interfaces
- no sRIO
- no 10G
Signed-off-by: Shaveta Leekha <shaveta@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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B4860QDS and B4420QDS share same QDS board
* common board features have been added in b4qds.dts
* various board differences are in respective files of B4860 and B4420
Signed-off-by: Shaveta Leekha <shaveta@freescale.com>
Signed-off-by: Minghuan Lian <Minghuan.Lian@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com>
Signed-off-by: Ramneek Mehresh <ramneek.mehresh@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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B4860 and B4420 are similar that share some commonalities
* common features have been added in b4si-pre.dtsi and b4si-post.dtsi
* differences are added in respective silicon files of B4860 and B4420
There are several things missing from the device trees of B4860 and B4420:
* DPAA related nodes (Qman, Bman, Fman, Rman)
* DSP related nodes/information
* serdes, sfp(security fuse processor), thermal,
gpio, maple, cpri, quad timers nodes
Signed-off-by: Shaveta Leekha <shaveta@freescale.com>
Signed-off-by: Zhao Chenhui <chenhui.zhao@freescale.com>
Signed-off-by: Li Yang <leoli@freescale.com>
Signed-off-by: Tang Yuantian <Yuantian.Tang@freescale.com>
Signed-off-by: Varun Sethi <Varun.Sethi@freescale.com>
Signed-off-by: Minghuan Lian <Minghuan.Lian@freescale.com>
Signed-off-by: Ramneek Mehresh <ramneek.mehresh@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
Signed-off-by: Vakul Garg <vakul@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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Existing B4 support required to be cleaned as
B4 base support would be cherry-picked from upstream
Signed-off-by: Shaveta Leekha <shaveta@freescale.com>
Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com>
Change-Id: I623c04aa6381eba64c98b5e31eeba875d9f85050
Reviewed-on: http://git.am.freescale.net:8181/1224
Reviewed-by: Aggrwal Poonam-B10812 <Poonam.Aggrwal@freescale.com>
Reviewed-by: Fleming Andrew-AFLEMING <AFLEMING@freescale.com>
Tested-by: Fleming Andrew-AFLEMING <AFLEMING@freescale.com>
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When using recent udev, the /dev node mount requires CONFIG_DEVTMPFS_MOUNT
is enabled in Kernel. The patch enables the option in defconfig of Freescale
QorIQ targets.
Changed defconfig list:
arch/powerpc/configs/85xx/e6500rev1_defconfig
Signed-off-by: Zhenhua Luo <zhenhua.luo@freescale.com>
Change-Id: I13d241ebf5b5e24719397bc989d0a4d22c1fdaa7
Reviewed-on: http://git.am.freescale.net:8181/1247
Reviewed-by: Fleming Andrew-AFLEMING <AFLEMING@freescale.com>
Tested-by: Fleming Andrew-AFLEMING <AFLEMING@freescale.com>
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When using recent udev, the /dev node mount requires CONFIG_DEVTMPFS_MOUNT
is enabled in Kernel. The patch enables the option in defconfig of Freescale
QorIQ targets.
Changed defconfig list:
arch/powerpc/configs/85xx/p1023rds_defconfig
arch/powerpc/configs/corenet32_smp_defconfig
arch/powerpc/configs/corenet64_smp_defconfig
arch/powerpc/configs/mpc85xx_smp_defconfig
Signed-off-by: Zhenhua Luo <zhenhua.luo@freescale.com>
Change-Id: I5cf426b45d282e0e85bbd6b51821eca9ab5e8309
Reviewed-on: http://git.am.freescale.net:8181/1246
Reviewed-by: Fleming Andrew-AFLEMING <AFLEMING@freescale.com>
Tested-by: Fleming Andrew-AFLEMING <AFLEMING@freescale.com>
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This is using thew new PAMU driver
This integration uses a *horrible hack* in order to provide the IOMMU/PAMU
driver with a 'struct device'. Making the QMan portal driver nice and
proper is part of the upstreaming effort
Change-Id: I5f03a3b662949162bff7ac8c7b14ad5fbc0394ce
Signed-off-by: Emil Medve <Emilian.Medve@Freescale.com>
Change-Id: Ic66bb3904ffa537e497ba00c67e22d851087b435
Reviewed-on: http://git.am.freescale.net:8181/1173
Reviewed-by: Ladouceur Jeffrey-R11498 <Jeffrey.Ladouceur@freescale.com>
Reviewed-by: Fleming Andrew-AFLEMING <AFLEMING@freescale.com>
Tested-by: Fleming Andrew-AFLEMING <AFLEMING@freescale.com>
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This is to make the ingration patch with the new IOMMU/PAMU driver more
readable
Signed-off-by: Emil Medve <Emilian.Medve@Freescale.com>
Change-Id: Ia8c2acef2f09d0dcbce47cc14f6f9dfbf1f55370
Reviewed-on: http://git.am.freescale.net:8181/1172
Reviewed-by: Fleming Andrew-AFLEMING <AFLEMING@freescale.com>
Tested-by: Fleming Andrew-AFLEMING <AFLEMING@freescale.com>
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In case of depletion, the current output contains the BPID both as a number
and as a mask, with the non-zero 'mask' conveying depletion on the
respective bpool. Is less confusing to just use a binary/boolean value for
displaying the depletion status of a bpool
Signed-off-by: Emil Medve <Emilian.Medve@Freescale.com>
Change-Id: Idbab2fa2701405beb6f04327ea199377b36aea73
Reviewed-on: http://git.am.freescale.net:8181/1171
Reviewed-by: Fleming Andrew-AFLEMING <AFLEMING@freescale.com>
Tested-by: Fleming Andrew-AFLEMING <AFLEMING@freescale.com>
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7. Aperture size calculation was off by one byte
Signed-off-by: Emil Medve <Emilian.Medve@Freescale.com>
Change-Id: I10c7d34f5a8c541b8b3d6290629e1d87ea8a2ea0
Reviewed-on: http://git.am.freescale.net:8181/1170
Reviewed-by: Fleming Andrew-AFLEMING <AFLEMING@freescale.com>
Tested-by: Fleming Andrew-AFLEMING <AFLEMING@freescale.com>
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Signed-off-by: Emil Medve <Emilian.Medve@Freescale.com>
Change-Id: Ia98edfa4baf690f9f43d23cac5871b7ac5dd7027
Reviewed-on: http://git.am.freescale.net:8181/1169
Reviewed-by: Fleming Andrew-AFLEMING <AFLEMING@freescale.com>
Tested-by: Fleming Andrew-AFLEMING <AFLEMING@freescale.com>
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Create the dts files for each core and splits the devices between
the two cores for P1021RDB-PC.
Core0 has l2, serial0, i2c, spi, gpio, tdm,dma, usb, eth0, eth1,
sdhc, crypto, global-util, message, pci0, pci1, msi, crypto.
Core1 has l2, serial1, eth2.
Signed-off-by: Matthew McClintock <msm@freescale.com>
Signed-off-by: Xu Jiucheng <B37781@freescale.com>
Change-Id: I92614abdca3db3ab6083c4443ad563fd687050ec
Reviewed-on: http://git.am.freescale.net:8181/1179
Reviewed-by: Fleming Andrew-AFLEMING <AFLEMING@freescale.com>
Tested-by: Fleming Andrew-AFLEMING <AFLEMING@freescale.com>
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Add IDE support for MPC85xxCDS.
Signed-off-by: Zhao Chenhui <chenhui.zhao@freescale.com>
Change-Id: I621718b3019096a9fbf170209bcd758e6382d582
Reviewed-on: http://git.am.freescale.net:8181/1178
Reviewed-by: Fleming Andrew-AFLEMING <AFLEMING@freescale.com>
Tested-by: Fleming Andrew-AFLEMING <AFLEMING@freescale.com>
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At least for crypto/IPSec, doing so provides users with a better
performance experience out of the box.
Change-Id: I8cf6c0ece432bbbea1e60e19bcc5088df8a67241
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Signed-off-by: Andy Fleming <afleming@freescale.com>
(Sort-of cherry-picked from f67e059e6ba9dc0b899b80012e6f40d175330f29)
Change-Id: Iab57b57e8f5b0fb85cddb88bab6cb9048f9b8944
Reviewed-on: http://git.am.freescale.net:8181/1177
Reviewed-by: Fleming Andrew-AFLEMING <AFLEMING@freescale.com>
Tested-by: Fleming Andrew-AFLEMING <AFLEMING@freescale.com>
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PCI controller driver is now a platform driver and the PCI of platform
devices need to be created earlier in the arch_initcall stage according to
the original timing of calling fsl_add_bridge(). So we have to probe PCI
devices separately from other devices. But probing more than once may cause
duplication warning. We add check if the device have already probed before
probing to avoid duplication.
Signed-off-by: Jia Hongtao <B38951@freescale.com>
Signed-off-by: Li Yang <leoli@freescale.com>
Change-Id: If926bb6d57af8353ef154a7225411a6465c13711
Reviewed-on: http://git.am.freescale.net:8181/1176
Reviewed-by: Fleming Andrew-AFLEMING <AFLEMING@freescale.com>
Tested-by: Fleming Andrew-AFLEMING <AFLEMING@freescale.com>
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This patch integrates the IEEE 1588 specification v2 ioctls with
the gianfar driver. The user space application should be IXXAT
IEEE1588 stack v1.04 or above.
The IEEE 1588 driver can also be disabled/enabled via sysfs.
To enable 1588:
- echo 1 > /sys/*/ethN/ptp_1588
To disable 1588
- echo 0 > /sys/*/ethN/ptp_1588
Signed-off-by: Sandeep Gopalpet <sandeep.kumar@freescale.com>
Signed-off-by: Bhaskar Upadhaya <Bhaskar.Upadhaya@freescale.com>
Signed-off-by: Tang Yuantian <Yuantian.Tang@freescale.com>
Signed-off-by: Xie Xiaobo <X.Xie@freescale.com>
Change-Id: I3a1190eb6bce06417e0365aba06d73d3a9af5634
Reviewed-on: http://git.am.freescale.net:8181/866
Reviewed-by: Tang Yuantian-B29983 <yuantian.tang@freescale.com>
Reviewed-by: Manoil Claudiu-B08782 <claudiu.manoil@freescale.com>
Reviewed-by: Fleming Andrew-AFLEMING <AFLEMING@freescale.com>
Tested-by: Fleming Andrew-AFLEMING <AFLEMING@freescale.com>
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Remove duplicate code "enable_dma()" in platform_resume.
enable_dma was invoked already in sdhci_resume_host
before ops->platform_resume was executed
Signed-off-by: Haijun Zhang <haijun.zhang@freescale.com>
Change-Id: I9b510a0cce3050dc75aac521232c92869174f66f
Reviewed-on: http://git.am.freescale.net:8181/1092
Reviewed-by: Xie Xiaobo-R63061 <X.Xie@freescale.com>
Reviewed-by: Fleming Andrew-AFLEMING <AFLEMING@freescale.com>
Tested-by: Fleming Andrew-AFLEMING <AFLEMING@freescale.com>
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BMAN and QMAN are merged, and both the DPAA Ethernet and FMAN
drivers require the QMAN/BMAN support to build. We therefore
note that dependency in the Kconfigs.
Change-Id: I7eda3375ca0e9e760cd7650be08c9b41acaac9af
Signed-off-by: Andy Fleming <afleming@freescale.com>
Reviewed-on: http://git.am.freescale.net:8181/1112
Reviewed-by: Fleming Andrew-AFLEMING <AFLEMING@freescale.com>
Tested-by: Fleming Andrew-AFLEMING <AFLEMING@freescale.com>
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The drivers in staging were not being enabled, which broke
qman/bman support for corenet64.
Change-Id: I79b886866eadd799ebfacd0e2281550c19dafc34
Signed-off-by: Andy Fleming <afleming@freescale.com>
Reviewed-on: http://git.am.freescale.net:8181/1111
Reviewed-by: Fleming Andrew-AFLEMING <AFLEMING@freescale.com>
Tested-by: Fleming Andrew-AFLEMING <AFLEMING@freescale.com>
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They are no longer supported in the latest kernel.
Change-Id: I08b7a5bbe8738d22330d4a175e941627ce1b5172
Signed-off-by: Bogdan Hamciuc <bogdan.hamciuc@freescale.com>
(cherry picked from commit 7191ab1792435bc581f17f1d4259b9c51c4fda9)
Reviewed-on: http://git.am.freescale.net:8181/1062
Reviewed-by: Fleming Andrew-AFLEMING <AFLEMING@freescale.com>
Tested-by: Fleming Andrew-AFLEMING <AFLEMING@freescale.com>
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Unused macro, left behind by a large refactorization patch.
Change-Id: Id76102ee3bbf7993a79094055c0ccea7eb833997
Signed-off-by: Bogdan Hamciuc <bogdan.hamciuc@freescale.com>
Reviewed-on: http://git.am.freescale.net:8181/1061
Reviewed-by: Fleming Andrew-AFLEMING <AFLEMING@freescale.com>
Tested-by: Fleming Andrew-AFLEMING <AFLEMING@freescale.com>
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