summaryrefslogtreecommitdiff
AgeCommit message (Collapse)Author
2014-12-11soc/fsl: add ftm alarm driver for ls1021a platformWang Dongsheng
Only Ftm0 can be used when system going to deep sleep. So this driver to support ftm0 as a wakeup source. Signed-off-by: Wang Dongsheng <dongsheng.wang@freescale.com> Change-Id: Ib5fa7f7b72ab1f47fc80d1d816f112168ab84982 Reviewed-on: http://git.am.freescale.net:8181/19839 Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com> Reviewed-by: Li Xiubo <Li.Xiubo@freescale.com> Reviewed-by: Zhengxiong Jin <Jason.Jin@freescale.com>
2014-12-11soc/fsl: add freescale dir for SOC specific driversWang Dongsheng
Some Freescale device driver need to move to soc, because these drivers are specific drivers. Before the soc/ to be created, the drivers had been there arch/ or drivers/misc/, but now soc/ dir is a better choice. Signed-off-by: Wang Dongsheng <dongsheng.wang@freescale.com> Change-Id: Iba92df04682bae45f1a40d20e4a848814d3d895a Reviewed-on: http://git.am.freescale.net:8181/19837 Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com> Reviewed-by: Zhengxiong Jin <Jason.Jin@freescale.com>
2014-12-11soc: Introduce drivers/soc place-holder for SOC specific driversSantosh Shilimkar
Based on earlier thread "https://lkml.org/lkml/2013/10/7/662" and discussion at Kernel Summit'2013, it was agreed to create 'driver/soc' for drivers which are quite SOC specific. Further discussion on the subject is in response to the earlier version of the patch is here: http://lwn.net/Articles/588942/ Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Cc: Kumar Gala <galak@codeaurora.org> Cc: Paul Walmsley <paul@pwsan.com> Cc: Olof Johansson <olof@lixom.net> Cc: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Sandeep Nair <sandeep_n@ti.com> Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Signed-off-by: Kumar Gala <galak@codeaurora.org> Change-Id: I53101824ec18c3cb58fa2db61060ae1247705fcd Reviewed-on: http://git.am.freescale.net:8181/19836 Reviewed-by: Emilian Medve <Emilian.Medve@freescale.com> Tested-by: Emilian Medve <Emilian.Medve@freescale.com>
2014-12-11regmap: Add the DT binding documentation for endiannessXiubo Li
Device-Tree binding for device endianness Index Device Endianness properties --------------------------------------------------- 1 BE 'big-endian' 2 LE 'little-endian' For one device driver, which will run in different scenarios above on different SoCs using the devicetree, we need one way to simplify this. Signed-off-by: Xiubo Li <Li.Xiubo@freescale.com> Signed-off-by: Mark Brown <broonie@linaro.org> --- This patch is pulled back from upstream: commit 275876e208e28abf4b96ec89030e482b1331ee75 Change-Id: I28bbebb0b8e191555b7a7b001d9f4d04453a3106 Reviewed-on: http://git.am.freescale.net:8181/19856 Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com> Reviewed-by: Zhengxiong Jin <Jason.Jin@freescale.com>
2014-12-11clocksource: Add Freescale FlexTimer Module (FTM) timer supportXiubo Li
The Freescale FlexTimer Module time reference is a 16-bit counter that can be used as an unsigned or signed increase counter. CNTIN defines the starting value of the count and MOD defines the final value of the count. The value of CNTIN is loaded into the FTM counter, and the counter increments until the value of MOD is reached, at which point the counter is reloaded with the value of CNTIN. That's also when an overflow interrupt will be generated. Here using the 'evt' prefix or postfix as clock event device and the 'src' as clock source device. Signed-off-by: Xiubo Li <Li.Xiubo@freescale.com> Cc: Shawn Guo <shawn.guo@linaro.org> Cc: Jingchang Lu <b35083@freescale.com> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org> --- This patch is pulled back from upstream: commit 2529c3a330797000d699d70c9a65b8525c6652de Change-Id: I9a224167f82b13b2f868af82f9bdc5dc1ebb5e48 Reviewed-on: http://git.am.freescale.net:8181/19870 Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com> Reviewed-by: Zhengxiong Jin <Jason.Jin@freescale.com>
2014-12-11arm : dts : ls1021a : Modify USB3.0 dts nodeSuresh Gupta
Signed-off-by: Suresh Gupta <suresh.gupta@freescale.com> Change-Id: I7aa37e4914623a303eb520c6d8fd6d4f84e9ddb2 Reviewed-on: http://git.am.freescale.net:8181/19815 Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com> Reviewed-by: Jingchang Lu <jingchang.lu@freescale.com> Reviewed-by: Zhengxiong Jin <Jason.Jin@freescale.com>
2014-12-11pwm: fsl-ftm: Document 'big-endian' propertyXiubo Li
The same FTM PWM device can have a different endianness on different SoCs. The device tree provides a property to describing this so that an operating system device driver can handle all variants of the device. Refer to the table below for the endianness of the FTM PWM block as integrated into the existing SoCs: SoC | FTM-PWM endianness --------+------------------- Vybrid | LE LS1 | BE LS2 | LE Signed-off-by: Xiubo Li <Li.Xiubo@freescale.com> Signed-off-by: Thierry Reding <thierry.reding@gmail.com> --- This patch is pulled back from upstream: commit a535e2e0debc2255fcf60a11d73fbb0534454cc3 Change-Id: Icf9f1efe7a4fd121cb5568f8552c01043110b108 Reviewed-on: http://git.am.freescale.net:8181/19867 Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com> Reviewed-by: Zhengxiong Jin <Jason.Jin@freescale.com>
2014-12-11pwm: fsl-ftm: Convert to direct regmap API usageXiubo Li
The regmap core supports different endian modes for devices. This patch convert to direct regmap API usage, preparing to support big endianness for LS1 SoC. Using the regmap framework it will be easy to support devices that only differ in endianness with the same device driver. Signed-off-by: Xiubo Li <Li.Xiubo@freescale.com> Signed-off-by: Thierry Reding <thierry.reding@gmail.com> --- This patch is pulled back from upstream: commit 42fa98a9c3609c1aff466cb847e421c611cc9157 Change-Id: If7905b70eed8296dffa7ebde0dc03e951fcb7536 Reviewed-on: http://git.am.freescale.net:8181/19866 Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com> Reviewed-by: Zhengxiong Jin <Jason.Jin@freescale.com>
2014-12-11pwm: fsl-ftm: Clean up the codeXiubo Li
This patch intends to prepare for converting to direct regmap API usage. Signed-off-by: Xiubo Li <Li.Xiubo@freescale.com> Signed-off-by: Thierry Reding <thierry.reding@gmail.com> --- This patch is pulled back from upstream: commit cd6d92d2aa1556b22cd05acbc5f2cc8e5caafcc4 Change-Id: Iffdb310f7254bebfe65ca81594b25e4cbd546c9a Reviewed-on: http://git.am.freescale.net:8181/19865 Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com> Reviewed-by: Zhengxiong Jin <Jason.Jin@freescale.com>
2014-12-11pwm: fsl-ftm: set pwm_chip can_sleep flagAxel Lin
The implementation of .config(), .enable() and .disable() operations in this driver may sleep, thus set pwm_chip can_sleep flag. Signed-off-by: Axel Lin <axel.lin@ingics.com> Acked-by: Xiubo Li <Li.Xiubo@freescale.com> Signed-off-by: Thierry Reding <thierry.reding@gmail.com> --- This patch is pulled back from upstream: commit 39fd3f99aba3f7683fc9b62e916e4c886a1cb6b0 Change-Id: I06b3dac78d4acc12d96c8d248814eaaf6dc0ca33 Reviewed-on: http://git.am.freescale.net:8181/19864 Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com> Reviewed-by: Zhengxiong Jin <Jason.Jin@freescale.com>
2014-12-11Documentation: Add device tree bindings for Freescale FTM PWM.Xiubo Li
This adds the binding documentation for Freescale FlexTimer Module (FTM) PWM driver under Documentation/devicetree/bindings/pwm/. Signed-off-by: Xiubo Li <Li.Xiubo@freescale.com> Reviewed-by: Sascha Hauer <s.hauer@pengutronix.de> Reviewed-by: Yuan Yao <yao.yuan@freescale.com> Acked-by: Kumar Gala <galak@codeaurora.org> Signed-off-by: Thierry Reding <thierry.reding@gmail.com> --- This patch is pulled back from upstream: commit 42586315b7b6e682bd4136a1a2bc2b1d50113487 Change-Id: I5bf1419bcfbb4bd84c6e3eb2285fad660835fda3 Reviewed-on: http://git.am.freescale.net:8181/19863 Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com> Reviewed-by: Zhengxiong Jin <Jason.Jin@freescale.com>
2014-12-11pwm: Add Freescale FTM PWM driver supportXiubo Li
The FTM PWM device can be found on Vybrid VF610 Tower and Layerscape LS-1 SoCs. Signed-off-by: Xiubo Li <Li.Xiubo@freescale.com> Signed-off-by: Alison Wang <b18965@freescale.com> Signed-off-by: Jingchang Lu <b35083@freescale.com> Reviewed-by: Sascha Hauer <s.hauer@pengutronix.de> Reviewed-by: Yuan Yao <yao.yuan@freescale.com> Signed-off-by: Thierry Reding <thierry.reding@gmail.com> --- This patch is pulled back from upstream: commit b505183b5117ce149c65ae62f8c00e889acafa69 Change-Id: I49cb21cbeeb944adf54958d29101e95204f1d693 Reviewed-on: http://git.am.freescale.net:8181/19862 Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com> Reviewed-by: Zhengxiong Jin <Jason.Jin@freescale.com>
2014-12-11clocksource: ftm: Add FlexTimer Module (FTM) Timer devicetree DocumentationXiubo Li
The FTM binding could be used on Vybrid and LS1+, add a binding document for it. Signed-off-by: Xiubo Li <Li.Xiubo@freescale.com> Cc: Shawn Guo <shawn.guo@linaro.org> Cc: Jingchang Lu <b35083@freescale.com> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org> --- This patch is pulled back from upstream: commit 12e499d0ed1fa09940a573e5a8cce52b556f3c38 Change-Id: I7e3a87401852f29e83768a44b49dc261a4d67b28 Reviewed-on: http://git.am.freescale.net:8181/19861 Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com> Reviewed-by: Zhengxiong Jin <Jason.Jin@freescale.com>
2014-12-11regmap: fix NULL pointer dereference in regmap_get_val_endianPankaj Dubey
Recents commits for getting reg endianness causing NULL pointer dereference if dev is passed NULL in regmap_init_mmio. This patch fixes this issue, and allows to parse reg endianness only if dev and dev->of_node exist. Signed-off-by: Pankaj Dubey <pankaj.dubey@samsung.com> Signed-off-by: Mark Brown <broonie@kernel.org> --- This patch is pulled back from upstream: commit 6e64b6ccc1e46932768e3bb8974fc2e5589bca7a Change-Id: Id9f795400bbda943dfd7b2fb71a752d4211b7540 Reviewed-on: http://git.am.freescale.net:8181/19860 Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com> Reviewed-by: Zhengxiong Jin <Jason.Jin@freescale.com>
2014-12-11Split regmap_get_endian() in two functionsXiubo Li
Split regmap_get_endian() in two functions, regmap_get_reg_endian() and regmap_get_val_endian(). This allows to: - Get rid of the three switch()es on "type", incl. error handling in three "default" cases, - Get rid of the regmap_endian_type enum, - Get rid of the non-NULL check of "config" (regmap_init() already checks for that), - Get rid of the "endian" output parameters, and just return the regmap_endian enum value, as the functions can no longer fail. This saves 21 lines of code (despite the still-present one-comment-per-line over-documentation), and 30 bytes of code on ARM V7. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Mark Brown <broonie@linaro.org> --- This patch is pulled back from upstream: commit cf673fbc6342b1c2310cdfdc4ed99f18f866b8e4 Change-Id: Ifea4f2c83977bb81b50853de097f52bb586fc6ce Reviewed-on: http://git.am.freescale.net:8181/19859 Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com> Reviewed-by: Zhengxiong Jin <Jason.Jin@freescale.com>
2014-12-11regmap: of_regmap_get_endian() cleanupStephen Warren
Commit d647c199510c ("regmap: add DT endianness binding support") had some issues. Commit ba1b53feb8ca ("regmap: Fix DT endianess parsing logic") fixed the main problem. This patch fixes the other. Specifically, restore the overall default of REGMAP_ENDIAN_BIG if none of the config, DT, or the bus specify any endianness. Without this, of_regmap_get_endian() could return REGMAP_ENDIAN_DEFAULT, which the calling code can't handle. Since all busses do specify an endianness in the current code, this makes no difference right now, but I saw no justification in the patch description for removing this final default. Also, clean up the code a bit: * s/of_regmap_get_endian/regmap_get_endian/ since the function isn't DT- specific, even if the reason it was originally added was to add some DT-specific features. * After potentially reading an endianess specification from DT, the code checks whether DT did specify an endianness, and if so, returns it. Move this test outside the whole switch statement so that if the REGMAP_ENDIAN_REG case ever modifies *endian, this check will pick that up. This partially reverts part of commit ba1b53feb8ca ("regmap: Fix DT endianess parsing logic"), while maintaining the bug-fix that commit made to this code. * Make the comments briefer, and only refer to the specific action taken at their location. This makes most of the comments independent of DT, and easier to follow. Cc: Xiubo Li <Li.Xiubo@freescale.com> Cc: Javier Martinez Canillas <javier.martinez@collabora.co.uk> Cc: Thierry Reding <treding@nvidia.com> Fixes: d647c199510c ("regmap: add DT endianness binding support") Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Mark Brown <broonie@linaro.org> --- This patch is pulled back from upstream: commit 45e1a279ce1d2ff9b2b2fedf4cdced10c7ca3ab5 Change-Id: I7c53af02317b6cb52b42ed0dc7b5d8d77eaccc92 Reviewed-on: http://git.am.freescale.net:8181/19858 Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com> Reviewed-by: Zhengxiong Jin <Jason.Jin@freescale.com>
2014-12-11regmap: Fix DT endianess parsing logicJavier Martinez Canillas
Commit d647c199510c ("regmap: add DT endianness binding support.") added support to parse the device endianness from the device tree but unfortunately the added logic doesn't have the same semantics than the old code. This leads to a NULL dereference pointer error when these properties are not provided by the Device Tree: Unable to handle kernel NULL pointer dereference at virtual address 00000044 pgd = c0004000 [00000044] *pgd=00000000 Internal error: Oops: 5 [#1] PREEMPT SMP ARM Modules linked in: CPU: 5 PID: 1 Comm: swapper/0 Not tainted 3.17.0-rc1-next-20140818ccu #671 task: ea412800 ti: ea484000 task.ti: ea484000 PC is at regmap_update_bits+0xc/0x5c The problem is that platforms that rely on the default value now gets different values due two related issues in the current code: a) It only parses the endianness from DT for the regmap registers and not for the regmap values but it checks unconditionally in both cases if the resulting endiannes is REGMAP_ENDIAN_NATIVE. b) REGMAP_ENDIAN_NATIVE is not even a valid DT property according to the regmap DT binding documentation so it shouldn't be set. Signed-off-by: Javier Martinez Canillas <javier.martinez@collabora.co.uk> Signed-off-by: Mark Brown <broonie@linaro.org> --- This patch is pulled back from upstream: commit ba1b53feb8cacbd84bcf0e48925e30ad29e141a6 Change-Id: Ifaf8389127b8c931b7f118c124ab0935b0b98dd2 Reviewed-on: http://git.am.freescale.net:8181/19857 Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com> Reviewed-by: Zhengxiong Jin <Jason.Jin@freescale.com>
2014-12-11regmap: add DT endianness binding support.Xiubo Li
For many drivers which will support rich endianness of Devices need define DT properties by itself with the binding support. The endianness using regmap: Index Device Properties if needs bytes-swap, or just ignore it ------------------------------------------------------------- 1 BE 'big-endian' 2 LE 'little-endian' The properties include all the register values and the buffers. And these properties are very usful for the MMIO devices: Such as: a memory-mapped device, on one SoC is in BE mode, while in another SoC will be in LE mode, and the CPU will always in LE mode. For the first case, we must use cpu_to_be32/be32_to_cpu for 32-bit registers accessing, so the 'big-endian' property is needed. For the second case, we can just ignore the bytes-swap functions like cpu_to_le32/le32_to_cpu, so the 'little-endian' property could be abscent. And vice versa... Signed-off-by: Xiubo Li <Li.Xiubo@freescale.com> Signed-off-by: Mark Brown <broonie@linaro.org> --- This patch is pulled back from upstream: commit d647c199510c2c126ac03ecbea51086e10126a40 Change-Id: I24ce6753dd557be212d2ec9f67f0d9513be22617 Reviewed-on: http://git.am.freescale.net:8181/19855 Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com> Reviewed-by: Zhengxiong Jin <Jason.Jin@freescale.com>
2014-12-11regmap: implement LE formatting/parsing for 16/32-bit values.Xiubo Li
Allow busses to request little endianness formatting and parsing for 16- and 32-bit values. This will be useful to support regmap-mmio. For the following the scenarios using the regmap-mmio, for example: Index CPU Device Endianess flag for values ---------------------------------------------------------- 1 LE LE REGMAP_ENDIAN_DEFAULT/NATIVE 2 LE BE REGMAP_ENDIAN_BIG 3 BE BE REGMAP_ENDIAN_DEFAULT/NATIVE 4 BE LE REGMAP_ENDIAN_LITTLE For one device driver, which will support all the cases above, needs two boolean properties in DT node like: 'big-endian' for case 2 and 'little-endian' for case 4, and for cases 1 and 3 they all will be absent. Signed-off-by: Xiubo Li <Li.Xiubo@freescale.com> Signed-off-by: Mark Brown <broonie@linaro.org> --- This patch is pulled back from upstream: commit 4aa8c0694c731e03eb660b92a3afe14859142381 Change-Id: I8ac391476c8be6e59fd38493baa1f8afe03fd3fc Reviewed-on: http://git.am.freescale.net:8181/19854 Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com> Reviewed-by: Zhengxiong Jin <Jason.Jin@freescale.com>
2014-12-11serial: of-serial: add PM suspend/resume supportJingchang Lu
This adds PM suspend/resume support for the of-serial driver to provide power management support on devices attatched to it. Signed-off-by: Jingchang Lu <jingchang.lu@freescale.com> This patch has been sent to upstream for review: https://patchwork.kernel.org/patch/4954521/ Change-Id: I06905237f7d7ef51bf5a1c135cd0880d92c4c104 Reviewed-on: http://git.am.freescale.net:8181/19728 Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com> Reviewed-by: Chenhui Zhao <chenhui.zhao@freescale.com> Reviewed-by: Li Xiubo <Li.Xiubo@freescale.com> Reviewed-by: Zhengxiong Jin <Jason.Jin@freescale.com>
2014-12-11ASoC: fsl-sai: backport to 3.12Xiubo Li
Signed-off-by: Xiubo Li <Li.Xiubo@freescale.com> Change-Id: I4e1f12afb9aefa0de69bcbab393eb8ec28f56df1 Reviewed-on: http://git.am.freescale.net:8181/19754 Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com> Reviewed-by: Zhengxiong Jin <Jason.Jin@freescale.com>
2014-12-11ASoC: fsl-sai: Add SND_SOC_DAIFMT_DSP_A/B support.Xiubo Li
o Add SND_SOC_DAIFMT_DSP_A support. o Add SND_SOC_DAIFMT_DSP_B support. Signed-off-by: Xiubo Li <Li.Xiubo@freescale.com> Signed-off-by: Mark Brown <broonie@linaro.org> --- This patch is pulled back from upstream: commit a3f7dcc9cc0392528bff75b17adfcd74fb8a0ecd Change-Id: I6863de1501bf897ec70f2d927046ccd3d2866010 Reviewed-on: http://git.am.freescale.net:8181/19753 Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com> Reviewed-by: Zhengxiong Jin <Jason.Jin@freescale.com>
2014-12-11ASoC: fsl-sai: fix Freescale SAI DAI format setting.Xiubo Li
o Fix some bugs of fsl_sai_set_dai_fmt_tr(). o Add SND_SOC_DAIFMT_LEFT_J support. o Add SND_SOC_DAIFMT_CBS_CFM support. o Add SND_SOC_DAIFMT_CBM_CFS support. o And SND_SOC_DAIFMT_RIGHT_J need to be done in the future. Signed-off-by: Xiubo Li <Li.Xiubo@freescale.com> Signed-off-by: Mark Brown <broonie@linaro.org> --- This patch is pulled back from upstream: commit 13cde090030c7d00e991c85b87c12891cc8e4df4 Change-Id: If49b36a048d2c2b3eedef732ef5bae4eed98bb4b Reviewed-on: http://git.am.freescale.net:8181/19752 Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com> Reviewed-by: Zhengxiong Jin <Jason.Jin@freescale.com>
2014-12-11ASoC: fsl-sai: convert to use regmap API for Freeacale SAIXiubo Li
Signed-off-by: Xiubo Li <Li.Xiubo@freescale.com> Signed-off-by: Mark Brown <broonie@linaro.org> --- This patch is pulled back from upstream: commit 78957fc349bcf29d415a649601581a993ff25e4d Change-Id: I29156c937a15a11c6b46d83fbcaab6e1afe1b767 Reviewed-on: http://git.am.freescale.net:8181/19751 Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com> Reviewed-by: Zhengxiong Jin <Jason.Jin@freescale.com>
2014-12-11ASoC: fsl-sai: Clean up the codeXiubo Li
Makes the code slightly shorter. Signed-off-by: Xiubo Li <Li.Xiubo@freescale.com> Signed-off-by: Mark Brown <broonie@linaro.org> --- This patch is pulled back from upstream: commit 633ff8f8a4393b4a13b94eddd2613198c32035e6 Change-Id: Ic59247589f69e0705d49fc4db9e7d269125856d8 Reviewed-on: http://git.am.freescale.net:8181/19750 Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com> Reviewed-by: Zhengxiong Jin <Jason.Jin@freescale.com>
2014-12-11ASoC: fsl_sai: fix the endianess for SAI fifo data.Xiubo Li
Revert the SAI's endianess for fifo data to/from DMA engine. Signed-off-by: Xiubo Li <Li.Xiubo@freescale.com> Signed-off-by: Mark Brown <broonie@linaro.org> --- This patch is pulled back from upstream: commit 72aa62bed3ea30635156fad95f123a0b665072bf Change-Id: I7c8ec99b9d8292527ba2fc47ff071146b2225fae Reviewed-on: http://git.am.freescale.net:8181/19749 Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com> Reviewed-by: Zhengxiong Jin <Jason.Jin@freescale.com>
2014-12-11ASoC: fsl_sai: Fix one bug for hardware limitation.Xiubo Li
This is maybe one bug or a limitation of the hardware that the {T,R}CR2's Synchronous Mode bits must be set as late as possible, or the SAI device maybe hanged up, and there has not any explaination about this limitation in the SAI Data Sheet. And the {T,R}CR2's Synchronous Mode bits must be set at the same time whether for Tx or Rx stream. Signed-off-by: Xiubo Li <Li.Xiubo@freescale.com> Signed-off-by: Mark Brown <broonie@linaro.org> --- This patch is pulled back from upstream: commit 496a39d9ec238569fac6daceac8f5420c5edc2f1 Change-Id: Ib09d153b20251254277f3efacdc5d5b5d8f8425b Reviewed-on: http://git.am.freescale.net:8181/19748 Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com> Reviewed-by: Zhengxiong Jin <Jason.Jin@freescale.com>
2014-12-11ASoC: fsl_sai: Add disable operation for the corresponding data channel.Xiubo Li
Enables/Disables the corresponding data channel for tx/rx operation. A channel must be enabled before its FIFO is accessed, and then disable it when tx/rx is stopped or idle. Signed-off-by: Xiubo Li <Li.Xiubo@freescale.com> Signed-off-by: Mark Brown <broonie@linaro.org> --- This patch is pulled back from upstream: commit e5d0fa9c3ec59a40e0285d96b65b7f62875acd42 Change-Id: I44a321c2f74580bc6387688777434c88f027c17b Reviewed-on: http://git.am.freescale.net:8181/19747 Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com> Reviewed-by: Zhengxiong Jin <Jason.Jin@freescale.com>
2014-12-11ASoC: fsl_sai: Move the global registers setting to _dai_probe()Xiubo Li
Because we cannot make sure which one of _dai_fmt() and _dai_sysclk() will be firstly called. So move the RCSR/TCSR and TCR1/RCR1's initialization to _dai_probe(), and this can make sure that before any of {T,R}CR{1~5} register to be set the RCSR/TCSR's RE/TE bit has been cleared for the hareware limitation. Signed-off-by: Xiubo Li <Li.Xiubo@freescale.com> Signed-off-by: Mark Brown <broonie@linaro.org> --- This patch is pulled back from upstream: commit e6dc12d7198eddba2e3e7a13feab5c7edde7ba1d Change-Id: Ie77345f4a2d84d55443e84d1c4cb2d2a9db766d0 Reviewed-on: http://git.am.freescale.net:8181/19746 Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com> Reviewed-by: Zhengxiong Jin <Jason.Jin@freescale.com>
2014-12-11ASoC: fsl_sai: Sort local variable in general wayNicolin Chen
Generally we would write code for local variable like: static new_func() { struct xxx *yyy; ... int ret; } But this driver only follows this pattern for some functions, not all. Thus this patch sorts the local variable in the general way. Signed-off-by: Nicolin Chen <Guangyu.Chen@freescale.com> Reviewed-by: Xiubo Li <Li.Xiubo@freescale.com> Signed-off-by: Mark Brown <broonie@linaro.org> --- This patch is pulled back from upstream: commit 4e3a99f5b004b30bc604d82e5498700649148e0d Change-Id: Idcc0aea15b8b1daca140b05c5c9655cea43746b6 Reviewed-on: http://git.am.freescale.net:8181/19745 Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com> Reviewed-by: Zhengxiong Jin <Jason.Jin@freescale.com>
2014-12-11ASoC: fsl_sai: Make dev_err information neaterNicolin Chen
Since using dev_err() there's no need to mention SAI any more, it will print the full name of the driver -- fsl_sai. Signed-off-by: Nicolin Chen <Guangyu.Chen@freescale.com> Reviewed-by: Xiubo Li <Li.Xiubo@freescale.com> Signed-off-by: Mark Brown <broonie@linaro.org> --- This patch is pulled back from upstream: commit 190af12dad975f2ea7d69d1c5c9d36fec64da767 Change-Id: I2a186ded87bcafa273f99840e2eadb9e9ed63eba Reviewed-on: http://git.am.freescale.net:8181/19744 Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com> Reviewed-by: Zhengxiong Jin <Jason.Jin@freescale.com>
2014-12-11ASoC: fsl_sai: Drop useless ret in startup()Nicolin Chen
We can save this ret to make the code neater. Signed-off-by: Nicolin Chen <Guangyu.Chen@freescale.com> Reviewed-by: Xiubo Li <Li.Xiubo@freescale.com> Signed-off-by: Mark Brown <broonie@linaro.org> --- This patch is pulled back from upstream: commit 15b29dae6604d2d2daf586429ff12f26272a868a Change-Id: Ib5d7742e67c1bf4a1e72bcf887fe8fe07250c900 Reviewed-on: http://git.am.freescale.net:8181/19743 Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com> Reviewed-by: Zhengxiong Jin <Jason.Jin@freescale.com>
2014-12-11ASoC: fsl_sai: Drop useless channels check in hw_params()Nicolin Chen
SAi only supports two data channels on hardware level and the driver also does register the min->1 and max->2, so no need to check channels. Signed-off-by: Nicolin Chen <Guangyu.Chen@freescale.com> Reviewed-by: Xiubo Li <Li.Xiubo@freescale.com> Signed-off-by: Mark Brown <broonie@linaro.org> --- This patch is pulled back from upstream: commit d22e28cce80a93578787d273bf1fa26a2be2636b Change-Id: Ia3f1e1375c9a69d7f0259af8e801594be7b464e2 Reviewed-on: http://git.am.freescale.net:8181/19742 Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com> Reviewed-by: Zhengxiong Jin <Jason.Jin@freescale.com>
2014-12-11ASoC: fsl_sai: Use snd_pcm_format_width()Nicolin Chen
Use common helper function snd_pcm_format_width() to make code neater. Signed-off-by: Nicolin Chen <Guangyu.Chen@freescale.com> Reviewed-by: Xiubo Li <Li.Xiubo@freescale.com> Signed-off-by: Mark Brown <broonie@linaro.org> --- This patch is pulled back from upstream: commit 1d7003092771bd2feec30e2f3e5a06aa33479e08 Change-Id: I6baf4f7c72a0d9f6aa332745f9251069c9600ab4 Reviewed-on: http://git.am.freescale.net:8181/19741 Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com> Reviewed-by: Zhengxiong Jin <Jason.Jin@freescale.com>
2014-12-11ASoC: fsl_sai: Keep symmetry for clk_enable() and clk_disable()Nicolin Chen
There are two functions haven't clk_disable_unprepare() if having error. Thus fix them. Signed-off-by: Nicolin Chen <Guangyu.Chen@freescale.com> Reviewed-by: Xiubo Li <Li.Xiubo@freescale.com> Signed-off-by: Mark Brown <broonie@linaro.org> --- This patch is pulled back from upstream: commit 1fb2d9d7465bcbb519c582fa4a3bd04ff4fce2d2 Change-Id: Ia4a2525d2e32949f2092fcd4de86d46ada27b096 Reviewed-on: http://git.am.freescale.net:8181/19740 Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com> Reviewed-by: Zhengxiong Jin <Jason.Jin@freescale.com>
2014-12-11ASoC: fsl-sai: Remove fsl_sai_remove()Xiubo Li
There is no need of this function and makes the code slightly shorter Signed-off-by: Xiubo Li <Li.Xiubo@freescale.com> Signed-off-by: Mark Brown <broonie@linaro.org> --- This patch is pulled back from upstream: commit a6af47ae5399baf4f5a2426b2121c1bcb9da4019 Change-Id: I194d8ebdd181be51985a2440b7da038ba933dc5c Reviewed-on: http://git.am.freescale.net:8181/19739 Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com> Reviewed-by: Zhengxiong Jin <Jason.Jin@freescale.com>
2014-12-11ASoC: Add SAI SoC Digital Audio Interface driver.Xiubo Li
This adds Freescale SAI ASoC Audio support. This implementation is only compatible with device tree definition. Features: o Supports playback/capture o Supports 16/20/24 bit PCM o Supports 8k - 96k sample rates o Supports master and slave mode. Signed-off-by: Alison Wang <b18965@freescale.com> Signed-off-by: Xiubo Li <Li.Xiubo@freescale.com> Signed-off-by: Mark Brown <broonie@linaro.org> --- This patch is pulled back from upstream: commit 4355082149429d1f87b6fbfc3ebc6305a5372ce2 Change-Id: Id2c5064a47530ea7cf3e1442267efcbc8bef0f06 Reviewed-on: http://git.am.freescale.net:8181/19738 Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com> Reviewed-by: Zhengxiong Jin <Jason.Jin@freescale.com>
2014-12-11watchdog: imx2_wdt: adds big endianness support.Xiubo Li
This watchdog driver will be working on IMX2+, Vybrid, LS1, LS2+ platforms, and will be in different endianness mode in those SoCs: SoCs WDT endian mode ------------------------------------ IMX2+ LE Vybird LE LS1 BE LS2 LE Signed-off-by: Xiubo Li <Li.Xiubo@freescale.com> Reviewed-by: Guenter Roeck <linux@roeck-us.net> Signed-off-by: Wim Van Sebroeck <wim@iguana.be> --- This patch is pulled back from upstream: commit f728f4bfc495a588abda4661c09595112677be25 Change-Id: I679a13328e7ee02fbc23dad99a3e672c6186fc4c Reviewed-on: http://git.am.freescale.net:8181/19717 Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com> Reviewed-by: Zhengxiong Jin <Jason.Jin@freescale.com>
2014-12-11watchdog: imx2_wdt: convert to use regmap API.Xiubo Li
This watchdog driver will be working on IMX2+, Vybrid, LS1, LS2+ platforms, and will be in different endianness mode in those SoCs: SoCs CPU endian mode WDT endian mode ------------------------------------------------ IMX2+ LE LE Vybird LE LE LS1 LE BE LS2 LE LE Other possible SoCs: SoCs CPU endian mode WDT endian mode ------------------------------------------------ Soc1 BE BE Soc2 BE LE And also the watchdog's registers will be 32-bits for some versions, and though it is 16-bits in IMX2+, Vybird and LS+. Using the regmap APIs, could be more easy to support different endianness and also more easy to support 32-bits version... Signed-off-by: Xiubo Li <Li.Xiubo@freescale.com> Reviewed-by: Guenter Roeck <linux@roeck-us.net> Acked-by: Shawn Guo <shawn.guo@linaro.org> Signed-off-by: Wim Van Sebroeck <wim@iguana.be> --- This patch is pulled back from upstream: commit a7977003293ed0c13e62d95fc8cd1d20e22b7282 Change-Id: I3dbc53e41d656ba039e6fa5b1a0aacfdb6021446 Reviewed-on: http://git.am.freescale.net:8181/19716 Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com> Reviewed-by: Zhengxiong Jin <Jason.Jin@freescale.com>
2014-12-11watchdog: imx2_wdt: Sort the header files alphabeticallyXiubo Li
Signed-off-by: Xiubo Li <Li.Xiubo@freescale.com> Reviewed-by: Guenter Roeck <linux@roeck-us.net> Acked-by: Shawn Guo <shawn.guo@linaro.org> Signed-off-by: Wim Van Sebroeck <wim@iguana.be> --- This patch is pulled back from upstream: commit 30cb042a846353929042d93d13c9f8e1e5227aa7 Change-Id: I1135180b413b9b194a54449aa276b1e64c88248b Reviewed-on: http://git.am.freescale.net:8181/19715 Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com> Reviewed-by: Zhengxiong Jin <Jason.Jin@freescale.com>
2014-12-11watchdog: imx2_wdt: disable watchdog timer during low power modeXiubo Li
We should set watchdog timer to be disabled in low power mode, as there is no service running in background, otherwise, system will reset unexpected. Signed-off-by: Anson Huang <b20788@freescale.com> Acked-by: Shawn Guo <shawn.guo@linaro.org> Reviewed-by: Guenter Roeck <linux@roeck-us.net> Signed-off-by: Wim Van Sebroeck <wim@iguana.be> --- This patch is pulled back from upstream: commit 1a9c5efa576eccadd2836a1e53dcea21f999c180 Change-Id: I17444286a483479bc47c4e2e449881d8bac1c221 Reviewed-on: http://git.am.freescale.net:8181/19714 Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com> Reviewed-by: Zhengxiong Jin <Jason.Jin@freescale.com>
2014-12-11gianfar: Fix the section mismatch warnings.Xiubo Li
Building with CONFIG_DEBUG_SECTION_MISMATCH enabled, the following WARNING is occured: LD drivers/net/built-in.o WARNING: drivers/net/built-in.o(.text+0xcd4c): Section mismatch in reference from the function gfar_probe() to the function .init.text:gfar_init_addr_hash_table() The function gfar_probe() references the function __init gfar_init_addr_hash_table(). This is often because gfar_probe lacks a __init annotation or the annotation of gfar_init_addr_hash_table is wrong. Signed-off-by: Xiubo Li <Li.Xiubo@freescale.com> Signed-off-by: David S. Miller <davem@davemloft.net> --- This patch is pulled back from upstream: commit 898157ed7473683d515532f9f14bfd2f7743ccd2 Change-Id: If9e87dfccedd8d3eb9e0467ad14b7a940b17249f Reviewed-on: http://git.am.freescale.net:8181/19676 Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com> Reviewed-by: Zhengxiong Jin <Jason.Jin@freescale.com>
2014-12-11regmap: mmio: Add regmap_mmio_regbits_check.Xiubo Li
Fix the support for 1/2/8 bytes wide register address checking. Signed-off-by: Xiubo Li <Li.Xiubo@freescale.com> Signed-off-by: Mark Brown <broonie@linaro.org> --- This patch is pulled back from upstream: commit 451485ba6bfbed36220b9e710fca0525f62e771d Change-Id: I3950b3721b3998d3cdb7e6cac69ec0b4a65c3efb Reviewed-on: http://git.am.freescale.net:8181/19675 Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com> Reviewed-by: Zhengxiong Jin <Jason.Jin@freescale.com>
2014-12-11regmap: mmio: Fix the bug of 'offset' value parsing.Xiubo Li
'offset = *(u32 *)reg;' This will be okey for 32/64-bits register device, but for 8/16-bits register ones, the 'offset' value will overflow, for example: The IMX2 Watchdog, whose registers and values are all 16-bits: If the IO base virtual address is ctx->regs = 0x888c0000, and the now doing the 0x00 register accessing: Using 'offset = *(u32 *)reg' the offset value will possiblly be 0x77310000, Using 'offset = *(u16 *)reg' the offset value will be 0x0000. In the regmap_mmio_gather_write(), ctx->regs + 0x7731000 will be 0xffbd0000, but actually it should be ctx->regs + 0x0000 = 0x888c0000. Signed-off-by: Xiubo Li <Li.Xiubo@freescale.com> Signed-off-by: Mark Brown <broonie@linaro.org> --- This patch is pulled back from upstream: commit 88cb32c657ed13dc29561d0f4aa154e0fd25759f Change-Id: Iddbdf33a3831062b250dfdc1e2067712d1153182 Reviewed-on: http://git.am.freescale.net:8181/19674 Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com> Reviewed-by: Zhengxiong Jin <Jason.Jin@freescale.com>
2014-12-11regmap: mmio: Add support for 1/2/8 bytes wide register address.Xiubo Li
Since regmap core and mmio have already support for 1/2/8 bytes wide values, so adds support for 1/2/8 bytes wide registers address. Signed-off-by: Xiubo Li <Li.Xiubo@freescale.com> Signed-off-by: Mark Brown <broonie@linaro.org> --- This patch is pulled back from upstream: commit 932580409a9dacbf42215fa737bf06ae2c0aa624 Change-Id: I148882774797f7a53d6123d0b5dd757231025b6e Reviewed-on: http://git.am.freescale.net:8181/19673 Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com> Reviewed-by: Zhengxiong Jin <Jason.Jin@freescale.com>
2014-12-11regmap: mmio: add regmap_mmio_{regsize, count}_check.Xiubo Li
Signed-off-by: Xiubo Li <Li.Xiubo@freescale.com> Signed-off-by: Mark Brown <broonie@linaro.org> --- This patch is pulled back from upstream: commit 41b0c2c976a8758a2b7f5b14cbc5d1a7436932cc Change-Id: I8446ffd9118e759cb68784dd0ee59e9382c698ec Reviewed-on: http://git.am.freescale.net:8181/19672 Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com> Reviewed-by: Zhengxiong Jin <Jason.Jin@freescale.com>
2014-12-11hwmon: (ltc2945) Fix 1st comment lineGuenter Roeck
Somehow a couple of spaces got added to the first line. Remove them. No code change. Signed-off-by: Guenter Roeck <linux@roeck-us.net> (cherry picked from commit 86b89d73f9f3648c9f3b375d7841bef18a27fd2a) Change-Id: Ic8011315767d9979151c08fc22e483eb01ae1f3b Reviewed-on: http://git.am.freescale.net:8181/19636 Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com> Reviewed-by: Zhengxiong Jin <Jason.Jin@freescale.com>
2014-12-11hwmon: (ltc2945) Don't crash the kernel unnecessarilyGuenter Roeck
An implementation error should not crash the kernel if it is avoidable. Replace BUG() with WARN_ONCE(). Signed-off-by: Guenter Roeck <linux@roeck-us.net> (cherry picked from commit f75d72309192e52ef9a3efb390b1c4f408c142df) Change-Id: Ib1d20bb2f35fd6f5c551f137102dbd12c68aa489 Reviewed-on: http://git.am.freescale.net:8181/19635 Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com> Reviewed-by: Zhengxiong Jin <Jason.Jin@freescale.com>
2014-12-11hwmon: Driver for Linear Technologies LTC2945Guenter Roeck
LTC2945 is a system monitor that measures current, voltage, and power. Signed-off-by: Guenter Roeck <linux@roeck-us.net> (cherry picked from commit 6700ce035f830149d48c270d84736debfb67179e) Change-Id: I7d658c4e03f5e9108fbf1e407b3f1bdecda7ef1d Reviewed-on: http://git.am.freescale.net:8181/19634 Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com> Reviewed-by: Zhengxiong Jin <Jason.Jin@freescale.com>
2014-12-11hwmon: Do not accept invalid name attributesGuenter Roeck
hwmon name attributes must not include '-', as specified in Documentation/hwmon/sysfs-interface. Also filter out spaces, tabs, wildcards, and newline characters. Tested-by: Jean Delvare <jdelvare@suse.de> Reviewed-by: Jean Delvare <jdelvare@suse.de> Signed-off-by: Guenter Roeck <linux@roeck-us.net> (cherry picked from commit 648cd48c9e566f53c5df30d79857e0937ae13b09) Change-Id: Ib723f0a5304212bede9017bf63326aa2a59b6bc5 Reviewed-on: http://git.am.freescale.net:8181/19633 Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com> Reviewed-by: Zhengxiong Jin <Jason.Jin@freescale.com>
generated by cgit v0.10.2 at 2024-09-30 08:12:48 (GMT)