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The rtfrqmax & rtfrqmin set the bounds of the expected frequency of the
oscillator, when SEC runs at its maximum frequency. For certain platforms
(f.i. T2080), the oscillator is very fast and thus if the SEC runs at
a lower than normal frequency, the ring oscillator is incorrectly detected
as being out of bounds.
This patch effectively disables the maximum frequency check, by setting a
high enough maximum allowable frequency for the oscillator. The reasoning
behind this is that usually a broken oscillator will run too slow
(i.e. not run at all) rather than run too fast.
Signed-off-by: Alex Porosanu <alexandru.porosanu@freescale.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
(cherry picked from commit b061f3fefcffa0cdcdc61ae2a1123a4e7697d452)
Change-Id: I796cf92bf08c66d0499bfe3962dcd67afd51a72e
Reviewed-on: http://git.am.freescale.net:8181/23838
Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com>
Reviewed-by: Horia Ioan Geanta Neag <horia.geanta@freescale.com>
Reviewed-by: Matthew Weigel <Matthew.Weigel@freescale.com>
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Core reset may cause issue if using the proxy mode of MPIC.
Use the mixed mode of MPIC if enabling CPU hotplug.
Change-Id: I0e6b9dbd2126f0fb0af917d25c948266417bb71f
Signed-off-by: Chenhui Zhao <chenhui.zhao@freescale.com>
Reviewed-on: http://git.am.freescale.net:8181/24102
Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com>
Reviewed-by: Yang Li <LeoLi@freescale.com>
Reviewed-by: Dongsheng Wang <dongsheng.wang@freescale.com>
Reviewed-by: Matthew Weigel <Matthew.Weigel@freescale.com>
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Due to an erratum, after core soft reset, core state machine registers
need to force release manually to avoid cache coherence issue.
Signed-off-by: Zhang Zhuoyu <Zhuoyu.Zhang@freescale.com>
----
Fix previous known issue
http://git.am.freescale.net:8181/21918
Change-Id: I44a7cf8a315bafe7dc413f73d2af2579da246fbb
Reviewed-on: http://git.am.freescale.net:8181/23520
Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com>
Reviewed-by: Matthew Weigel <Matthew.Weigel@freescale.com>
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CPU hotplug should always reset core and boots up the same path
as a cold boot to be compatible with kexec.
Signed-off-by: Zhang Zhuoyu <Zhuoyu.Zhang@freescale.com>
----
Fix previous known issue
http://git.am.freescale.net:8181/21918
Patch Sent Upstream
http://patchwork.ozlabs.org/patch/393683/
Change-Id: I668b59b4250ef62395a6fd8c22ea64f64af9d106
Reviewed-on: http://git.am.freescale.net:8181/23519
Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com>
Reviewed-by: Yuantian Tang <yuantian.tang@freescale.com>
Reviewed-by: Matthew Weigel <Matthew.Weigel@freescale.com>
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fsl_set_power_except() checks only for fman node. For
all other ips, it doesn't program rcpm register, and
goes to err handling code. Hence, a check for usb is
put so that fman code only runs for fman ip
Signed-off-by: Ramneek Mehresh <ramneek.mehresh@freescale.com>
Change-Id: Ia8b2280cbcd16b7935032c72fcc49dadcd2f263c
Reviewed-on: http://git.am.freescale.net:8181/23989
Reviewed-by: Nikhil Badola <nikhil.badola@freescale.com>
Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com>
Reviewed-by: Matthew Weigel <Matthew.Weigel@freescale.com>
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ioctl_dma_map. String length check
Added check to ensure the string copied from user space is within
the length allowed for by the buffer and is null terminated.
qm_shutdown_fq. Remove deadcode
Removed the case statement label for QM_MCR_NP_STATE_OOS since
that condition is checked for earlier in the code and in that
case the function exits immediately.
ioctl_dma_lock. Remove NULL dereference
A pointer is made null and then there is an attempt to dereference one
of the members of the struct that it points to. This condition is never
reached normally, but in error conditions this path of execution may be
possible.
Added return -EFAULT to exit function safely and unlocked locked resources
usdpaa_get_unmapped_area. Arithmetic overflow protection
Added a check to ensure that memory length passed in does not result in
an invalid size to be passed because of a possible arithmetic overflow
that can occur in the subtraction in the macro USDPAA_MEM_ROUNDUP.
qman_ceetm_ccg_claim. If condition fix
Removed a check against an unsigned int value that checks if it is
below zero (negative). The unsigned value cannot be negative and the
compare will always fail in reality.
qman_create_portal. Add comment to clarify flow
Clarified why no check is made to ensure that qm_mr_current()
returned successfully. The addition of a redundant check was rejected
because it impairs the reader's understanding of the flow
by implying the possibility of a physically impossible path.
dpa_alloc_new. Fix memory leak in error conditions
Previously allocated memory which is passed by reference in
success (list_add_tail) is not freed in error conditions
that occur in other parts of the function. Added code to free
allocated memory in error cases.
qman_create_portal. Fix memory leak in error path
Added cleanup code that deletes malloced memory in case
of function failure after memory is allocated.
ioctl_dma_map. Input bound checks on values from USDPAA
Check the struct usdpaa_ioctl_dma_map, input, to ensure that values
copied from user space are valid input.
qman_init. Check init_pcfg return
Previously unused assignment is now being used. The return of
init_pcfg() was not checked for success. Now we check for success
and print an error message in case of failure.
There is a similar issue in bman_driver.
bman_init. Check init_pcfg return
Added check to ensure init_pcfg() is returning successfully.
Print an error message and return if in error case.
There is a similar issue in qman_driver.
Signed-off-by: Ahmed Mansour <Ahmed.Mansour@freescale.com>
Change-Id: I230678948c3e8e43aa5738045244c5dac0b5f5f5
Reviewed-on: http://git.am.freescale.net:8181/21381
Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com>
Reviewed-by: Jeffrey Ladouceur <Jeffrey.Ladouceur@freescale.com>
Reviewed-by: Matthew Weigel <Matthew.Weigel@freescale.com>
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Set the affinity of the USDPAA IRQ to match the affinity of the
calling process
Signed-off-by: Roy Pledge <Roy.Pledge@freescale.com>
Change-Id: I077a48ae5a77fe35a77dfae65c298fa6fa2aecda
Reviewed-on: http://git.am.freescale.net:8181/23675
Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com>
Reviewed-by: Geoff Thorpe <Geoff.Thorpe@freescale.com>
Reviewed-by: Jeffrey Ladouceur <Jeffrey.Ladouceur@freescale.com>
Reviewed-by: Matthew Weigel <Matthew.Weigel@freescale.com>
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Add asm/smp.h, and only compile the cluster related code
when CPU hotplug is enabled.
Change-Id: I264ff297ca1ee29bf8c477b09bce98eeb27140ee
Signed-off-by: Chenhui Zhao <chenhui.zhao@freescale.com>
Reviewed-on: http://git.am.freescale.net:8181/23752
Reviewed-by: Yang Li <LeoLi@freescale.com>
Reviewed-by: Zhuoyu Zhang <Zhuoyu.Zhang@freescale.com>
Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com>
Reviewed-by: Matthew Weigel <Matthew.Weigel@freescale.com>
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Default rx frame queue id should match with usdpaa xml policy
file. Policy file is used to set FMAN configuration.
Signed-off-by: Sandeep Singh <sandeep@freescale.com>
Change-Id: I696d604c0811a8aa0b1ccf4ca6a67a0384eb558d
Reviewed-on: http://git.am.freescale.net:8181/23859
Reviewed-by: Vakul Garg <vakul@freescale.com>
Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com>
Reviewed-by: Matthew Weigel <Matthew.Weigel@freescale.com>
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SEC driver offers a function for geting the handle
to an available JR (caam_jr_alloc(...)
This is mainly needed for split-key calculation per
SA. There's no need to search for the JR in the
device tree. This patch removes the unneeded code
and replaces it with the proper SEC API call.
Change-Id: Ibc8b4b216d5699fe5ec7d3d49b8a3560ab79ede0
Signed-off-by: Alex Porosanu <alexandru.porosanu@freescale.com>
Reviewed-on: http://git.am.freescale.net:8181/23860
Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com>
Reviewed-by: Marian-Cornel Chereji <marian.chereji@freescale.com>
Reviewed-by: Horia Ioan Geanta Neag <horia.geanta@freescale.com>
Reviewed-by: Matthew Weigel <Matthew.Weigel@freescale.com>
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Change-Id: I2d6cead7b62116cd6a264ec91d82f3bdc3a03c10
Signed-off-by: Mandy Lavi <mandy.lavi@freescale.com>
Reviewed-on: http://git.am.freescale.net:8181/23939
Reviewed-by: Igal Liberman <Igal.Liberman@freescale.com>
Tested-by: Richard Schmitt <richard.schmitt@freescale.com>
Reviewed-by: Richard Schmitt <richard.schmitt@freescale.com>
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For HASH tables sometimes when a user modifies the key of an entry
the entry needs to be moved to a different bucket. The index management
list is sorted so that indexes are always ascending. When tempering with
the position of an entry in the internal Cc nodes for a HASH table, the
position of the entry in the index management list must also be
updated.
Change-Id: If4b48282c407ed248dfd389cc0c8ae856fb7db75
Signed-off-by: Marian Chereji <marian.chereji@freescale.com>
Reviewed-on: http://git.am.freescale.net:8181/23700
Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com>
Reviewed-by: Radu-Andrei Bulie <Radu.Bulie@freescale.com>
Reviewed-by: Matthew Weigel <Matthew.Weigel@freescale.com>
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Signed-off-by: Wujie Qiu <B49553@freescale.com>
Change-Id: Icf01605c71a19e0ffa01e85b1ed93eb0704493da
Reviewed-on: http://git.am.freescale.net:8181/23831
Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com>
Reviewed-by: Xiaobo Xie <X.Xie@freescale.com>
Reviewed-by: Matthew Weigel <Matthew.Weigel@freescale.com>
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Since PHYs for dwc3 is optional (not all SoCs having PHYs for DWC3
should be programmed), do not return from probe if the USB PHY library
returns -ENODEV as that indicates the platform does not have a
programmable PHY.
While this can be considered as a temporary fix, a long term solution
would be to add 'nop' PHY for platforms that does not have programmable
PHY.
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Reviewed-by: Roger Quadros <rogerq@ti.com>
Signed-off-by: Felipe Balbi <balbi@ti.com>
---
Backported from open source linux
commit 122f06e60f90a43d9b2fb30662af688dfb759379
Change-Id: I69055c21ee4857db5ef941ad6eac20051f0d84fc
Reviewed-on: http://git.am.freescale.net:8181/23713
Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com>
Reviewed-by: Ramneek Mehresh <ramneek.mehresh@freescale.com>
Reviewed-by: Matthew Weigel <Matthew.Weigel@freescale.com>
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When CPU SMT feature disabled on e6500, cluster can't enter PCL10.
This patch fix it.
Signed-off-by: Zhang Zhuoyu <Zhuoyu.Zhang@freescale.com>
Change-Id: I362be661ceefd78e5d8b1d6f36331add4e9ef0af
Reviewed-on: http://git.am.freescale.net:8181/23341
Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com>
Reviewed-by: Hongtao Jia <hongtao.jia@freescale.com>
Reviewed-by: Matthew Weigel <Matthew.Weigel@freescale.com>
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If all cores of a cluster are disabled in u-boot, the cluster mask
we calculate through cpu dts node is unreliable, this patch use
hard cored threads number per cluster to fix it.
Signed-off-by: Zhang Zhuoyu <Zhuoyu.Zhang@freescale.com>
Change-Id: I8c76b4c592bebdacf55dc6c9d50bd65ea0fce89f
Reviewed-on: http://git.am.freescale.net:8181/23340
Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com>
Reviewed-by: Yuantian Tang <yuantian.tang@freescale.com>
Reviewed-by: Hongtao Jia <hongtao.jia@freescale.com>
Reviewed-by: Matthew Weigel <Matthew.Weigel@freescale.com>
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U-boot patches up the device tree crypto node for the era property.
crypto node alias was missing in the ls1020 device trees.
Signed-off-by: Ruchika Gupta <ruchika.gupta@freescale.com>
Change-Id: I335cc0765a1f66c72d98bab737aab3012448bf18
Reviewed-on: http://git.am.freescale.net:8181/23508
Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com>
Reviewed-by: Horia Ioan Geanta Neag <horia.geanta@freescale.com>
Reviewed-by: Matthew Weigel <Matthew.Weigel@freescale.com>
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Linux.
This patch is workaround for watchdog expiry problem on running
netperf client on DUT with UDP traffic with ASF enabled.
Change-Id: Ib9a9c8fd13e5ecb6f9daf30deb8f128b629c002d
Signed-off-by: Sahil Malhotra <sahilmalhotra@freescale.com>
CR:ENGR00336061
Reviewed-on: http://git.am.freescale.net:8181/23065
Reviewed-by: Sandeep Malik <Sandeep.Malik@freescale.com>
Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com>
Reviewed-by: Claudiu Manoil <claudiu.manoil@freescale.com>
Reviewed-by: Richard Schmitt <richard.schmitt@freescale.com>
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Placing required compilation flags and hooks in gianfar
driver for both ARM and PowerPC platforms.
Signed-off-by: Ganga Negi <ganga.negi@freescale.com>
Change-Id: I2f6c8fe40a2223013559bc6909a60e8963aa2a96
CR:ENGR00338962
(cherry picked from commit 509f3236615193c77e07797cde4729ccc8cb2ef5)
Reviewed-on: http://git.am.freescale.net:8181/23585
Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com>
Reviewed-by: Claudiu Manoil <claudiu.manoil@freescale.com>
Reviewed-by: Richard Schmitt <richard.schmitt@freescale.com>
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Flag CPU_BIG_ENDIAN is not defined in powerpc config
file so it is replace with __BIG_ENDIAN flag.
Signed-off-by: Alok Makhariya <B46187@freescale.com>
Change-Id: I8cf0b83ab53a6dd544de81cf17ad0441ebb08ce5
Reviewed-on: http://git.am.freescale.net:8181/23694
Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com>
Reviewed-by: Horia Ioan Geanta Neag <horia.geanta@freescale.com>
Reviewed-by: Richard Schmitt <richard.schmitt@freescale.com>
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This reverts commit 5e921ed07acbc6f05536aac89b9edc2578663840.
Change-Id: Ic4d1166b5ad6419f369e3be278f41ea5764ff6fc
Reviewed-on: http://git.am.freescale.net:8181/23784
Reviewed-by: Matthew Weigel <Matthew.Weigel@freescale.com>
Tested-by: Matthew Weigel <Matthew.Weigel@freescale.com>
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Change-Id: I428d24ec05b1e6ef2137ad2ba6385ddfa3a01872
Signed-off-by: Mandy Lavi <mandy.lavi@freescale.com>
Reviewed-on: http://git.am.freescale.net:8181/22882
Reviewed-by: Nir Erez <nir.erez@freescale.com>
Reviewed-by: Matthew Weigel <Matthew.Weigel@freescale.com>
Tested-by: Matthew Weigel <Matthew.Weigel@freescale.com>
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In order to use the SPI nor framework to detect NOR flash.
Signed-off-by: Mingkai.Hu <Mingkai.Hu@freescale.com>
Change-Id: I5f7b42316cefb618278d739c212bd7cbd4833e9c
Reviewed-on: http://git.am.freescale.net:8181/23450
Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com>
Reviewed-by: Shengzhou Liu <Shengzhou.Liu@freescale.com>
Reviewed-by: Matthew Weigel <Matthew.Weigel@freescale.com>
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- enable CONFIG_RTC_DRV_DS1307 to support DS1339 RTC for T1024RDB.
- enable CONFIG_I2C_MUX and CONFIG_I2C_MUX_PCA954x for T102x/T104x QDS/RDB.
- enable CONFIG_MTD_SPI_NOR_BASE and update compatible to "micron,n25q512ax3"
for SPI flash on T102xRDB and T104xRDB.
- fix typo for CONFIG_SENSORS_LM90.
Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com>
Change-Id: I3506779d51192d2bfaa28a3f863c019b612b6f96
Reviewed-on: http://git.am.freescale.net:8181/23525
Reviewed-by: Shaohui Xie <Shaohui.Xie@freescale.com>
Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com>
Reviewed-by: Matthew Weigel <Matthew.Weigel@freescale.com>
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Signed-off-by: Minghuan Lian <Minghuan.Lian@freescale.com>
Change-Id: Iaf58815549266cde2d082e789c34a975259d854f
Reviewed-on: http://git.am.freescale.net:8181/23497
Reviewed-by: Mingkai Hu <Mingkai.Hu@freescale.com>
Reviewed-by: Matthew Weigel <Matthew.Weigel@freescale.com>
Tested-by: Matthew Weigel <Matthew.Weigel@freescale.com>
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In PM resume function, we call ls_pcie_host_init function to
re-initialize PCIe controller.
Signed-off-by: Minghuan Lian <Minghuan.Lian@freescale.com>
Change-Id: Ife9fe90d63563ce9c56f4757bd233b4df4c35188
Reviewed-on: http://git.am.freescale.net:8181/23498
Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com>
Reviewed-by: Dongsheng Wang <dongsheng.wang@freescale.com>
Reviewed-by: Mingkai Hu <Mingkai.Hu@freescale.com>
Reviewed-by: Matthew Weigel <Matthew.Weigel@freescale.com>
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Currently, pcie-designware.c only supports two ATUs, ATU0 is used
for CFG0 and MEM, ATU1 is used for CFG1 and IO. There is a conflict
when MEM and CFG0 are accessed simultaneously. The patch adds
'num-atus' property to PCIe dts node to describe the number of
PCIe controller's ATUs. If num_atus is bigger than or equal to 4,
we will change ATUs assignment: ATU0 for CFG0, ATU1 for CFG1,
ATU2 for MEM, ATU3 for IO.
Signed-off-by: Minghuan Lian <Minghuan.Lian@freescale.com>
The patch is upstreaming
http://patchwork.ozlabs.org/patch/409170/
Change-Id: I317bf8a3648eafeb221da6479b7788de0028d8c5
Reviewed-on: http://git.am.freescale.net:8181/23496
Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com>
Reviewed-by: Mingkai Hu <Mingkai.Hu@freescale.com>
Reviewed-by: Matthew Weigel <Matthew.Weigel@freescale.com>
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Added cache controller compatible strings for T2080, B4420, T1040
and T1024. PAMU driver searches for a matching string while setting
up L3 cache stashing.
Signed-off-by: Varun Sethi <Varun.Sethi@freescale.com>
Change-Id: I7503dc2d3ae2a7d38ad5aa395fb201dd4e377b96
Reviewed-on: http://git.am.freescale.net:8181/23418
Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com>
Reviewed-by: Vakul Garg <vakul@freescale.com>
Reviewed-by: Matthew Weigel <Matthew.Weigel@freescale.com>
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In function, ahash_final_no_ctx space is allocated for base edesc
and hw desc commands, link tables. After SEC has finished executing
the descriptor, ahash_unmap is called. In this function, unmapping
of sec_sg_dma is done on the basis of variable sec4_sg_bytes in edesc.
Since sec4_sg_bytes was not initialized when edesc was allocated,
this results in kernel crash.
caam algorithms registered in /proc/crypto
Unable to handle kernel paging request at virtual address 7f5d8000
pgd = 80003000
[7f5d8000] *pgd=80000080005003, *pmd=00000000
Internal error: Oops: 206 [#1] SMP THUMB2
Modules linked in:
CPU: 0 PID: 96 Comm: cryptomgr_test Not tainted 3.12.19-rt30+ls1+gd62899c9b13f #4
task: ef1b7480 ti: cf98a000 task.ti: cf98a000
PC is at dma_cache_maint_page+0x3c/0xd4
LR is at __dma_page_dev_to_cpu+0x19/0x80
pc : [<8001285c>] lr : [<80012951>] psr: b0000133
sp : cf98b9b0 ip : 80012c09 fp : 7f5d8000
r10: 00000014 r9 : 8053f2c0 r8 : 804e0f04
r7 : 00000001 r6 : 00004000 r5 : 80558000 r4 : 24940000
r3 : 805215c0 r2 : ff080000 r1 : 00000340 r0 : 80558000
Flags: NzCV IRQs on FIQs on Mode SVC_32 ISA Thumb Segment kernel
Control: 70c53c7d Table: 80003000 DAC: f45b2700
Process cryptomgr_test (pid: 96, stack limit = 0xcf98a248)
Stack: (0xcf98b9b0 to 0xcf98c000)
b9a0: 00000001 24940000 00000014 7f5d8000
b9c0: 00000001 cf8adc00 cf912000 00000014 00000000 80012951 8001514d 00000014
b9e0: 81579080 80012c09 80012c09 00000000 cf8adc00 80249d89 00000000 00210020
ba00: 00000000 40000193 81573b80 802f96c5 00000001 800302f5 cf98bd6c cf98bcfc
ba20: 00000000 cf98bd6c cf98bd00 cf98bd68 00000003 00000000 00000001 8002e021
ba40: 0000001c 0000001c 000cf912 00000001 804e0f04 80012879 00000001 0000001c
ba60: 00000040 80f4a240 00000001 cf8d3c00 000014b4 00000109 cf8d3c00 81578c44
ba80: 00000001 81579080 cf8d3c00 802877ad 804d9c44 cf8d3c00 0000010a 80244945
baa0: 00000000 80012879 cf912040 cf98bcf0 81578e00 0000010a cf8d3cc0 0000003f
bac0: 00001360 81578c44 81574180 0000012c 81574188 ffff8c3a 0000003f 80522e44
bae0: 00000001 802883d1 80288351 0000000c 00000020 00000020 000cf912 00000001
bb00: 804e0f04 80012879 00000001 00000020 00000018 80f4a240 00000001 cf8d3c00
bb20: 000014f0 0000010c 00000860 80012951 cf8d3c00 0000010d 00000001 81579080
bb40: cf8d3c00 80249cf1 0000010c 802449ff 00000000 81573b80 cf912018 cf8adc00
bb60: 81578e00 0000010d cf8d3cc0 0000003f 802f7d9c 81578c44 81574180 0000012c
bb80: 81574188 ffff8c3a 0000003f 80522e44 00000001 802883d1 80288351 0000000c
bba0: 00000001 cf98a000 cf98a000 00000003 804d80c0 00000100 80523c40 8001b07f
bbc0: 802f7da2 00000000 0000000a 00208040 ffff8c39 00000000 cf98a018 40000193
bbe0: 804d3e3c 00000000 cf98bc64 cf98a018 804d4b80 cf98a000 804deb60 8001b185
bc00: cf98a008 8001b6b5 00000087 8000ca01 f0002000 cf98bc30 804decdc 800083e3
bc20: 802f7da2 00000133 ffffffff 802f9a9b 00000000 00000000 00000001 00000000
bc40: 81573b80 cf98bdcc 00000000 cf98bc88 cf98a018 804d4b80 cf98a000 804deb60
bc60: 800128f5 cf98bc78 802f7d9d 802f7da2 00000133 ffffffff 00000001 00000000
bc80: cf98bcf4 00030002 00000014 00000014 802f8011 804d4b80 804e0f04 80012879
bca0: 00000050 00000050 000cf970 00000001 804e0f04 80012879 00000001 00000270
bcc0: 80f4ae00 800128f5 00000000 804e0f04 00000040 5c200014 00000033 80012915
bce0: 00000020 ef1b7480 cf98bdcc cf98bdc8 cf98bd08 cf98bd5c cf98a000 00000001
bd00: 00000001 802f8011 7fffffff 7fffffff cf98bd50 802f75c3 cf8d3c80 010d010c
bd20: 00000001 802447a1 0000010d cf8d3c00 cf98bdcc 00010000 ef1b7480 7fffffff
bd40: cf98bdcc cf98bdc8 cf98bd50 802f8283 cf912018 00000001 00000000 ef1b7480
bd60: cf98bddc cf98bddc 00000002 cf98bdc8 804f6b24 cf8486a0 cf98bd90 cf8efb80
bd80: 00000001 cf98bdc8 00000000 802f82db cf970000 80136d85 cf8adc00 80137097
bda0: ef07d308 ef1b74c8 804f6b3d 0000000e ef07d308 00000000 cf8b69c0 804f6b24
bdc0: 00000007 00000000 00000000 00010001 dead4ead ffffffff ffffffff cf98bd60
bde0: cf98bd60 00000000 cf965000 cf964000 cf963000 cf962000 cf961000 cf960000
be00: cf95f000 cf95e000 80f4aca2 00000000 00000008 00000000 80f4abc2 00000e90
be20: 0000000e cf95ee90 00000000 804e0f04 00000000 5c200014 00000000 80012915
be40: 80015141 80f4ae00 00000270 cf970000 cf911010 80249423 00000001 00000000
be60: 8054abc8 000c000b 04410000 00000014 cf848638 00000000 cf970000 cf970040
be80: cf848638 ef36b780 0000008a cf970000 00000000 00000007 804f6b24 ef36b7c0
bea0: 00000400 00000064 00000000 801371db 00000000 804f6b24 00000007 cf970000
bec0: 80313bac 00000000 ffffffff 80137249 ef36b780 80137209 0000008a 80136d0d
bee0: e7fddef0 e7fddef0 e7fddef0 e7fddef0 e7fddef0 e7fddef0 e7fddef0 e7fddef0
bf00: e7fddef0 e7fddef0 e7fddef0 e7fddef0 00000001 ef081e08 ef081e04 ef1b7480
bf20: 00000000 ef36b780 00000000 ef36b780 801352d5 00000000 00000000 00000000
bf40: 00000000 801352ed ef081df4 80029395 e7fddef0 00000000 e7fddef0 ef36b780
bf60: 00000000 00000000 dead4ead ffffffff ffffffff cf98bf74 cf98bf74 00000000
bf80: 00000000 dead4ead ffffffff ffffffff cf98bf90 cf98bf90 00000000 ef081df4
bfa0: 80029339 00000000 00000000 8000c1d9 00000000 00000000 00000000 00000000
bfc0: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000
bfe0: 00000000 00000000 00000000 00000000 00000013 00000000 e7fddef0 e7fddef0
[<8001285c>] (dma_cache_maint_page+0x3c/0xd4) from [<80012951>] (__dma_page_dev_to_cpu+0x19/0x80)
[<80012951>] (__dma_page_dev_to_cpu+0x19/0x80) from [<80249d89>] (ahash_done+0x99/0xb8)
[<80249d89>] (ahash_done+0x99/0xb8) from [<802449ff>] (caam_jr_dequeue+0x163/0x178)
[<802449ff>] (caam_jr_dequeue+0x163/0x178) from [<802883d1>] (net_rx_action+0x81/0x114)
[<802883d1>] (net_rx_action+0x81/0x114) from [<8001b07f>] (__do_softirq+0x8b/0x128)
[<8001b07f>] (__do_softirq+0x8b/0x128) from [<8001b185>] (do_softirq+0x31/0x3c)
[<8001b185>] (do_softirq+0x31/0x3c) from [<8001b6b5>] (irq_exit+0x4f/0x8e)
[<8001b6b5>] (irq_exit+0x4f/0x8e) from [<8000ca01>] (handle_IRQ+0x41/0x60)
[<8000ca01>] (handle_IRQ+0x41/0x60) from [<800083e3>] (gic_handle_irq+0x2b/0x44)
[<800083e3>] (gic_handle_irq+0x2b/0x44) from [<802f9a9b>] (__irq_svc+0x3b/0x5c)
Exception stack(0xcf98bc30 to 0xcf98bc78)
bc20: 00000000 00000000 00000001 00000000
bc40: 81573b80 cf98bdcc 00000000 cf98bc88 cf98a018 804d4b80 cf98a000 804deb60
bc60: 800128f5 cf98bc78 802f7d9d 802f7da2 00000133 ffffffff
[<802f9a9b>] (__irq_svc+0x3b/0x5c) from [<802f7da2>] (__schedule+0x36/0x24c)
[<802f7da2>] (__schedule+0x36/0x24c) from [<802f8011>] (schedule+0x59/0x6c)
[<802f8011>] (schedule+0x59/0x6c) from [<802f75c3>] (schedule_timeout+0x13/0x100)
[<802f75c3>] (schedule_timeout+0x13/0x100) from [<802f8283>] (wait_for_common+0x9b/0xc4)
[<802f8283>] (wait_for_common+0x9b/0xc4) from [<802f82db>] (wait_for_completion_interruptible+0xf/0x20)
[<802f82db>] (wait_for_completion_interruptible+0xf/0x20) from [<80136d85>] (do_one_async_hash_op.isra.5+0x19/0x22)
[<80136d85>] (do_one_async_hash_op.isra.5+0x19/0x22) from [<80137097>] (__test_hash+0x309/0x3ae)
[<80137097>] (__test_hash+0x309/0x3ae) from [<801371db>] (test_hash+0x17/0x44)
[<801371db>] (test_hash+0x17/0x44) from [<80137249>] (alg_test_hash+0x41/0x54)
[<80137249>] (alg_test_hash+0x41/0x54) from [<80136d0d>] (alg_test+0x129/0x188)
[<80136d0d>] (alg_test+0x129/0x188) from [<801352ed>] (cryptomgr_test+0x19/0x34)
[<801352ed>] (cryptomgr_test+0x19/0x34) from [<80029395>] (kthread+0x5d/0x6c)
[<80029395>] (kthread+0x5d/0x6c) from [<8000c1d9>] (ret_from_fork+0x11/0x38)
Code: 3212 0152 eb00 0b02 (5882) 0f92
---[ end trace 3a9625077c8d21fb ]---
Kernel panic - not syncing: Fatal exception in interrupt
CPU1: stopping
CPU: 1 PID: 0 Comm: swapper/1 Tainted: G D 3.12.19-rt30+ls1+gd62899c9b13f #4
[<800107d9>] (unwind_backtrace+0x1/0x88) from [<8000e4ef>] (show_stack+0xb/0xc)
[<8000e4ef>] (show_stack+0xb/0xc) from [<802f6dbd>] (dump_stack+0x4d/0x60)
[<802f6dbd>] (dump_stack+0x4d/0x60) from [<8000fee3>] (handle_IPI+0x7f/0xbc)
[<8000fee3>] (handle_IPI+0x7f/0xbc) from [<800083f3>] (gic_handle_irq+0x3b/0x44)
[<800083f3>] (gic_handle_irq+0x3b/0x44) from [<802f9a9b>] (__irq_svc+0x3b/0x5c)
Exception stack(0xef09bfa0 to 0xef09bfe8)
bfa0: ffffffed 00000000 010a7000 00000000 ef09a000 ef09a010 80000000 80523390
bfc0: 80003010 410fc075 00000000 00000000 00000008 ef09bfe8 8000cbd1 8000cbd2
bfe0: 60000133 ffffffff
[<802f9a9b>] (__irq_svc+0x3b/0x5c) from [<8000cbd2>] (arch_cpu_idle+0x1a/0x20)
[<8000cbd2>] (arch_cpu_idle+0x1a/0x20) from [<8003a285>] (cpu_startup_entry+0x7d/0xc4)
[<8003a285>] (cpu_startup_entry+0x7d/0xc4) from [<80008485>] (__enable_mmu+0x1/0x1c)
Signed-off-by: Ruchika Gupta <ruchika.gupta@freescale.com>
Change-Id: I1bcaa5a402409a943b47d7e7b3672a081d934a24
Reviewed-on: http://git.am.freescale.net:8181/23427
Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com>
Reviewed-by: Horia Ioan Geanta Neag <horia.geanta@freescale.com>
Reviewed-by: Matthew Weigel <Matthew.Weigel@freescale.com>
|
|
That commit tried to fix the section mismatch warning by moving the
clock driver struct to init section. This is definitely wrong because
the kernel would free the memories occupied by this struct after
boot while this driver is still registered in the driver core.
The kernel would panic when accessing this driver struct.
Signed-off-by: Tang Yuantian <Yuantian.Tang@freescale.com>
Change-Id: I3061188d09f504c9e1a0d8771a5336477404d016
Reviewed-on: http://git.am.freescale.net:8181/23314
Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com>
Reviewed-by: Matthew Weigel <Matthew.Weigel@freescale.com>
|
|
Signed-off-by: Jia Hongtao <hongtao.jia@freescale.com>
Change-Id: I2f9c391df5ddca31a49a0a3ac0cba380722b7cf0
Reviewed-on: http://git.am.freescale.net:8181/23440
Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com>
Reviewed-by: Matthew Weigel <Matthew.Weigel@freescale.com>
|
|
Signed-off-by: Jia Hongtao <hongtao.jia@freescale.com>
Change-Id: Ifc1ab666fe1ad16c4f01cbf74b088d8df4663e49
Reviewed-on: http://git.am.freescale.net:8181/23439
Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com>
Reviewed-by: Yuantian Tang <yuantian.tang@freescale.com>
Reviewed-by: Matthew Weigel <Matthew.Weigel@freescale.com>
|
|
Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com>
Change-Id: I5c7000288297384a04f33906e668f520bafc00d8
Reviewed-on: http://git.am.freescale.net:8181/23308
Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com>
Reviewed-by: Dongsheng Wang <dongsheng.wang@freescale.com>
Reviewed-by: Roy Pledge <roy.pledge@freescale.com>
Reviewed-by: Richard Schmitt <richard.schmitt@freescale.com>
|
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The dce_simple_perf_tester module needs to validate input parameter.
Signed-off-by: Jeffrey Ladouceur <Jeffrey.Ladouceur@freescale.com>
Change-Id: Ie0dddfb8e23532895e6ec2276f201e3b555fed62
Reviewed-on: http://git.am.freescale.net:8181/22952
Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com>
Reviewed-by: Haiying Wang <Haiying.Wang@freescale.com>
Reviewed-by: Roy Pledge <roy.pledge@freescale.com>
Reviewed-by: Richard Schmitt <richard.schmitt@freescale.com>
|
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For LPAE, we have the following means for encoding writable or dirty
ptes:
L_PTE_DIRTY L_PTE_RDONLY
!pte_dirty && !pte_write 0 1
!pte_dirty && pte_write 0 1
pte_dirty && !pte_write 1 1
pte_dirty && pte_write 1 0
So we can't distinguish between writeable clean ptes and read only
ptes. This can cause problems with ptes being incorrectly flagged as
read only when they are writeable but not dirty.
This patch renumbers L_PTE_RDONLY from AP[2] to a software bit #58,
and adds additional logic to set AP[2] whenever the pte is read only
or not dirty. That way we can distinguish between clean writeable ptes
and read only ptes.
HugeTLB pages will use this new logic automatically.
We need to add some logic to Transparent HugePages to ensure that they
correctly interpret the revised pgprot permissions (L_PTE_RDONLY has
moved and no longer matches PMD_SECT_AP2). In the process of revising
THP, the names of the PMD software bits have been prefixed with L_ to
make them easier to distinguish from their hardware bit counterparts.
Signed-off-by: Steve Capper <steve.capper@linaro.org>
Reviewed-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
(cherry picked from commit ded9477984690d026e46dd75e8157392cea3f13f)
Conflicts:
arch/arm/mm/dump.c
Change-Id: Ia71696dc811c7aeb8596334a26e67c24813a039f
Reviewed-on: http://git.am.freescale.net:8181/23333
Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com>
Reviewed-by: Matthew Weigel <Matthew.Weigel@freescale.com>
|
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Long descriptors on ARM are 64 bits, and some pte functions such as
pte_dirty return a bitwise-and of a flag with the pte value. If the
flag to be tested resides in the upper 32 bits of the pte, then we run
into the danger of the result being dropped if downcast.
For example:
gather_stats(page, md, pte_dirty(*pte), 1);
where pte_dirty(*pte) is downcast to an int.
This patch introduces a new macro pte_isset which performs the bitwise
and, then performs a double logical invert (where needed) to ensure
predictable downcasting. The logical inverse pte_isclear is also
introduced.
Equivalent pmd functions for Transparent HugePages have also been
added.
Signed-off-by: Steve Capper <steve.capper@linaro.org>
Reviewed-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
(cherry picked from commit f2950706871c4b6e8c0f0d7c3f62d35930b8de63)
Change-Id: I2d17ab87a364a3e839c71fab3f4507e722288daf
Reviewed-on: http://git.am.freescale.net:8181/23332
Reviewed-by: Matthew Weigel <Matthew.Weigel@freescale.com>
Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com>
|
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The pte_accessible macro can be used to identify page table entries
capable of being cached by a TLB. In principle, this differs from
pte_present, since PROT_NONE mappings are mapped using invalid entries
identified as present and ptes designated as `old' can use either
invalid entries or those with the access flag cleared (guaranteed not to
be in the TLB). However, there is a race to take care of, as described
in 20841405940e ("mm: fix TLB flush race between migration, and
change_protection_range"), between a page being migrated and mprotected
at the same time. In this case, we can check whether a TLB invalidation
is pending for the mm and if so, temporarily consider PROT_NONE mappings
as valid.
This patch implements a quick pte_accessible macro for ARM by simply
checking if the pte is valid/present depending on the mm. For classic
MMU, these checks are identical and will generate some false positives
for PROT_NONE mappings, but this is better than the current asm-generic
definition of ((void)(pte),1).
Finally, pte_present_user is moved to use pte_valid (and renamed
appropriately) since we don't care about cache flushing for faulting
mappings.
Acked-by: Steve Capper <steve.capper@arm.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
(cherry picked from commit 1971188aa19651d8f447211c6535fb68661d77c5)
Change-Id: I27ad2dbe398483d18ebb587e7c1e65b198421070
Reviewed-on: http://git.am.freescale.net:8181/23331
Reviewed-by: Matthew Weigel <Matthew.Weigel@freescale.com>
Tested-by: Matthew Weigel <Matthew.Weigel@freescale.com>
|
|
When enable LPAE and big-endian in a hisilicon board, while specify
mem=384M mem=512M@7680M, will get bad page state:
Freeing unused kernel memory: 180K (c0466000 - c0493000)
BUG: Bad page state in process init pfn:fa442
page:c7749840 count:0 mapcount:-1 mapping: (null) index:0x0
page flags: 0x40000400(reserved)
Modules linked in:
CPU: 0 PID: 1 Comm: init Not tainted 3.10.27+ #66
[<c000f5f0>] (unwind_backtrace+0x0/0x11c) from [<c000cbc4>] (show_stack+0x10/0x14)
[<c000cbc4>] (show_stack+0x10/0x14) from [<c009e448>] (bad_page+0xd4/0x104)
[<c009e448>] (bad_page+0xd4/0x104) from [<c009e520>] (free_pages_prepare+0xa8/0x14c)
[<c009e520>] (free_pages_prepare+0xa8/0x14c) from [<c009f8ec>] (free_hot_cold_page+0x18/0xf0)
[<c009f8ec>] (free_hot_cold_page+0x18/0xf0) from [<c00b5444>] (handle_pte_fault+0xcf4/0xdc8)
[<c00b5444>] (handle_pte_fault+0xcf4/0xdc8) from [<c00b6458>] (handle_mm_fault+0xf4/0x120)
[<c00b6458>] (handle_mm_fault+0xf4/0x120) from [<c0013754>] (do_page_fault+0xfc/0x354)
[<c0013754>] (do_page_fault+0xfc/0x354) from [<c0008400>] (do_DataAbort+0x2c/0x90)
[<c0008400>] (do_DataAbort+0x2c/0x90) from [<c0008fb4>] (__dabt_usr+0x34/0x40)
The bad pfn:fa442 is not system memory(mem=384M mem=512M@7680M), after debugging,
I find in page fault handler, will get wrong pfn from pte just after set pte,
as follow:
do_anonymous_page()
{
...
set_pte_at(mm, address, page_table, entry);
//debug code
pfn = pte_pfn(entry);
pr_info("pfn:0x%lx, pte:0x%llxn", pfn, pte_val(entry));
//read out the pte just set
new_pte = pte_offset_map(pmd, address);
new_pfn = pte_pfn(*new_pte);
pr_info("new pfn:0x%lx, new pte:0x%llxn", pfn, pte_val(entry));
...
}
pfn: 0x1fa4f5, pte:0xc00001fa4f575f
new_pfn:0xfa4f5, new_pte:0xc00000fa4f5f5f //new pfn/pte is wrong.
The bug is happened in cpu_v7_set_pte_ext(ptep, pte):
An LPAE PTE is a 64bit quantity, passed to cpu_v7_set_pte_ext in the r2 and r3 registers.
On an LE kernel, r2 contains the LSB of the PTE, and r3 the MSB.
On a BE kernel, the assignment is reversed.
Unfortunately, the current code always assumes the LE case,
leading to corruption of the PTE when clearing/setting bits.
This patch fixes this issue much like it has been done already in the
cpu_v7_switch_mm case.
CC stable <stable@vger.kernel.org>
Signed-off-by: Jianguo Wu <wujianguo@huawei.com>
Acked-by: Marc Zyngier <marc.zyngier@arm.com>
Acked-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
(cherry picked from commit 86f40622af7329375e38f282f6c0aab95f3e5f72)
Change-Id: If59198ba23237cc9cb98fa357795c6fece20666a
Reviewed-on: http://git.am.freescale.net:8181/23330
Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com>
Reviewed-by: Matthew Weigel <Matthew.Weigel@freescale.com>
|
|
If ds3232 work on some platform that is not implementation
irq_set_wake, ds3232 will get a WARNING trace in resume.
So fix ds3232->suspended state to false when irq_set_irq_wake
return error.
------------[ cut here ]------------
WARNING: CPU: 0 PID: 729 at kernel/irq/manage.c:604
irq_set_irq_wake+0x4b/0x8c()
Unbalanced IRQ 201 wake disable
Modules linked in:
CPU: 0 PID: 729 Comm: sh Not tainted 3.12.19-rt30+ #25
[<800107d9>] (unwind_backtrace+0x1/0x88) from [<8000e4ef>]
(show_stack+0xb/0xc)
[<8000e4ef>] (show_stack+0xb/0xc) from [<802b5fa9>]
(dump_stack+0x4d/0x60)
[<802b5fa9>] (dump_stack+0x4d/0x60) from [<800186dd>]
(warn_slowpath_common+0x45/0x64)
[<800186dd>] (warn_slowpath_common+0x45/0x64) from [<80018717>]
(warn_slowpath_fmt+0x1b/0x24)
[<80018717>] (warn_slowpath_fmt+0x1b/0x24) from [<8003a8d3>]
(irq_set_irq_wake+0x4b/0x8c)
[<8003a8d3>] (irq_set_irq_wake+0x4b/0x8c) from [<80204fcb>]
(ds3232_resume+0x2d/0x36)
[<80204fcb>] (ds3232_resume+0x2d/0x36) from [<801954c7>]
(dpm_run_callback.isra.13+0xb/0x28)
[<801954c7>] (dpm_run_callback.isra.13+0xb/0x28) from [<80195b1b>]
(device_resume+0x7b/0xa2)
[<80195b1b>] (device_resume+0x7b/0xa2) from [<80195f0f>]
(dpm_resume+0xbb/0x19c)
[<80195f0f>] (dpm_resume+0xbb/0x19c) from [<801960d9>]
(dpm_resume_end+0x9/0x12)
[<801960d9>] (dpm_resume_end+0x9/0x12) from [<80037e1d>]
(suspend_devices_and_enter+0x17d/0x1d0)
[<80037e1d>] (suspend_devices_and_enter+0x17d/0x1d0) from [<80037ee1>]
(pm_suspend+0x71/0x128)
[<80037ee1>] (pm_suspend+0x71/0x128) from [<80037449>]
(state_store+0x6d/0x80)
[<80037449>] (state_store+0x6d/0x80) from [<800af4d5>]
(sysfs_write_file+0x9f/0xde)
[<800af4d5>] (sysfs_write_file+0x9f/0xde) from [<8007a437>]
(vfs_write+0x7b/0x104)
[<8007a437>] (vfs_write+0x7b/0x104) from [<8007a7f7>]
(SyS_write+0x27/0x48)
[<8007a7f7>] (SyS_write+0x27/0x48) from [<8000c121>]
(ret_fast_syscall+0x1/0x44)
---[ end trace 640959d2e8de6ccc ]---
Signed-off-by: Wang Dongsheng <dongsheng.wang@freescale.com>
Change-Id: I45102d4ee48299df4b24ffd85cdd316a9c8598f4
Reviewed-on: http://git.am.freescale.net:8181/23266
Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com>
Reviewed-by: Chenhui Zhao <chenhui.zhao@freescale.com>
Reviewed-by: Matthew Weigel <Matthew.Weigel@freescale.com>
|
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If no EP device plugin pci slot, kernel should return 0 not error
number in pm resume function.
Signed-off-by: Wang Dongsheng <dongsheng.wang@freescale.com>
Change-Id: Ibc62d1a0de2f25ebede51ec813c6b36c864f100f
Reviewed-on: http://git.am.freescale.net:8181/23265
Reviewed-by: Chenhui Zhao <chenhui.zhao@freescale.com>
Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com>
Reviewed-by: Matthew Weigel <Matthew.Weigel@freescale.com>
|
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- add CONFIG_FMAN_V3L by default for FMan_V3L platform.
- t1024 officially supports 6 portals of QMan/BMan instead of 10
- remove CONFIG_ALTIVEC as e5500 core has no ALTIVEC.
Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com>
Change-Id: I71a5426ad441ef034c66e2d794a86b366092530d
Reviewed-on: http://git.am.freescale.net:8181/23188
Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com>
Reviewed-by: Mandy Lavi <Mandy.Lavi@freescale.com>
Reviewed-by: Richard Schmitt <richard.schmitt@freescale.com>
|
|
As subpage write is enabled by default for all drivers, nand_write_subpage_hwecc
causes a crash if the driver did not register ecc->hwctl or ecc->calculate.
This behavior was introduced in
commit 837a6ba4f3b6d23026674e6af6b6849a4634fff9
"mtd: nand: subpage write support for hardware based ECC schemes".
This fixes a crash by emulating subpage write support by padding sub-page data
with 0xff on either sides to make it full page compatible.
Reported-by: Helmut Schaa <helmut.schaa@googlemail.com>
Tested-by: Helmut Schaa <helmut.schaa@googlemail.com>
Signed-off-by: Pekon Gupta <pekon@ti.com>
Reviewed-by: Scott Wood <scottwood@freescale.com>
Cc: <stable@vger.kernel.org> # 3.10.x+
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
(cherry picked from commit f034d87def51f026b735d1e2877e9387011b2ba3)
Change-Id: I55b0ea1eea0ffdfa6410d0a239e2a773bfdd490d
Signed-off-by: Scott Wood <scottwood@freescale.com>
Reviewed-on: http://git.am.freescale.net:8181/20798
Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com>
Reviewed-by: Richard Schmitt <richard.schmitt@freescale.com>
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In case either the byte or the mask of a key are provided NULL,
the memory allocated for the lookup key descriptor needs to be
release.
Signed-off-by: Anca Jeanina Floarea <anca.floarea@freescale.com>
Change-Id: Ibb9b7ec28a93a87c82ab318b763866cf3d9f493a
Reviewed-on: http://git.am.freescale.net:8181/23131
Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com>
Reviewed-by: Marian-Cornel Chereji <marian.chereji@freescale.com>
Reviewed-by: Richard Schmitt <richard.schmitt@freescale.com>
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In the dpa_classifier function "try_compatible_node" there are some
places where the header manipulation operation flags are compared to
the configuration of an existing header manipulation node. The control
path however doesn't suspend in case an inconsistency is found in the
flags and, in some rare cases when users provide corrupt parameters,
there is a danger to dereference a NULL hm_node pointer.
Change-Id: I355862c146a228e5878272156adaf92a76391ce6
Signed-off-by: Marian Chereji <marian.chereji@freescale.com>
Reviewed-on: http://git.am.freescale.net:8181/23111
Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com>
Reviewed-by: Anca Jeanina Floarea <AncaJeanina.Floarea@freescale.com>
Reviewed-by: Richard Schmitt <richard.schmitt@freescale.com>
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In dpa_classifier function "dpa_classif_mcast_create_group" the replicator
group params could be freed twice if the function "FM_PCD_FrmReplicSetGroup"
fails, for instance. The pointer is now reset at first free so that the second
free operation ignores it.
Change-Id: I8869db05157f68964bd2a131f6e184f78e64cf8c
Signed-off-by: Marian Chereji <marian.chereji@freescale.com>
Reviewed-on: http://git.am.freescale.net:8181/23108
Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com>
Reviewed-by: Radu-Andrei Bulie <Radu.Bulie@freescale.com>
Reviewed-by: Richard Schmitt <richard.schmitt@freescale.com>
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Kernel could not get cluster information from device tree on PowerPC.
The previous way of cluster calculation could be wrong if all cores of
some clusters are disabled. For now PCL10 is only supported on e6500
cores. We hard coded the threads number of each cluster to ensure the
cluster calculation is right.
Signed-off-by: Jia Hongtao <hongtao.jia@freescale.com>
Change-Id: Ia329e48bac1a838828146df9b2caa7f527e329eb
Reviewed-on: http://git.am.freescale.net:8181/23177
Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com>
Reviewed-by: Yuantian Tang <yuantian.tang@freescale.com>
Reviewed-by: Zhuoyu Zhang <Zhuoyu.Zhang@freescale.com>
Reviewed-by: Yang Li <LeoLi@freescale.com>
Reviewed-by: Matthew Weigel <Matthew.Weigel@freescale.com>
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LAW and MP information need to be backed up, or they will
lost when deep sleep wake up.
Previously, this is done by uboot. Now moved it to kernel
because entry point to kernel when resume is pretty early
in uboot.
Signed-off-by: Tang Yuantian <Yuantian.Tang@freescale.com>
Change-Id: I4542ddc77bd8d3461cf2e8bf02abeb74fa89e741
Reviewed-on: http://git.am.freescale.net:8181/23147
Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com>
Reviewed-by: Chenhui Zhao <chenhui.zhao@freescale.com>
Reviewed-by: Yang Li <LeoLi@freescale.com>
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Some functions are powerpc specific which cause error when the
driver is used on ARM platforms.
Added micro to make them only be used on powerpc platforms.
Signed-off-by: Tang Yuantian <Yuantian.Tang@freescale.com>
Change-Id: I7ab009fa13f47e23d67aef875185a23882dd1813
Reviewed-on: http://git.am.freescale.net:8181/23070
Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com>
Reviewed-by: Yang Li <LeoLi@freescale.com>
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