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2013-08-30Merge branch 'b4860rev2'J. German Rivera
2013-08-30powerpc: Update KBUILD_AFLAGS with core specific optionsCatalin Udma
Update also KBUILD_AFLAGS specifying the target core for CONFIG_E500 -mcpu=e5500/e500mc/8540 Add also -msoft-float. Signed-off-by: Catalin Udma <catalin.udma@freescale.com> Change-Id: Ibaf93105792b84dae836c7020ff708ed7afbad6a Reviewed-on: http://git.am.freescale.net:8181/3764 Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com> Reviewed-by: Wood Scott-B07421 <scottwood@freescale.com> Reviewed-by: Rivera Jose-B46482 <Jose.G.Rivera@freescale.com>
2013-08-30Revert "dpa_offload: Added Traffic Manager user-space counter implementation" Rivera Jose-B46482
This reverts commit 658fb7c23113780e96ac8fc2503a058d49377281 This change has a bug related to misuse of the mutex_trylock() API (see line 3965) and causes non-obvious merge conflicts when merging to sdk-v1.4.x. Please rework this patch to ensure these issues are solved. Change-Id: If6be2d7fc98e3b3f0689b8c8abd241216adfd2f9 Reviewed-on: http://git.am.freescale.net:8181/4327 Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com> Reviewed-by: Rivera Jose-B46482 <German.Rivera@freescale.com>
2013-08-29dpa_offload: Reduce the size of the IPv4 header options fieldMarian Chereji
According to RFC 791, the size of the IPv4 header (options included) is represented on 4 bits (IHL), hence it can be an absolute maximum of 15 * 4 = 60 bytes. The IPv4 options buffer size field in the fsl_dpa_offload.h header file, in the ipv4_header data structure, was declared as an "unsigned int" and this was causing a static analysis warning in dpa_classifier. The field was reduced to uint8_t which is more than enough to store the size of the IPv4 frame options. Signed-off-by: Marian Chereji <marian.chereji@freescale.com> Change-Id: I69fb1307329b68da652ed85d659aa10e34c5af67 Reviewed-on: http://git.am.freescale.net:8181/4264 Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com> Reviewed-by: Bulie Radu-Andrei-B37577 <Radu.Bulie@freescale.com> Reviewed-by: Rivera Jose-B46482 <German.Rivera@freescale.com>
2013-08-28fmd: fix muram size for b4860rev2Mandy Lavi
Signed-off-by: Mandy Lavi <mandy.lavi@freescale.com> Change-Id: Id1be0b2511e5c36fd785f8ee72f4189305c7ac71 Reviewed-on: http://git.am.freescale.net:8181/4105 Reviewed-by: Bucur Madalin-Cristian-B32716 <madalin.bucur@freescale.com> Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com> Reviewed-by: Rivera Jose-B46482 <German.Rivera@freescale.com>
2013-08-28fsl_qman: fix the incorrect return for xsfdr read in debugfsHaiying Wang
and fix the mask value for correctly getting the XSFDR value. Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com> Change-Id: I72ba857bd01b93ca6042e354c7ca8c391f430e83 Reviewed-on: http://git.am.freescale.net:8181/4059 Reviewed-by: Thorpe Geoff-R01361 <Geoff.Thorpe@freescale.com> Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com> Reviewed-by: Rivera Jose-B46482 <German.Rivera@freescale.com>
2014-04-27dpaa_eth/mac: Sync with the unique MDIO bus name for "fixed-link" PHY(s)Shruti Kanetkar
'9e6c643 phy/fixed: use an unique MDIO bus name' changed the name of the fixed PHY bus to "fixed-0". This update has been already done for the non-dpaa SoC(s) in 'e5c7d1f of/mdio: fix fixed link bus name' Signed-off-by: Shruti Kanetkar <Shruti@Freescale.com> Change-Id: Ie2ead771bc74a2b62c26eca6b5618bdebbe1eb61 Reviewed-on: http://git.am.freescale.net:8181/4129 Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com> Reviewed-by: Hamciuc Bogdan-BHAMCIU1 <bogdan.hamciuc@freescale.com> Reviewed-by: Rivera Jose-B46482 <German.Rivera@freescale.com>
2013-08-28Revert "fsl_dce: Initial DCE device driver support" Rivera Jose-B46482
This reverts commit ae1e17745807a3b1745925278e9a4dd9d24ffd6e Change-Id: If5743ed15a3c8405222f7db8a415d0136c7d938e Reviewed-on: http://git.am.freescale.net:8181/4299 Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com> Reviewed-by: Rivera Jose-B46482 <German.Rivera@freescale.com>
2013-08-28dpaa_eth: Fix draining of buffer poolsIoana Radulescu
When draining buffers in batches of eight, we must take into account the fact that BMan will return an error code if there are less than eight buffers left in the pool; when this happens, drain the remaining buffers one by one. And since we're at buffer pool cleanup, make sure allocated bpools get freed in case of errors inside the probe function. Signed-off-by: Ioana Radulescu <ruxandra.radulescu@freescale.com> Change-Id: I9b2516ea76a19487a2f75412722ea21e67247ed2 Reviewed-on: http://git.am.freescale.net:8181/4191 Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com> Reviewed-by: Bucur Madalin-Cristian-B32716 <madalin.bucur@freescale.com> Reviewed-by: Rivera Jose-B46482 <German.Rivera@freescale.com>
2013-08-28dpaa_eth: Fix freeing of frame in error casesIoana Radulescu
In case of a Tx error at FMan level or an ERN, if the frame was marked as recycleable we need to put the buffers in the target pools, otherwise we mess up the pool counters. This was done correctly for the ERN callback, now fixing the Tx error one as well. Signed-off-by: Ioana Radulescu <ruxandra.radulescu@freescale.com> Change-Id: I0faa77a31af9086806713e593da72b03c2bd3223 Reviewed-on: http://git.am.freescale.net:8181/4192 Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com> Reviewed-by: Bucur Madalin-Cristian-B32716 <madalin.bucur@freescale.com> Reviewed-by: Rivera Jose-B46482 <German.Rivera@freescale.com>
2013-08-28dpaa_eth: Remove dpa_bp pointer from percpu private structureIoana Radulescu
The reference to the buffer pool can be just as easily obtained from the netdev private structure, so do that and reduce the size of the percpu private struct. Signed-off-by: Ioana Radulescu <ruxandra.radulescu@freescale.com> Change-Id: I78aea782014b863994585beccac52567b242a72e Reviewed-on: http://git.am.freescale.net:8181/4194 Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com> Reviewed-by: Bucur Madalin-Cristian-B32716 <madalin.bucur@freescale.com> Reviewed-by: Rivera Jose-B46482 <German.Rivera@freescale.com>
2013-08-28dpaa_eth: Replace per_cpu_ptr with __this_cpu_ptrIoana Radulescu
We randomly used either __this_cpu_ptr() or per_cpu_ptr() on current processor. Use only __this_cpu_ptr() in ordr to make the code more uniform. No functional or performance impact. Signed-off-by: Ioana Radulescu <ruxandra.radulescu@freescale.com> Change-Id: I1d449ec799e8d920935325d283f0ba510ee56e87 Reviewed-on: http://git.am.freescale.net:8181/4193 Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com> Reviewed-by: Bucur Madalin-Cristian-B32716 <madalin.bucur@freescale.com> Reviewed-by: Rivera Jose-B46482 <German.Rivera@freescale.com>
2013-08-28crypto: caam - Modify the interface layers to use JR API'sRuchika Gupta
- Earlier interface layers - caamalg, caamhash, caamrng were directly using the Controller driver private structure to access the Job ring. - Changed the above to use alloc/free API's provided by Job Ring Drive Signed-off-by: Ruchika Gupta <ruchika.gupta@freescale.com> Change-Id: I6122f83a349aaca9522654df0026423cbb8d2cf2 Reviewed-on: http://git.am.freescale.net:8181/4123 Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com> Reviewed-by: Rivera Jose-B46482 <German.Rivera@freescale.com>
2013-08-28fsl_dce: Initial DCE device driver supportJeffrey Ladouceur
Add FSL DCE device creation and access to device configuration. This device does compression and decompression. Signed-off-by: Jeffrey Ladouceur <Jeffrey.Ladouceur@freescale.com> Change-Id: I5d0f7135bf05d8730c212d2bd9d7d064976ecd0a Reviewed-on: http://git.am.freescale.net:8181/4200 Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com> Reviewed-by: Rivera Jose-B46482 <German.Rivera@freescale.com>
2013-08-28dpaa_eth: Replace drain callback in dpa_bp structureIoana Radulescu
Instead use a callback for freeing individual buffers acquired from the pool. This solution is more flexible and allows for simpler code when new pools will be added to the driver. Signed-off-by: Ioana Radulescu <ruxandra.radulescu@freescale.com> Change-Id: I52376b5dab53957e497b112df7c42ef18d7a9347 Reviewed-on: http://git.am.freescale.net:8181/4190 Reviewed-by: Rivera Jose-B46482 <German.Rivera@freescale.com> Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com>
2013-08-28dpa_offload: Added Traffic Manager user-space counter implementationAurelian Zanoschi
Added support for Traffic Manager user-space DPA Stats counter in driver. The Traffic Manager counters can be used both from user-space or kernel-space depending on the user needs. If the counter is created from user-space, all the retrieving mechanism is implemented in user-space and same happens for kernel-space case. The counters is marked as a user-space counter and the kernel will provide for this counter only the offset where the user-space library to write the statistics of the counter. This patch corrects some compilation warnings caused by QMan CEETM API changes. Change-Id: I48c4df286ab78efe2a16d46c4fd376d153732944 Signed-off-by: Aurelian Zanoschi <Aurelian.Zanoschi@freescale.com> Reviewed-on: http://git.am.freescale.net:8181/4196 Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com> Reviewed-by: Chereji Marian-Cornel-R27762 <marian.chereji@freescale.com> Reviewed-by: Rivera Jose-B46482 <German.Rivera@freescale.com>
2013-08-28fsl_qman: support DCE channelJeffrey Ladouceur
The dce accelerator uses QMan's direct connect portal. Extend qm_dc_portal to support dce. Add api to query the DCE channel. This is consistent with other accelerators such as PME. Signed-off-by: Jeffrey Ladouceur <Jeffrey.Ladouceur@freescale.com> Change-Id: I7278684ce2b3c85e67e629605aa79a88c19a50f1 Reviewed-on: http://git.am.freescale.net:8181/4199 Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com> Reviewed-by: Thorpe Geoff-R01361 <Geoff.Thorpe@freescale.com> Reviewed-by: Wang Haiying-R54964 <Haiying.Wang@freescale.com> Reviewed-by: Rivera Jose-B46482 <German.Rivera@freescale.com>
2013-08-28dpaa_eth: Fix error message in ethtoolCristian Sovaiala
Interfaces only get their PHYs initialized when they are first brought up, therefore running ethtool on an interface that is down prints an error message and returns with error code. Lower the print to debug mode and return non-error code. Signed-off-by: Cristian Sovaiala <cristian.sovaiala@freescale.com> Change-Id: Ic4e9304cf9e6152868af74a31132e92d95713b62 Reviewed-on: http://git.am.freescale.net:8181/4259 Reviewed-by: Radulescu Ruxandra Ioana-B05472 <ruxandra.radulescu@freescale.com> Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com> Reviewed-by: Bucur Madalin-Cristian-B32716 <madalin.bucur@freescale.com> Reviewed-by: Rivera Jose-B46482 <German.Rivera@freescale.com>
2013-08-28crypto: caam - Enabled JR platform driver by default in KconfigRuchika Gupta
CRYPTO_DEV_FSL_CAAM_JR should be set by default to y if the config option CRYPTO_DEV_FSL_CAAM is selected Signed-off-by: Ruchika Gupta <ruchika.gupta@freescale.com> Change-Id: I9fe0cda416363c0aa205be0ac0b923337fd871db Reviewed-on: http://git.am.freescale.net:8181/4228 Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com> Reviewed-by: Garg Vakul-B16394 <vakul@freescale.com> Reviewed-by: Rivera Jose-B46482 <German.Rivera@freescale.com>
2013-08-28dpaa_eth: Reorder recycling conditionsIoana Radulescu
Reorganize a bit the recycling code without any actual changes in the logic. Reordering of conditions based on which is most likely to fail first brings a bit of performance improvement in case no recycling is actually done. Signed-off-by: Ioana Radulescu <ruxandra.radulescu@freescale.com> Change-Id: I6cf3995576b756d9aec678f92f679ee1fa461587 Reviewed-on: http://git.am.freescale.net:8181/4188 Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com> Reviewed-by: Bucur Madalin-Cristian-B32716 <madalin.bucur@freescale.com> Reviewed-by: Rivera Jose-B46482 <German.Rivera@freescale.com>
2013-08-28crypto:caam - Remove usage of JOBR_DEPTH from QIRuchika Gupta
JOBR_DEPTH was wrongly being used for defining maximum pending jobs per CPU in QI. Introduced a new macro to define the maximum pending jobs per CPU. Signed-off-by: Ruchika Gupta <ruchika.gupta@freescale.com> Change-Id: Iebc47fe19cf8eb7a2c39d8b6b802df33fb1073b6 Reviewed-on: http://git.am.freescale.net:8181/4242 Reviewed-by: Garg Vakul-B16394 <vakul@freescale.com> Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com> Reviewed-by: Rivera Jose-B46482 <German.Rivera@freescale.com>
2013-08-28edac/85xx: Disable invalid PEX_CONFIG_ADDR/PEX_CONFIG_DATA access enable bitChunhe Lan
When kernel PCIe bus code to initialize and configure these PCIe devices on booting will use some invalid PEX_CONFIG_ADDR/PEX_CONFIG_DATA, edac driver prints the much notice information as the following: PCIE error(s) detected PCIE ERR_DR register: 0x00020000 PCIE ERR_CAP_STAT register: 0x80000001 PCIE ERR_CAP_R0 register: 0x00000800 PCIE ERR_CAP_R1 register: 0x00000000 PCIE ERR_CAP_R2 register: 0x00000000 PCIE ERR_CAP_R3 register: 0x00000000 So disable the invalid PEX_CONFIG_ADDR/PEX_CONFIG_DATA access interrupt generation enable bit and invalid PEX_CONFIG_ADDR/PEX_CONFIG_DATA access detection enable bit to fix ugly print. Signed-off-by: Chunhe Lan <Chunhe.Lan@freescale.com> Change-Id: I966f0a277d1c211960ab30f8c5a9edf8b623448b Reviewed-on: http://git.am.freescale.net:8181/4141 Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com> Reviewed-by: Zang Tiefei-R61911 <tie-fei.zang@freescale.com> Reviewed-by: Rivera Jose-B46482 <German.Rivera@freescale.com>
2013-08-28crypto: caam - Add API's to allocate/free Job RingsRuchika Gupta
With each of the Job Ring available as a platform device, the Job Ring driver needs to take care of allocation/deallocation of the Job Rings to the above interface layers. Added APIs in Job Ring Driver to allocate/free Job rings Signed-off-by: Ruchika Gupta <ruchika.gupta@freescale.com> Change-Id: I918fb65f121ce3e1008a412377123de3ecd20d8d Reviewed-on: http://git.am.freescale.net:8181/3972 Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com> Reviewed-by: Garg Vakul-B16394 <vakul@freescale.com> Reviewed-by: Rivera Jose-B46482 <German.Rivera@freescale.com>
2013-08-28dpaa_eth: Refill global pool only when below thresholdIoana Radulescu
Don't refill the Rx global pool every time it drops below its target count, instead wait for the number of buffers to drop below a certain threshold. This was not so important until now, but is necessary in view of the recycling mechanism. Signed-off-by: Ioana Radulescu <ruxandra.radulescu@freescale.com> Change-Id: I341f6bf7bd746465cf6d17644a4edbd1b3d20aba Reviewed-on: http://git.am.freescale.net:8181/4189 Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com> Reviewed-by: Bucur Madalin-Cristian-B32716 <madalin.bucur@freescale.com> Reviewed-by: Rivera Jose-B46482 <German.Rivera@freescale.com>
2013-08-27Merge branch 'sdk-kernel-3.8' into masterJ. German Rivera
2013-08-27Merge branch 'sdk-v1.4.x' into sdk-kernel-3.8J. German Rivera
2013-08-27Merge branch 'b4860rev2' into sdk-v1.4.xJ. German Rivera
2013-08-27Update the operation mapping settings required by the DSP side for MapleVarun Sethi
and DMA. For the DSP side the basic requirement for stashing is to prevent device initiated reads and writes going to the DDR. RWNITC and WWSOT operation mappings aid in achieving these objectives. Signed-off-by: Varun Sethi <Varun.Sethi@freescale.com> Change-Id: I1634ff877d9c8e7c6a3de95aee4a3848cc149973 Reviewed-on: http://git.am.freescale.net:8181/4128 Reviewed-by: Rivera Jose-B46482 <German.Rivera@freescale.com> Tested-by: Rivera Jose-B46482 <German.Rivera@freescale.com>
2013-08-27Enhance get_stash_id API to get the stashid for DSP L2 cache.Varun Sethi
The stashid for the DSP cluster L2 cache is programmed by SDOS. Signed-off-by: Varun Sethi <Varun.Sethi@freescale.com> Change-Id: I7a8203e2dd99e6ccfeacd25305378a4c33becac2 Reviewed-on: http://git.am.freescale.net:8181/4036 Reviewed-by: Rivera Jose-B46482 <German.Rivera@freescale.com> Tested-by: Rivera Jose-B46482 <German.Rivera@freescale.com>
2013-08-27Check for valid window before proceeding to set the stash or the omi attribute.Varun Sethi
Signed-off-by: Varun Sethi <Varun.Sethi@freescale.com> Change-Id: I6bbad9f1f1240fa23ae6997f5a0cdc6cb49228e1 Reviewed-on: http://git.am.freescale.net:8181/4035 Reviewed-by: Yoder Stuart-B08248 <stuart.yoder@freescale.com> Reviewed-by: Rivera Jose-B46482 <German.Rivera@freescale.com> Tested-by: Rivera Jose-B46482 <German.Rivera@freescale.com>
2013-08-26dpaa_eth: Fix double counting of dropped framesIoana Radulescu
When the stack drops an incoming frame it also increments the rx_dropped counter in the netdevice stats. We were also updating this counter inside the driver, resulting in incorrect statistics for dropped frames. Signed-off-by: Ioana Radulescu <ruxandra.radulescu@freescale.com> Change-Id: I16d6819d80d01ee7bf0400736acbe5d95fa04f25 Reviewed-on: http://git.am.freescale.net:8181/4187 Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com> Reviewed-by: Bucur Madalin-Cristian-B32716 <madalin.bucur@freescale.com> Reviewed-by: Rivera Jose-B46482 <German.Rivera@freescale.com>
2013-08-26Modify USDPAA DMA mapping code to allow non power of 4 mappingsRoy Pledge
This patch modifies the USDPAA code to allow non power of 4 DMA maps. The code will use multiple TLB1 entries if needed. DMA maps are still phyically and virually contiguous. Signed-off-by: Roy Pledge <Roy.Pledge@freescale.com> Change-Id: I42942067059a3c06f0b0d031d266d228295c7c45 Reviewed-on: http://git.am.freescale.net:8181/3857 Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com> Reviewed-by: Wang Haiying-R54964 <Haiying.Wang@freescale.com> Reviewed-by: Rivera Jose-B46482 <Jose.G.Rivera@freescale.com>
2013-08-26Add API to allocate specific portals based on index. This allows an ↵Roy Pledge
application to get back the exact portal it was previously using by specifing the portals index value. Signed-off-by: Roy Pledge <Roy.Pledge@freescale.com> Change-Id: I8233816f0519731eb65b3671d68a01266eee42dd Reviewed-on: http://git.am.freescale.net:8181/4002 Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com> Reviewed-by: Ladouceur Jeffrey-R11498 <Jeffrey.Ladouceur@freescale.com> Reviewed-by: Wang Haiying-R54964 <Haiying.Wang@freescale.com> Reviewed-by: Rivera Jose-B46482 <Jose.G.Rivera@freescale.com>
2013-08-26powerpc/85xx: add hardware automatically enter pw20 stateWang Dongsheng
Using hardware features make core automatically enter PW20 state. Set a TB count to hardware, the effective count begins when PW10 is entered. When the effective period has expired, the core will proceed from PW10 to PW20 if no exit conditions have occurred during the period. Signed-off-by: Wang Dongsheng <dongsheng.wang@freescale.com> Change-Id: I199d6bedeb045f421da69d8ce99c45bea517fc32 Reviewed-on: http://git.am.freescale.net:8181/3948 Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com> Reviewed-by: Wood Scott-B07421 <scottwood@freescale.com> Reviewed-by: Rivera Jose-B46482 <Jose.G.Rivera@freescale.com>
2013-08-26powerpc/85xx: add hardware automatically enter altivec idle stateWang Dongsheng
Each core's AltiVec unit may be placed into a power savings mode by turning off power to the unit. Core hardware will automatically power down the AltiVec unit after no AltiVec instructions have executed in N cycles. The AltiVec power-control is triggered by hardware. Signed-off-by: Wang Dongsheng <dongsheng.wang@freescale.com> Change-Id: I613fba4492d3d65dcf903d13735bc9e45e5d443c Reviewed-on: http://git.am.freescale.net:8181/3731 Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com> Reviewed-by: Wood Scott-B07421 <scottwood@freescale.com> Reviewed-by: Rivera Jose-B46482 <Jose.G.Rivera@freescale.com>
2013-08-26Add operation mapping for DMA controller and Maple.Varun Sethi
These are required for ALU DSP stashing use case. Signed-off-by: Varun Sethi <Varun.Sethi@freescale.com> Change-Id: I7efacb81b60d23e6e5f91632547f8b9a04028a1f Reviewed-on: http://git.am.freescale.net:8181/3442 Reviewed-by: Yoder Stuart-B08248 <stuart.yoder@freescale.com> Reviewed-by: Fleming Andrew-AFLEMING <AFLEMING@freescale.com> Tested-by: Fleming Andrew-AFLEMING <AFLEMING@freescale.com>
2013-08-26Add operation mapping for PMAN.Varun Sethi
Setup and operation mapping index for PMAN. Signed-off-by: Varun Sethi <Varun.Sethi@freescale.com> Change-Id: I4384a247491293260c1da1d4cf6cfc3b2bec2034 Reviewed-on: http://git.am.freescale.net:8181/3441 Reviewed-by: Yoder Stuart-B08248 <stuart.yoder@freescale.com> Reviewed-by: Fleming Andrew-AFLEMING <AFLEMING@freescale.com> Tested-by: Fleming Andrew-AFLEMING <AFLEMING@freescale.com>
2013-08-26Make stash id and operation mapping index per window attributes.Varun Sethi
Stash ID and operation mapping can now be set per dma window. Signed-off-by: Varun Sethi <Varun.Sethi@freescale.com> Change-Id: I987abbcba0575fea1b43843c2bce342f4eae4df2 Reviewed-on: http://git.am.freescale.net:8181/3439 Reviewed-by: Yoder Stuart-B08248 <stuart.yoder@freescale.com> Reviewed-by: Fleming Andrew-AFLEMING <AFLEMING@freescale.com> Tested-by: Fleming Andrew-AFLEMING <AFLEMING@freescale.com> Conflicts: drivers/iommu/fsl_pamu.c drivers/iommu/fsl_pamu.h drivers/iommu/fsl_pamu_domain.c
2013-08-26Move operation mapping index to iommu.h.Varun Sethi
Represent operation mappings as an enum. These have been moved to iommu.h to support IOMMU API for setting operation mappings per window. Signed-off-by: Varun Sethi <Varun.Sethi@freescale.com> Change-Id: I900274f8ed703b9e10a4b3fb7d6653bd8c3a080d Reviewed-on: http://git.am.freescale.net:8181/3438 Reviewed-by: Yoder Stuart-B08248 <stuart.yoder@freescale.com> Reviewed-by: Fleming Andrew-AFLEMING <AFLEMING@freescale.com> Tested-by: Fleming Andrew-AFLEMING <AFLEMING@freescale.com>
2013-08-26Introduce an API for setting operation mapping index per window.Varun Sethi
This API can be used for setting operation mapping per DMA window. Signed-off-by: Varun Sethi <Varun.Sethi@freescale.com> Change-Id: Iea6d7993f09bddbaae94c475fd192f5106784bde Reviewed-on: http://git.am.freescale.net:8181/3440 Reviewed-by: Yoder Stuart-B08248 <stuart.yoder@freescale.com> Reviewed-by: Fleming Andrew-AFLEMING <AFLEMING@freescale.com> Tested-by: Fleming Andrew-AFLEMING <AFLEMING@freescale.com> Conflicts: drivers/iommu/fsl_pamu.c drivers/iommu/fsl_pamu.h drivers/iommu/fsl_pamu_domain.c Change-Id: Iea6d7993f09bddbaae94c475fd192f5106784bde Reviewed-on: http://git.am.freescale.net:8181/3440 Reviewed-by: Schmitt Richard-B43082 <B43082@freescale.com> Tested-by: Schmitt Richard-B43082 <B43082@freescale.com>
2013-08-26Updates to device trees for B4860 for DSP clusters and their L2 cachesPoonam Aggrwal
B4860 has 1 PPC core cluster and 3 DSP core clusters. Similarly B4420 has 1 PPC core cluster and 1 DSP core cluster. Each DSP core cluster consists of 2 SC3900 cores and a shared L2 cache. 1. Add DSP clusters for B4420 2. Reorganized the L2 cache nodes such that they now appear in only the soc specific dtsi files(b4860si-post.dtsi and b4420si-post.dtsi). Earlier they were shown partly in common b4si-post.dtsi and si specific b4860si-post.dtsi files . 3. Fixed an issue in b4860si-pre.dtsi, now DSP cluster correctly point to their respective L2 caches Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com> Signed-off-by: Shaveta Leekha <shaveta@freescale.com> Change-Id: Ie09007f4c596fc5947e0b4b005225b8b1f9aa443 Reviewed-on: http://git.am.freescale.net:8181/4005 Reviewed-by: Sethi Varun-B16395 <Varun.Sethi@freescale.com> Reviewed-by: Rivera Jose-B46482 <Jose.G.Rivera@freescale.com> Tested-by: Rivera Jose-B46482 <Jose.G.Rivera@freescale.com>
2013-08-26dpa_offload : fix kernel segfault in ipsec_offload applicationAlexandru Badicioiu
Buffer pool id for frames enqueued to ipsec_offload inbound macless interface must match the interface bpid. Signed-off-by: Alexandru Badicioiu <alexandru.badicioiu@freescale.com>
2013-08-22fsl/usb: Workarourd for USB erratum-A005697Ramneek Mehresh
As per USB specification, in the Suspend state, the status bit does not change until the port is suspended. However, there may be a delay in suspending a port if there is a transaction currently in progress on the bus. In the USBDR controller, the PORTSCx[SUSP] bit changes immediately when the application sets it and not when the port is actually suspended Workaround for this issue involves waiting for a minimum of 10ms to allow the controller to go into SUSPEND state before proceeding ahead Signed-off-by: Ramneek Mehresh <ramneek.mehresh@freescale.com> Change-Id: I8d20619d7d62afc12981c2f913c3d3ec735f7e64 Reviewed-on: http://git.am.freescale.net:8181/3996 Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com> Reviewed-by: Aggrwal Poonam-B10812 <Poonam.Aggrwal@freescale.com> Reviewed-by: Rivera Jose-B46482 <Jose.G.Rivera@freescale.com>
2013-08-21dpaa_eth: free bp platform deviceMadalin Bucur
The platform device was not released. Signed-off-by: Madalin Bucur <madalin.bucur@freescale.com> Change-Id: I44c134aba26f5eca5cad60fba3d0051ae9f99c8f Reviewed-on: http://git.am.freescale.net:8181/3911 Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com> Reviewed-by: Radulescu Ruxandra Ioana-B05472 <ruxandra.radulescu@freescale.com> Reviewed-by: Rivera Jose-B46482 <Jose.G.Rivera@freescale.com>
2013-08-21crypto: caam - Add Platform driver for Job RingRuchika Gupta
The SEC Job Rings are now available as individual devices. This would enable sharing of job rings between kernel and user space. Job Rings can now be dynamically bound/unbound from kernel. Changes are made in the following layers of CAAM Driver 1. Controller driver - Does basic initialization of CAAM Block. - Creates platform devices for Job Rings. (Earlier the initialization of Job ring was done by the controller driver) 2. JobRing Platform driver - Manages the platform Job Ring devices created by the controller driver Signed-off-by: Ruchika Gupta <ruchika.gupta@freescale.com> Change-Id: I2f0ec2ad0184155d3187c44fd059014f5bfca887 Reviewed-on: http://git.am.freescale.net:8181/3971 Reviewed-by: Garg Vakul-B16394 <vakul@freescale.com> Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com> Reviewed-by: Rivera Jose-B46482 <Jose.G.Rivera@freescale.com>
2013-08-19dpaa_eth: fix non-smp buildMadalin Bucur
Cleanup includes and fix non-smp build, removed unnecessary info. Signed-off-by: Madalin Bucur <madalin.bucur@freescale.com> Change-Id: I32596b8eb0c4b674de1f3684993d1ba09f20947e Reviewed-on: http://git.am.freescale.net:8181/3856 Reviewed-by: Bucur Madalin-Cristian-B32716 <madalin.bucur@freescale.com> Reviewed-by: Rivera Jose-B46482 <Jose.G.Rivera@freescale.com> Tested-by: Rivera Jose-B46482 <Jose.G.Rivera@freescale.com>
2013-08-19crypto: caam - add option for enabling DEBUG modeAlex Porosanu
This patch adds an option to the Kconfig file for SEC which enables the user to see the debug messages that are printed inside the SEC driver. Change-Id: I7e6f4b8ea038e97d276cb05356d8dc290b83092b Signed-off-by: Alex Porosanu <alexandru.porosanu@freescale.com> Reviewed-on: http://git.am.freescale.net:8181/3648 Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com> Reviewed-by: Geanta Neag Horia Ioan-B05471 <horia.geanta@freescale.com> Reviewed-by: Rivera Jose-B46482 <Jose.G.Rivera@freescale.com>
2013-08-19crypto: caam - Remove unused functions from Job RingRuchika Gupta
Signed-off-by: Ruchika Gupta <ruchika.gupta@freescale.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au> Change-Id: I4b07a3c5411e40341be3821edeb022102c4fc4e9 Reviewed-on: http://git.am.freescale.net:8181/3970 Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com> Reviewed-by: Garg Vakul-B16394 <vakul@freescale.com> Reviewed-by: Rivera Jose-B46482 <Jose.G.Rivera@freescale.com>
2013-08-19Powerpc:eSDCH: Add workaround about clock glitch issue on b4xxHaijun Zhang
A-003980: SDHC: Glitch is generated on the card clock with software reset or clock divider change Description: A glitch may occur on the SDHC card clock when the software sets the RSTA bit (software reset) in the system control register. It can also be generated by setting the clock divider value. The glitch produced can cause the external card to switch to an unknown state. The occurrence is not deterministic. Workaround: A simple workaround is to disable the SD card clock before the software reset, and enable it when the module resumes normal operation. The Host and the SD card are in a master-slave relationship. The Host provides clock and control transfer across the interface. Therefore, any existing operation is discarded when the Host controller is reset. The recommended flow is as follows: 1. Software disable bit[3], SDCLKEN, of the System Control Register 2. Trigger software reset and/or set clock divider 3. Check bit[3], SDSTB, of the Present State Register for stable clock 4. Enable bit[3], SDCLKEN, of the System Control Register Using the above method, the eSDHC cannot send command or transfer data when there is a glitch in the clock line, and the glitch does not cause any issue. Signed-off-by: Haijun Zhang <haijun.zhang@freescale.com> Change-Id: I04ba0a6c107254b2f74f9c6ebd1f192d045448cf Reviewed-on: http://git.am.freescale.net:8181/3858 Reviewed-by: Xie Xiaobo-R63061 <X.Xie@freescale.com> Reviewed-by: Rivera Jose-B46482 <Jose.G.Rivera@freescale.com> Tested-by: Rivera Jose-B46482 <Jose.G.Rivera@freescale.com>
2013-08-19powerpc/smp: fix build issueWang Dongsheng
Fix build problem caused by typo introduced by 18621b8153 (build error: unused variable 'smp_85xx_ops') Signed-off-by: Wang Dongsheng <dongsheng.wang@freescale.com> Change-Id: I256530961f98a2bc81a62bf0911628979438d61c Reviewed-on: http://git.am.freescale.net:8181/4039 Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com> Reviewed-by: Wood Scott-B07421 <scottwood@freescale.com> Reviewed-by: Bhushan Bharat-R65777 <Bharat.Bhushan@freescale.com> Reviewed-by: Rivera Jose-B46482 <Jose.G.Rivera@freescale.com>
generated by cgit v0.10.2 at 2024-11-17 16:19:29 (GMT)