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2013-11-07mtd: nand: remove deprecated IRQF_DISABLEDMichael Opdenacker
This patch proposes to remove the use of the IRQF_DISABLED flag It's a NOOP since 2.6.35 and it will be removed one day. Signed-off-by: Michael Opdenacker <michael.opdenacker@free-electrons.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2013-11-07mtd: dataflash: Say if we find a device we don't supportMark Brown
Ensure that the error message if we identify a flash we don't know how to talk to is displayed on the console in order to aid diagnostics. While we're at convert the message to use dev_info() rather than our hand rolled version of it for consistency. Signed-off-by: Mark Brown <broonie@linaro.org> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2013-11-07mtd: nand: omap: fix error return code in omap_nand_probe()Wei Yongjun
Fix to return a negative error code from the error handling case instead of 0, to more closely match the rest of this function. Signed-off-by: Wei Yongjun <yongjun_wei@trendmicro.com.cn> Acked-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com> Acked-by: Pekon Gupta <pekon@ti.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2013-11-07mtd: nand_bbt: kill NAND_BBT_SCANALLPAGESBrian Norris
Now that the last user of NAND_BBT_SCANALLPAGES has been removed, let's kill this peculiar BBT feature flag. Signed-off-by: Brian Norris <computersforpeace@gmail.com> Reviewed-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com> Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com>
2013-11-07mtd: m25p80: fixup device removal failure pathBrian Norris
Device removal should fail if MTD unregistration fails. Signed-off-by: Brian Norris <computersforpeace@gmail.com> Reviewed-by: Marek Vasut <marex@denx.de>
2013-11-07mtd: mxc_nand: Include linux/of.h headerSachin Kamat
'of_match_ptr' is defined in linux/of.h. Include it explicitly to avoid build breakage in the future. Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2013-11-07mtd: remove duplicated include from mtdcore.cWei Yongjun
Remove duplicated include. Signed-off-by: Wei Yongjun <yongjun_wei@trendmicro.com.cn> Acked-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2013-11-07mtd: m25p80: add support for Macronix mx25l3255eBrian Norris
A new 32Mbit SPI NOR flash from Macronix. Nothing special. Signed-off-by: Brian Norris <computersforpeace@gmail.com> Reviewed-by: Marek Vasut <marex@denx.de>
2013-11-07mtd: nand: omap: remove selection of BCH ecc-scheme via KConfigPekon Gupta
With OMAP NAND driver updates, selection of ecc-scheme: *DT enabled kernel* depends on ti,nand-ecc-opt and ti,elm-id DT bindings. *Non DT enabled kernel* depends on elm_dev and ecc-scheme passed along with platform-data from board file. So, selection of ecc-scheme (BCH8 or BCH4) from KConfig can be removed Signed-off-by: Pekon Gupta <pekon@ti.com> Tested-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2013-11-07mtd: nand: omap: updated devm_xx for all resource allocation and free callsPekon Gupta
"Managed Device Resource" or devm_xx calls takes care of automatic freeing of the resource in case of: - failure during driver probe - failure during resource allocation - detaching or unloading of driver module (rmmod) Reference: Documentation/driver-model/devres.txt Though OMAP NAND driver handles freeing of resource allocation in most of the cases, but using devm_xx provides more clean and effortless approach to handle all such cases. - simplifies label for exiting probe during error s/out_release_mem_region/return_error Signed-off-by: Pekon Gupta <pekon@ti.com> Tested-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2013-11-07mtd: nand: omap: use drivers/mtd/nand/nand_bch.c wrapper for BCH ECC instead ↵Pekon Gupta
of lib/bch.c generic frame-work in mtd/nand/nand_bch.c is a wrapper above lib/bch.h which encapsulates all control information specific to BCH ecc algorithm in software. Thus this patch: (1) replace omap specific implementations with equivalent wrapper in nand_bch.c so that generic code from nand_bch.c is re-used. like; omap3_correct_data_bch() -> nand_bch_correct_data() omap3_free_bch() -> nand_bch_free() (2) replace direct calls to lib/bch.c with wrapper functions defined in nand_bch.c init_bch() -> nand_bch_init() Signed-off-by: Pekon Gupta <pekon@ti.com> Tested-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2013-11-07mtd: nand: omap: clean-up ecc layout for BCH ecc schemesPekon Gupta
In current implementation omap3_init_bch_tail() is a common function to define ecc layout for different BCHx ecc schemes.This patch: (1) removes omap3_init_bch_tail() and defines ecc layout for individual ecc-schemes along with populating their nand_chip->ecc data in omap_nand_probe(). This improves the readability and scalability of code for add new ecc schemes in future. (2) removes 'struct nand_bbt_descr bb_descrip_flashbased' because default nand_bbt_descr in nand_bbt.c matches the same (.len=1 for x8 devices). (3) add the check to see if NAND device has enough OOB/Spare bytes to store ECC signature of whole page, as defined by ecc-scheme. Signed-off-by: Pekon Gupta <pekon@ti.com> Tested-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2013-11-07mtd: nand: omap2: clean-up BCHx_HW and BCHx_SW ECC configurations in ↵Pekon Gupta
device_probe current implementation in omap3_init_bch() has some redundant code like: (1) omap3_init_bch() re-probes the DT-binding to detect presence of ELM h/w engine on SoC. And based on that it selects implemetation of ecc-scheme. However, this is already done as part of GPMC DT parsing. (2) As omap3_init_bch() serves as common function for configuring all types of BCHx ecc-schemes, so there are multiple levels of redudant if..then..else checks while populating nand_chip->ecc. This patch make following changes to OMAP NAND driver: (1) removes omap3_init_bch(): each ecc-scheme is individually configured in omap_nand_probe() there by removing redundant if..then..else checks. (2) adds is_elm_present(): re-probing of ELM device via DT is not required as it's done in GPMC driver probe. Thus is_elm_present() just initializes ELM driver with NAND probe data, when ecc-scheme with h/w based error-detection is used. (3) separates out configuration of different flavours of "BCH4" and "BCH8" ecc-schemes as given in below table (4) conditionally compiles callbacks implementations of ecc.hwctl(), ecc.calculate(), ecc.correct() to avoid warning of un-used functions. +---------------------------------------+---------------+---------------+ | ECC scheme |ECC calculation|Error detection| +---------------------------------------+---------------+---------------+ |OMAP_ECC_HAM1_CODE_HW |H/W (GPMC) |S/W | +---------------------------------------+---------------+---------------+ |OMAP_ECC_BCH4_CODE_HW_DETECTION_SW |H/W (GPMC) |S/W (lib/bch.c)| | (needs CONFIG_MTD_NAND_ECC_BCH) | | | | | | | |OMAP_ECC_BCH4_CODE_HW |H/W (GPMC) |H/W (ELM) | | (needs CONFIG_MTD_NAND_OMAP_BCH && | | | | ti,elm-id) | | | +---------------------------------------+---------------+---------------+ |OMAP_ECC_BCH8_CODE_HW_DETECTION_SW |H/W (GPMC) |S/W (lib/bch.c)| | (needs CONFIG_MTD_NAND_ECC_BCH) | | | | | | | |OMAP_ECC_BCH8_CODE_HW |H/W (GPMC) |H/W (ELM) | | (needs CONFIG_MTD_NAND_OMAP_BCH && | | | | ti,elm-id) | | | +---------------------------------------+---------------+---------------+ - 'CONFIG_MTD_NAND_ECC_BCH' is generic KConfig required to build lib/bch.c which is required for ECC error detection done in software. (mainly used for legacy platforms which do not have on-chip ELM engine) - 'CONFIG_MTD_NAND_OMAP_BCH' is OMAP specific Kconfig to detemine presence on ELM h/w engine on SoC. Signed-off-by: Pekon Gupta <pekon@ti.com> Tested-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2013-11-07mtd: nand: omap: use DT specified bus-width only for scanning NAND devicePekon Gupta
This patch: - calls nand_scan_ident() using bus-width as passed by DT - removes double calls to nand_scan_ident(), in case first call fails then omap_nand_probe just returns error. Signed-off-by: Pekon Gupta <pekon@ti.com> Tested-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2013-11-07mtd: nand: omap: cleanup: replace local references with generic framework namesPekon Gupta
This patch updates following in omap_nand_probe() and omap_nand_remove() - replaces "info->nand" with "nand_chip" (struct nand_chip *nand_chip) - replaces "info->mtd" with "mtd" (struct mtd_info *mtd) - white-space and formatting cleanup Signed-off-by: Pekon Gupta <pekon@ti.com> Tested-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2013-11-07mtd: nand: omap: combine different flavours of 1-bit hamming ecc schemesPekon Gupta
OMAP NAND driver currently supports multiple flavours of 1-bit Hamming ecc-scheme, like: - OMAP_ECC_HAMMING_CODE_DEFAULT 1-bit hamming ecc code using software library - OMAP_ECC_HAMMING_CODE_HW 1-bit hamming ecc-code using GPMC h/w engine - OMAP_ECC_HAMMING_CODE_HW_ROMCODE 1-bit hamming ecc-code using GPMC h/w engin with ecc-layout compatible to ROM code. This patch combines above multiple ecc-schemes into single implementation: - OMAP_ECC_HAM1_CODE_HW 1-bit hamming ecc-code using GPMC h/w engine with ROM-code compatible ecc-layout. Signed-off-by: Pekon Gupta <pekon@ti.com> Reviewed-by: Felipe Balbi <balbi@ti.com> Acked-by: Tony Lindgren <tony@atomide.com> Tested-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2013-11-07ARM: OMAP2+: cleaned-up DT support of various ECC schemesPekon Gupta
OMAP NAND driver support multiple ECC scheme, which can used in different flavours, depending on in-build Hardware engines present on SoC. This patch updates following in DT bindings related to sectionion of ecc-schemes - ti,elm-id: replaces elm_id (maintains backward compatibility) - ti,nand-ecc-opts: selection of h/w or s/w implementation of an ecc-scheme depends on ti,elm-id. (supported values ham1, bch4, and bch8) - maintain backward compatibility to deprecated DT bindings (sw, hw, hw-romcode) Below table shows different flavours of ecc-schemes supported by OMAP devices +---------------------------------------+---------------+---------------+ | ECC scheme |ECC calculation|Error detection| +---------------------------------------+---------------+---------------+ |OMAP_ECC_HAM1_CODE_HW |H/W (GPMC) |S/W | +---------------------------------------+---------------+---------------+ |OMAP_ECC_BCH8_CODE_HW_DETECTION_SW |H/W (GPMC) |S/W | |(requires CONFIG_MTD_NAND_ECC_BCH) | | | +---------------------------------------+---------------+---------------+ |OMAP_ECC_BCH8_CODE_HW |H/W (GPMC) |H/W (ELM) | |(requires CONFIG_MTD_NAND_OMAP_BCH && | | | | ti,elm-id in DT) | | | +---------------------------------------+---------------+---------------+ To optimize footprint of omap2-nand driver, selection of some ECC schemes also require enabling following Kconfigs, in addition to setting appropriate DT bindings - Kconfig:CONFIG_MTD_NAND_ECC_BCH error detection done in software - Kconfig:CONFIG_MTD_NAND_OMAP_BCH error detection done by h/w engine Signed-off-by: Pekon Gupta <pekon@ti.com> Reviewed-by: Felipe Balbi <balbi@ti.com> Acked-by: Tony Lindgren <tony@atomide.com> Tested-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2013-11-07mtd: m25p80: remove 'disabled' device checkBrian Norris
It seems like the following commit was never necessary commit 5f949137952020214cd167093dd7be448f21c079 Author: Shaohui Xie <Shaohui.Xie@freescale.com> Date: Fri Oct 14 15:49:00 2011 +0800 mtd: m25p80: don't probe device which has status of 'disabled' because it duplicates the code in of_platform_device_create_pdata() which ensures that 'disabled' nodes are never instantiated. Also, drop the __maybe_unused. Signed-off-by: Brian Norris <computersforpeace@gmail.com> Reviewed-by: Sourav Poddar <sourav.poddar@ti.com> Reviewed-by: Grant Likely <grant.likely@linaro.org> Cc: Rob Herring <rob.herring@calxeda.com> Cc: <devicetree@vger.kernel.org>
2013-11-07mtd: m25p80: remove M25PXX_USE_FAST_READ KconfigBrian Norris
Remove the compile-time option for FAST_READ, since we have run-time support for detecting it. This refactors the logic for enabling fast-read, such that for DT-enabled devices, we honor the "m25p,fast-read" property but for non-DT devices, we default to using FAST_READ whenever the flash device supports it. Normal READ and FAST_READ differ only in the following: * FAST_READ supports SPI higher clock frequencies [1] * number of dummy cycles; FAST_READ requires 8 dummy cycles (whereas READ requires 0) to allow the flash sufficient setup time, even when running at higher clock speeds Thus, for flash chips which support FAST_READ, there is otherwise no limiting reason why we cannot use the FAST_READ opcode instead of READ. It simply allows the SPI controller to run at higher clock rates. So theoretically, nobody should be needing the compile-time option anyway. [1] I have a Spansion S25FL128S datasheet which says: "The maximum operating clock frequency for the READ command is 50 MHz." And: "The maximum operating clock frequency for FAST READ command is 133 MHz." Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2013-11-07mtd: m25p80: re-align ID entriesBrian Norris
No change in the table data. Signed-off-by: Brian Norris <computersforpeace@gmail.com> Reviewed-by: Sourav Poddar <sourav.poddar@ti.com>
2013-11-07mtd: m25p80: remove obsolete FIXMEBrian Norris
The FIXME and NOTE have already been fixed (we have FAST_READ support). Signed-off-by: Brian Norris <computersforpeace@gmail.com> Reviewed-by: Sourav Poddar <sourav.poddar@ti.com> Acked-by: Marek Vasut <marex@denx.de>
2013-11-07mtd: m25p80: fix allocation sizeBrian Norris
This patch fixes two memory errors: 1. During a probe failure (in mtd_device_parse_register?) the command buffer would not be freed. 2. The command buffer's size is determined based on the 'fast_read' boolean, but the assignment of fast_read is made after this allocation. Thus, the buffer may be allocated "too small". To fix the first, just switch to the devres version of kzalloc. To fix the second, increase MAX_CMD_SIZE unconditionally. It's not worth saving a byte to fiddle around with the conditions here. This problem was reported by Yuhang Wang a while back. Signed-off-by: Brian Norris <computersforpeace@gmail.com> Reported-by: Yuhang Wang <wangyuhang2014@gmail.com> Reviewed-by: Sourav Poddar <sourav.poddar@ti.com> Cc: <stable@vger.kernel.org>
2013-11-07mtd: gpmi: imx6: fix the wrong method for checking ready/busyHuang Shijie
In the imx6, all the ready/busy pins are binding togeter. So we should always check the ready/busy pin of the chip 0. In the other word, when the CS1 is enabled, we should also check the ready/busy of chip 0; if we check the ready/busy of chip 1, we will get the wrong result. Signed-off-by: Huang Shijie <b32955@freescale.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2013-11-07mtd: gpmi: scan two nand chipsHuang Shijie
Some nand chip has two DIEs in a single chip, such as Micron MT29F32G08QAA. Each die has its own chip select pin, so this chip acts as two nand chips. If we only scan one chip, we may find that we only get 2G for this chip, but in actually, this chip's size is 4G. So scan two chips by default. Signed-off-by: Huang Shijie <b32955@freescale.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2013-11-07mtd: gpmi: use DMA channel 0 for all the nand chipsHuang Shijie
We only have one DMA channel : the channel 0. Use DMA channel 0 to access all the nand chips. Signed-off-by: Huang Shijie <b32955@freescale.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2013-11-07mtd: gpmi: decouple the chip select from the DMA channelHuang Shijie
Decouple the chip select from the DMA channel, we use the DMA channel 0 to accecc all the nand devices. Signed-off-by: Huang Shijie <b32955@freescale.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2013-11-07driver/mtd/ifc: Read Status while programming NAND flashPrabhakar Kushwaha
as per controller description, "While programming a NAND flash, status read should never skipped. Because it may happen that a new command is issued to the NAND Flash, even when the device has not yet finished processing the previous request. This may result in unpredictable behaviour." IFC controller never polls for R/B signal after command send. It just return control to software. This behaviour may not occur with NAND flash access. because new commands are sent after polling R/B signal. But it may happen in scenario where GPCM-ASIC and NAND flash device are working simultaneously. Update the controller driver to take care of this requirement Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2013-11-07driver/mtd/IFC: Add support of 8K page size NAND flashPrabhakar Kushwaha
Current IFC driver supports till 4K page size NAND flash. Add support of 8K Page size NAND flash - Add nand_ecclayout for 4 bit & 8 bit ecc - Defines constants - also fix ecc.strength for 8bit ecc of 8K page size NAND Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2013-11-07mtd: map: fixed bug in 64-bit systemsWang Haitao
Hardware: CPU: XLP832,the 64-bit OS NOR Flash:S29GL128S 128M Software: Kernel:2.6.32.41 Filesystem:JFFS2 When writing files, errors appear: Write len 182 but return retlen 180 Write of 182 bytes at 0x072c815c failed. returned -5, retlen 180 Write len 186 but return retlen 184 Write of 186 bytes at 0x072caff4 failed. returned -5, retlen 184 These errors exist only in 64-bit systems,not in 32-bit systems. After analysis, we found that the left shift operation is wrong in map_word_load_partial. For instance: unsigned char buf[3] ={0x9e,0x3a,0xea}; map_bankwidth(map) is 4; for (i=0; i < 3; i++) { int bitpos; bitpos = (map_bankwidth(map)-1-i)*8; orig.x[0] &= ~(0xff << bitpos); orig.x[0] |= buf[i] << bitpos; } The value of orig.x[0] is expected to be 0x9e3aeaff, but in this situation(64-bit System) we'll get the wrong value of 0xffffffff9e3aeaff due to the 64-bit sign extension: buf[i] is defined as "unsigned char" and the left-shift operation will convert it to the type of "signed int", so when left-shift buf[i] by 24 bits, the final result will get the wrong value: 0xffffffff9e3aeaff. If the left-shift bits are less than 24, then sign extension will not occur. Whereas the bankwidth of the nor flash we used is 4, therefore this BUG emerges. Signed-off-by: Pang Xunlei <pang.xunlei@zte.com.cn> Signed-off-by: Zhang Yi <zhang.yi20@zte.com.cn> Signed-off-by: Lu Zhongjun <lu.zhongjun@zte.com.cn> Cc: <stable@vger.kernel.org> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2013-11-07mtd: Move major number definitions to major.hEzequiel Garcia
This patch moves the char and block major number definitions to major.h to be with the rest of the major numbers. While doing this, include major.h in the files that need it. Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2013-11-07mtd: bcm47xxpart: detect "factory" partitionRafał Miłecki
A new type of partition with magic FCTY was found on Huawei E970: 46 43 54 59 4b 51 37 4e 41 42 31 38 41 32 39 30 |FCTYKQ7NAB18A290| Signed-off-by: Rafał Miłecki <zajec5@gmail.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2013-11-07mtd: bcm47xxpart: detect block aligned Squashfs partitionRafał Miłecki
Most of the bcm47xx devices use TRX format for storing kernel and some partition like Squashfs or JFFS2. This is pretty flexible solution, CFE (the bootloader) just writes (and later boots) TRX at some hardcoded place and paritions can vary in the size. However some devices don't use TRX format. Very recently we have discovered ZTE H218N that has kernel and rootfs partitions at some "random" places. This patch allows Linux find a rootfs partition after installing custom image with a CFE bootloader. Signed-off-by: Rafał Miłecki <zajec5@gmail.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2013-11-07mtd: bcm47xxpart: handle malloc failuresHauke Mehrtens
Handle return NULL in malloc. Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2013-11-07mtd: bcm47xxnflash: Use devm_kzallocSachin Kamat
devm_kzalloc is device managed and simplifies the code. Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2013-11-07mtd: bcm47xxnflash: Use module_platform_driverSachin Kamat
module_platform_driver simplifies the code by removing boiler plate. Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2013-11-07mtd: plat-ram: Use module_platform_driverSachin Kamat
module_platform_driver simplifies the code by removing boiler plate. Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2013-11-07mtd: nand: hack ONFI for non-power-of-2 dimensionsBrian Norris
Some bright specification writers decided to write this in the ONFI spec (from ONFI 3.0, Section 3.1): "The number of blocks and number of pages per block is not required to be a power of two. In the case where one of these values is not a power of two, the corresponding address shall be rounded to an integral number of bits such that it addresses a range up to the subsequent power of two value. The host shall not access upper addresses in a range that is shown as not supported." This breaks every assumption MTD makes about NAND block/chip-size dimensions -- they *must* be a power of two! And of course, an enterprising manufacturer has made use of this lovely freedom. Exhibit A: Micron MT29F32G08CBADAWP "- Plane size: 2 planes x 1064 blocks per plane - Device size: 32Gb: 2128 blockss [sic]" This quickly hits a BUG() in nand_base.c, since the extra dimensions overflow so we think it's a second chip (on my single-chip setup): ONFI param page 0 valid ONFI flash detected NAND device: Manufacturer ID: 0x2c, Chip ID: 0x44 (Micron MT29F32G08CBADAWP), 4256MiB, page size: 8192, OOB size: 744 ------------[ cut here ]------------ kernel BUG at drivers/mtd/nand/nand_base.c:203! Internal error: Oops - BUG: 0 [#1] SMP ARM [... trim ...] [<c02cf3e4>] (nand_select_chip+0x18/0x2c) from [<c02d25c0>] (nand_do_read_ops+0x90/0x424) [<c02d25c0>] (nand_do_read_ops+0x90/0x424) from [<c02d2dd8>] (nand_read+0x54/0x78) [<c02d2dd8>] (nand_read+0x54/0x78) from [<c02ad2c8>] (mtd_read+0x84/0xbc) [<c02ad2c8>] (mtd_read+0x84/0xbc) from [<c02d4b28>] (scan_read.clone.4+0x4c/0x64) [<c02d4b28>] (scan_read.clone.4+0x4c/0x64) from [<c02d4c88>] (search_bbt+0x148/0x290) [<c02d4c88>] (search_bbt+0x148/0x290) from [<c02d4ea4>] (nand_scan_bbt+0xd4/0x5c0) [... trim ...] ---[ end trace 0c9363860d865ff2 ]--- So to fix this, just truncate these dimensions down to the greatest power-of-2 dimension that is less than or equal to the specified dimension. Signed-off-by: Brian Norris <computersforpeace@gmail.com> Cc: <stable@vger.kernel.org>
2013-11-07mtd: nand: pxa3xx: Allocate data buffer on detected flash sizeEzequiel Garcia
This commit replaces the currently hardcoded buffer size, by a dynamic detection scheme. First a small 256 bytes buffer is allocated so the device can be detected (using READID and friends commands). After detection, this buffer is released and a new buffer is allocated to acommodate the page size plus out-of-band size. Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com> Tested-by: Daniel Mack <zonque@gmail.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2013-11-07mtd: nand: pxa3xx: Move DMA I/O enablingEzequiel Garcia
Instead of setting info->dma each time a command is prepared, we can move it after the DMA buffers are allocated. This is more clear and it's the proper place to enable this, given DMA cannot be turned on and off during runtime. Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com> Tested-by: Daniel Mack <zonque@gmail.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2013-11-07mtd: m25p80: Add support for Micron N25Q512A memoryPriyanka Jain
Micron N25Q512A is a spi flash memory with following features: -64MB size, 1.8V, Mulitple I/O, 4KB Sector erase memory. -Memory is organised as 1024(64KB) main sectors. -Each sector is divided into 256 pages. -Register set/Opcodes are similar to other N25Q family products. Signed-off-by: Priyanka Jain <Priyanka.Jain@freescale.com> Acked-by: Marek Vasut <marex@denx.de> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2013-11-07mtg: docg3: use free_bch() instead of kfree()Wei Yongjun
Use free_bch() instead of kfree() to free init_bch() allocated data. Signed-off-by: Wei Yongjun <yongjun_wei@trendmicro.com.cn> Acked-by: Robert Jarzmik <robert.jarzmik@free.fr> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2013-11-07mtd: docg4: fix status polling loopMike Dunn
The loop that polls the status register waiting for an operation to complete foolishly bases the timeout simply on the number of loop iterations that have ocurred. When I increased the processor clock speed, timeouts started to appear for long block erasure operations. This patch measures the timeout using jiffies. Signed-off-by: Mike Dunn <mikedunn@newsguy.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2013-11-07mtd: socrates_nand: Use dev_err instead of printkSachin Kamat
dev_err is preferred to printk. Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2013-11-07mtd: socrates_nand: Use devm_kzallocSachin Kamat
devm_kzalloc is device managed and makes code simpler. Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2013-11-07mtd: socrates_nand: Remove redundant dev_set_drvdataSachin Kamat
Driver core will set the driver data to NULL upon detach or probe failure. Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2013-11-07mtd: fsl_ifc_nand: Use module_platform_driverSachin Kamat
module_platform_driver removes boiler plate code and makes it simpler. Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2013-11-07mtd: fsl_ifc_nand: Remove redundant dev_set_drvdataSachin Kamat
Driver core will set the driver data to NULL upon detach or probe failure. Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2013-11-07mtd: sst25l: Use devm_kzallocSachin Kamat
devm_kzalloc is device managed and makes code simpler. Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2013-11-07mtd: sst25l: Remove redundant spi_set_drvdataSachin Kamat
Driver core will set the driver data to NULL upon detach or probe failure. Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2013-11-07mtd: Use MTD_BLOCK_MAJOR instead of the magic numberEzequiel Garcia
Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
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