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Transmit Data Register(TDR) used as the destination address
of EDMA transaction is in big-endian mode. The audio data in
memory and EDMA transaction are in little-endian mode. For
S16_LE format data, a workaround is to swap the original 16-bit
data, and then write into the higher 16 bit of TDR.
Signed-off-by: Alison Wang <alison.wang@freescale.com>
Change-Id: Ib15832743e9a4c69792f2dad4cb00fbbc1d2daaa
Reviewed-on: http://git.am.freescale.net:8181/21063
Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com>
Reviewed-by: Jingchang Lu <jingchang.lu@freescale.com>
Reviewed-by: Zhengxiong Jin <Jason.Jin@freescale.com>
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ERR005829 handling
This patch adds support for non RX-FIFO (legacy) mode and conditional ERRATA
ERR005829 handling in flexcan driver.
Both these features are now selectable via Kconfig entries and hence can
be turned-on/off as per a SoC feature set availability.
Signed-off-by: Bhupesh Sharma <bhupesh.sharma@freescale.com>
Change-Id: I2a5a4970b7e5b18a45fb421f1c0d008ad5a3b0f8
Reviewed-on: http://git.am.freescale.net:8181/21856
Reviewed-by: Zhengxiong Jin <Jason.Jin@freescale.com>
Tested-by: Zhengxiong Jin <Jason.Jin@freescale.com>
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This patch adds the device nodes for 4 FlexCAN IP instances
available on LS1021A SoC in the ls1021a.dtsi file and enables
only the first two instances which are supported on the QDS
board in ls1021a-qds.dts file.
Signed-off-by: Bhupesh Sharma <bhupesh.sharma@freescale.com>
---
Previous version of this patch under review upstream:
http://patchwork.ozlabs.org/patch/363588/
Will re-spin the patch with the DTS
Change-Id: I592e5f8562ad173801a53433aec9a91b00ba8bb0
Reviewed-on: http://git.am.freescale.net:8181/21855
Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com>
Reviewed-by: Zhengxiong Jin <Jason.Jin@freescale.com>
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The FlexCAN IP on certain SoCs like (Freescale's LS1021A) is modelled in
a big-endian fashion, i.e. the registers and the message buffers are
organized in a BE way.
More details about the LS1021A SoC can be seen here:
http://www.freescale.com/webapp/sps/site/prod_summary.jsp?code=LS1021A&nodeId=018rH325E4017B#
This patch ensures that the register read/write APIs are remodelled to
address such cases, while ensuring that existing platforms (where the
FlexCAN IP was modelled in LE way) do not break.
Tested on LS1021A-QDS board.
Signed-off-by: Bhupesh Sharma <bhupesh.sharma@freescale.com>
Change-Id: Ibaa6b1816670537466b227b5032be73338435c03
Reviewed-on: http://git.am.freescale.net:8181/21854
Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com>
Reviewed-by: Zhengxiong Jin <Jason.Jin@freescale.com>
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This patch adds ls1021a flexcan device entry to the flexcan driver code.
Signed-off-by: Bhupesh Sharma <bhupesh.sharma@freescale.com>
---
Previous version of this patch under review upstream:
http://patchwork.ozlabs.org/patch/363588/
Change-Id: Ie01ec4583e1dc4efd90eb05e69ed45ae351d9d4e
Reviewed-on: http://git.am.freescale.net:8181/21853
Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com>
Reviewed-by: Zhengxiong Jin <Jason.Jin@freescale.com>
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supported in 3.12 kernel
Signed-off-by: Bhupesh Sharma <bhupesh.sharma@freescale.com>
Change-Id: I731e457b0b29a794c752116921b119c37514758a
Reviewed-on: http://git.am.freescale.net:8181/21852
Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com>
Reviewed-by: Zhengxiong Jin <Jason.Jin@freescale.com>
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This patch increases the mask in the FLEXCAN_MCR_MAXMB() to 7 bits as in the
newer flexcan cores the MAXMB field is 7 bits wide.
Reported-by: David Jander <david@protonic.nl>
Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
---
Cherry-picked from linux-next: 4c728d804c4b9d1ae7f76e8f32c419bc21a6e540
Change-Id: If7f3817dced00e4864da29579ff377788e9ee4ad
Reviewed-on: http://git.am.freescale.net:8181/21851
Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com>
Reviewed-by: Zhengxiong Jin <Jason.Jin@freescale.com>
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After sending a RTR frame the TX mailbox becomes a RX_EMPTY mailbox. To avoid
side effects when the RX-FIFO is full, this patch puts the TX mailbox into
TX_INACTIVE mode in the transmission complete interrupt handler. This, of
course, leaves a race window between the actual completion of the transmission
and the handling of tx-complete interrupt. However this is the best we can do
without busy polling the tx complete interrupt.
Cc: linux-stable <stable@vger.kernel.org>
Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
---
Cherry-picked from linux-next: de5944883ebbedbf5adc8497659772f5da7b7d72
Change-Id: Icfa9443f03246feee26868b9ad17147b2352c9fd
Reviewed-on: http://git.am.freescale.net:8181/21850
Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com>
Reviewed-by: Zhengxiong Jin <Jason.Jin@freescale.com>
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This patch implements the workaround mentioned in ERR005829:
ERR005829: FlexCAN: FlexCAN does not transmit a message that is enabled to
be transmitted in a specific moment during the arbitration process.
Workaround: The workaround consists of two extra steps after setting up a
message for transmission:
Step 8: Reserve the first valid mailbox as an inactive mailbox (CODE=0b1000).
If RX FIFO is disabled, this mailbox must be message buffer 0. Otherwise, the
first valid mailbox can be found using the "RX FIFO filters" table in the
FlexCAN chapter of the chip reference manual.
Step 9: Write twice INACTIVE code (0b1000) into the first valid mailbox.
Signed-off-by: David Jander <david@protonic.nl>
Cc: linux-stable <stable@vger.kernel.org>
Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
---
Cherry-picked from linux-next: 25e924450fcb23c11c07c95ea8964dd9f174652e
Change-Id: I504198f3b5aaba2c0277b596e925ce3bb17a2258
Reviewed-on: http://git.am.freescale.net:8181/21849
Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com>
Reviewed-by: Zhengxiong Jin <Jason.Jin@freescale.com>
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Apparently mailboxes may contain random data at startup, causing some of
them being prepared for message reception. This causes overruns being missed
or even confusing the IRQ check for trasmitted messages, increasing the transmit
counter instead of the error counter.
This patch initializes all mailboxes after the FIFO as RX_INACTIVE.
Signed-off-by: David Jander <david@protonic.nl>
Cc: linux-stable <stable@vger.kernel.org>
Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
---
Cherry-picked from linux-next: fc05b884a31dbf259cc73cc856e634ec3acbebb6
Change-Id: I0757258cb27cb2dec26e8afa219b512bba80be4b
Reviewed-on: http://git.am.freescale.net:8181/21848
Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com>
Reviewed-by: Zhengxiong Jin <Jason.Jin@freescale.com>
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This patch fixes the initialization of the TX mailbox. It is now correctly
initialized as TX_INACTIVE not RX_EMPTY.
Cc: linux-stable <stable@vger.kernel.org>
Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
---
Cherry-picked from linux-next: c32fe4ad3e4861b2bfa1f44114c564935a123dda
Change-Id: I3058828c8f0786726589a8fc05a5cc8467644e1b
Reviewed-on: http://git.am.freescale.net:8181/21847
Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com>
Reviewed-by: Zhengxiong Jin <Jason.Jin@freescale.com>
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Apparently can_restart() runs from a (timer-) interrupt and can call
flexcan_chip_[en|dis]able(), so avoid using usleep_range()
Signed-off-by: David Jander <david@protonic.nl>
Cc: linux-stable <stable@vger.kernel.org>
Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
---
Cherry-picked from linux-next: 8badd65e48c90d66587359d5329c2813088c0f50
Change-Id: I44fef82e8b413d6751a23fcb05d4a9f39ecb385a
Reviewed-on: http://git.am.freescale.net:8181/21846
Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com>
Reviewed-by: Zhengxiong Jin <Jason.Jin@freescale.com>
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Once the CAN-bus is open and a packet is sent, the controller switches
into the PASSIVE state. Once the BUS is closed again it goes the back
err-warning. The TX error counter goes 0 -> 0x80 -> 0x7f.
This patch makes sure that the user learns about this state chang
(CAN_STATE_ERROR_WARNING => CAN_STATE_ERROR_PASSIVE)
Signed-off-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de>
Signed-off-by: Matthias Klein <matthias.klein@optimeas.de>
Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
---
Cherry-picked from linux-next: 8ce261d0bb491da957278cdcba207791f329d1da
Change-Id: I311a7075033b493ef06818fb1e15f0eb69e96fa2
Reviewed-on: http://git.am.freescale.net:8181/21845
Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com>
Reviewed-by: Zhengxiong Jin <Jason.Jin@freescale.com>
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In case we don't have FLEXCAN_HAS_BROKEN_ERR_STATE and the user set
CAN_CTRLMODE_BERR_REPORTING once it can not be unset again until reboot.
So in case neither hardware nor user wants the error interrupt disable
the bit.
Signed-off-by: Alexander Stein <alexander.stein@systec-electronic.com>
Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
---
Cherry-picked from linux-next: bc03a54139baafcd8fe89ad115411c2c9c8a4905
Change-Id: Ieb52a8f0cc761a37faf4556284bf2c922c6bec79
Reviewed-on: http://git.am.freescale.net:8181/21844
Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com>
Reviewed-by: Zhengxiong Jin <Jason.Jin@freescale.com>
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Extend FlexCAN driver to support Vybrid. Vybrids variant of the IP
has ECC support which is controlled through the memory error
control register (MECR). There is also an errata which leads to
false positive error detections (ID e5295). This patch disables
the memory error detection completely.
Signed-off-by: Stefan Agner <stefan@agner.ch>
Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
---
Cherry-picked from linux-next: cdce844865bea6869b34bacc98af3711774f5bb5
Change-Id: I296ab822a5e2ed6e28b98e348d690eab8ec165ac
Reviewed-on: http://git.am.freescale.net:8181/21843
Reviewed-by: Zhengxiong Jin <Jason.Jin@freescale.com>
Tested-by: Zhengxiong Jin <Jason.Jin@freescale.com>
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ecr register
The funcion flexcan_get_berr_counter() may be called from userspace even if the
interface is down, this the clocks are disabled. This patch switches on the
clocks before accessing the ecr register.
Reported-by: Ashutosh Singh <ashuleapyear@gmail.com>
Signed-off-by: Stefan Agner <stefan@agner.ch>
Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
---
Cherry-picked from linux-next: ec56acfef2af184ca485ffeba16adbd56c110c94
Change-Id: I53ead04b0d5ae7c995809c51aef57acaedd3c3f4
Reviewed-on: http://git.am.freescale.net:8181/21842
Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com>
Reviewed-by: Zhengxiong Jin <Jason.Jin@freescale.com>
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CAN interfaces only support MTU values of 16 (CAN 2.0) and 72 (CAN FD).
Setting the MTU to other values is pointless but it does not really hurt.
With the introduction of the CAN FD support in drivers/net/can a new
function to switch the MTU for CAN FD has been introduced.
This patch makes use of this can_change_mtu() function to check for correct
MTU settings also in legacy CAN (2.0) devices.
Signed-off-by: Oliver Hartkopp <socketcan@hartkopp.net>
Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
---
Cherry-picked from linux-next: c971fa2ae42e73e9ccc2f5e93f268c8742da4c5d
Change-Id: I933a13a6c1f0b65fa748ffca352fa061940d8893
Reviewed-on: http://git.am.freescale.net:8181/21841
Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com>
Reviewed-by: Zhengxiong Jin <Jason.Jin@freescale.com>
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This patch replaces an open coded pdev->id_entry by platform_get_device_id().
Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
---
Cherry-picked from linux-next: d0873e6fc06686cf2dfb9adabb6ca65e9967c60f
Change-Id: I4a70c813dd5ce60b0c81cc57aa41a78413a891a0
Reviewed-on: http://git.am.freescale.net:8181/21840
Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com>
Reviewed-by: Zhengxiong Jin <Jason.Jin@freescale.com>
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This patch removes #ifdef CONFIG_PM_SLEEP to improve compile coverage.
Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
---
Cherry-picked from linux-next: 08c6d35154069becb01243176fb72b3bc60ff3cb
Change-Id: I062083cf2a38d7b3dfa2c9a3329c843ed6c91cf8
Reviewed-on: http://git.am.freescale.net:8181/21839
Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com>
Reviewed-by: Zhengxiong Jin <Jason.Jin@freescale.com>
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This patch moves the soft reset into a seperate function.
Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
---
Cherry-picked from Linux-next: 4b5b82274a17f0ebbf02378df2ba7f36a3f5af19
Change-Id: I52b4dabb58e6b9af6b5a1825bb20d40d0a8a91a7
Reviewed-on: http://git.am.freescale.net:8181/21838
Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com>
Reviewed-by: Zhengxiong Jin <Jason.Jin@freescale.com>
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This patch factors out freeze and unfreeze of the CAN core into seperate
functions. Experiments have shown that the transition from and to freeze mode
may take several microseconds, especially the time entering the freeze mode
depends on the current bitrate.
This patch adds a while loop which polls the Freeze Mode ACK bit (FRZ_ACK) that
indicates a successfull mode change. If the function runs into a timeout a
error value is returned.
Cc: linux-stable <stable@vger.kernel.org>
Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
---
Cherry-picked from linux-next:
b1aa1c7a2165b44ecce66286a3095cc6c7667d1c
Change-Id: I0db4998dab8782d717a99eebb6d3a56ed787bbde
Reviewed-on: http://git.am.freescale.net:8181/21837
Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com>
Reviewed-by: Zhengxiong Jin <Jason.Jin@freescale.com>
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Remove compilation errors from USB EHCI gadget driver
Signed-off-by: Nikhil Badola <nikhil.badola@freescale.com>
Change-Id: Ie0ad80495ab16fe8537e544113dde806c790ff05
Reviewed-on: http://git.am.freescale.net:8181/21819
Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com>
Reviewed-by: Ramneek Mehresh <ramneek.mehresh@freescale.com>
Reviewed-by: Zhengxiong Jin <Jason.Jin@freescale.com>
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Change raw read/write accessors to ioread/writebe32 for big endian registers
Signed-off-by: Nikhil Badola <nikhil.badola@freescale.com>
Change-Id: I75e181fc235f40aba7aa0d9db8f18c0783b04f82
Reviewed-on: http://git.am.freescale.net:8181/21818
Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com>
Reviewed-by: Ramneek Mehresh <ramneek.mehresh@freescale.com>
Reviewed-by: Zhengxiong Jin <Jason.Jin@freescale.com>
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Set USB_EN bit to select ULPI phy for USB controller version 2.5
Signed-off-by: Nikhil Badola <nikhil.badola@freescale.com>
Change-Id: I22fd6921d264d64f59d795d81f82ea89214862d9
Reviewed-on: http://git.am.freescale.net:8181/21817
Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com>
Reviewed-by: Ramneek Mehresh <ramneek.mehresh@freescale.com>
Reviewed-by: Zhengxiong Jin <Jason.Jin@freescale.com>
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Set DMA_MASK of usb platform device
Signed-off-by: Nikhil Badola <nikhil.badola@freescale.com>
Signed-off-by: Ramneek Mehresh <ramneek.mehresh@freescale.com>
Signed-off-by: Suresh Gupta <suresh.gupta@freescale.com>
Change-Id: I7d6387f3b95b6ec7c1999e14801dc4cfec7b016d
Reviewed-on: http://git.am.freescale.net:8181/21816
Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com>
Reviewed-by: Zhengxiong Jin <Jason.Jin@freescale.com>
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Change Power architecture specific APIs such as in_be32/out_be32
for registers read/write. Instead using ioread/writebe32 which are
defined for power as well as arm architecture
Signed-off-by: Nikhil Badola <nikhil.badola@freescale.com>
Change-Id: Ic5ecf4cb048dc4a6bae81bc0789b9bdb7d5c6ded
Reviewed-on: http://git.am.freescale.net:8181/21815
Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com>
Reviewed-by: Ramneek Mehresh <ramneek.mehresh@freescale.com>
Reviewed-by: Zhengxiong Jin <Jason.Jin@freescale.com>
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Remove compilation error from USB driver while compiling for
architectures other than PPC
Signed-off-by: Nikhil Badola <nikhil.badola@freescale.com>
Change-Id: Icc9d648f08ec5affb7b58374faef2c6e3b539182
Reviewed-on: http://git.am.freescale.net:8181/21814
Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com>
Reviewed-by: Ramneek Mehresh <ramneek.mehresh@freescale.com>
Reviewed-by: Zhengxiong Jin <Jason.Jin@freescale.com>
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Remove USB errata checking code from driver. Applicability of erratum
is retreived by reading corresponding property in device tree.
This property is written during device tree fixup.
Signed-off-by: Ramneek Mehresh <ramneek.mehresh@freescale.com>
Signed-off-by: Nikhil Badola <nikhil.badola@freescale.com>
Change-Id: I78a8b51a4b647d43f942666800bae4d515b15e70
Reviewed-on: http://git.am.freescale.net:8181/21813
Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com>
Reviewed-by: Zhengxiong Jin <Jason.Jin@freescale.com>
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Signed-off-by: Jaiprakash Singh <b44839@freescale.com>
Change-Id: I501144de5deaecb1bbbe913fc1ef82e8102d84a3
Reviewed-on: http://git.am.freescale.net:8181/21811
Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com>
Reviewed-by: Zhengxiong Jin <Jason.Jin@freescale.com>
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Signed-off-by: Shaveta Leekha <shaveta@freescale.com>
Change-Id: Ib16b8e2466757d782ec4bb5e8549f2dcb9208e32
Reviewed-on: http://git.am.freescale.net:8181/21801
Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com>
Reviewed-by: Zhengxiong Jin <Jason.Jin@freescale.com>
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LS1021a-qds has the same controller as GPIO on
powerpc platform(MPC8XXX), so remove
GPIO_MXC and add the one for GPIO_MPC8XXX
Enable gpio as default
Signed-off-by: Shaveta Leekha <shaveta@freescale.com>
Change-Id: I13531087c312ef9fa3bb607b5202592d13b29727
Reviewed-on: http://git.am.freescale.net:8181/21800
Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com>
Reviewed-by: Zhengxiong Jin <Jason.Jin@freescale.com>
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This patch adds support for GPIOs found on
Freescale's Layerscape architectures
It also makes mutual exclusion with ARCH_MXC,
since the GPIO controller on LayerArch
is different than MXC
Signed-off-by: Shaveta Leekha <shaveta@freescale.com>
Change-Id: I5601038b2fbca3e7eb7f5226d02db4a2a7098bf8
Reviewed-on: http://git.am.freescale.net:8181/21799
Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com>
Reviewed-by: Zhengxiong Jin <Jason.Jin@freescale.com>
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LS1021a-qds has the same ip block/controller as
GPIO on powerpc platform(MPC8XXX).
So use portable i/o accessors, as in_be32/out_be32
accessors are Power architecture specific whereas
ioread/writebe32 are available in other architectures.
GPIO controller's registers are big endian, the
accessors ioread32be/iowrite32be matches this one
and portable on powerpc as well on ARM.
Signed-off-by: Shaveta Leekha <shaveta@freescale.com>
Change-Id: I2d68fbbfb7478f2cdb9ec4e334ad81f82d3bfb89
Reviewed-on: http://git.am.freescale.net:8181/21798
Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com>
Reviewed-by: Zhengxiong Jin <Jason.Jin@freescale.com>
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Correct qspi flash information on ls1021a-qds board.
And remove flash partion in node, it is not useful.
Signed-off-by: Chao Fu <B44548@freescale.com>
Change-Id: I8b2dc47446c5d54ce12e3d7d138fa9d9a3b9ba6c
Reviewed-on: http://git.am.freescale.net:8181/21364
Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com>
Reviewed-by: Li Xiubo <Li.Xiubo@freescale.com>
Reviewed-by: Zhengxiong Jin <Jason.Jin@freescale.com>
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Correct qspi flash information on ls1021a-qds board.
And remove flash partion in node, it is not useful.
Signed-off-by: Chao Fu <B44548@freescale.com>
Change-Id: Ib9b3964127984457032f73be53bbfc847cf438bf
Reviewed-on: http://git.am.freescale.net:8181/21360
Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com>
Reviewed-by: Li Xiubo <Li.Xiubo@freescale.com>
Reviewed-by: Zhengxiong Jin <Jason.Jin@freescale.com>
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The new QSPI driver add DDR read mode,
so add qspi-memory map for QSPI access in DDR mode in dts node.
Modify qspi node compatible for LS1 paltform.
Signed-off-by: Chao Fu <b44548@freescale.com>
Change-Id: Ia92dda63bf857b845767ae62f2c7eb9a84371aa1
Reviewed-on: http://git.am.freescale.net:8181/21356
Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com>
Reviewed-by: Li Xiubo <Li.Xiubo@freescale.com>
Reviewed-by: Zhengxiong Jin <Jason.Jin@freescale.com>
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CAAM.
CAAM's memory is broken into following address blocks:
Block Included Registers
7 QI registers
Size of the above stated block varies in various platforms. The block size can be 4K or 64K.
The block size can be dynamically determined by reading CTPR register in CAAM.
This patch fixes the issues related to the dynamic initialization of the QI block
address based on the value read from this register.
Signed-off-by: Nitesh Narayan Lal <b44382@freescale.com>
Change-Id: I11d6cb2814ee4eb1c966773636bf6bd0ff986811
Reviewed-on: http://git.am.freescale.net:8181/20999
Reviewed-by: Ruchika Gupta <ruchika.gupta@freescale.com>
Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com>
Reviewed-by: Zhengxiong Jin <Jason.Jin@freescale.com>
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Signed-off-by: Jason Jin <Jason.Jin@freescale.com>
Signed-off-by: Jingchang Lu <jingchang.lu@freescale.com>
Change-Id: I3958f741a54691a882323a95b56bc7d8cb1311c4
Reviewed-on: http://git.am.freescale.net:8181/21179
Reviewed-by: Sandeep Malik <Sandeep.Malik@freescale.com>
Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com>
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Signed-off-by: Claudiu Manoil <claudiu.manoil@freescale.com>
Change-Id: Ie34306997587de53d71a44d643989a3808644a4c
Reviewed-on: http://git.am.freescale.net:8181/21178
Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com>
Reviewed-by: Zhengxiong Jin <Jason.Jin@freescale.com>
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With tx snooping enabled the eTSEC Tx DMA stops in mid-traffic
at this point. Remove the Tx snooping support from gianfar for
now.
Signed-off-by: Claudiu Manoil <claudiu.manoil@freescale.com>
Change-Id: I89018d6cd044e86c49c64b5343c6435ab38fcbf2
Reviewed-on: http://git.am.freescale.net:8181/21177
Reviewed-by: Sandeep Malik <Sandeep.Malik@freescale.com>
Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com>
Reviewed-by: Zhengxiong Jin <Jason.Jin@freescale.com>
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Use of_property_read*() to get arch endian consistent
property values. Do some refactoring in the process.
Signed-off-by: Jingchang Lu <jingchang.lu@freescale.com>
Signed-off-by: Claudiu Manoil <claudiu.manoil@freescale.com>
Change-Id: I9ff10b73854a82333cfc830fed4b921a73519806
Reviewed-on: http://git.am.freescale.net:8181/21176
Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com>
Reviewed-by: Zhengxiong Jin <Jason.Jin@freescale.com>
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Use conversion macros to correctly access the BE
fields of the Rx and Tx Frame Control Block on LE CPUs.
Signed-off-by: Claudiu Manoil <claudiu.manoil@freescale.com>
Change-Id: Ieb5b1d44449f6acbfcc39ba2a0d8cd23669b5d4c
Reviewed-on: http://git.am.freescale.net:8181/21175
Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com>
Reviewed-by: Zhengxiong Jin <Jason.Jin@freescale.com>
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Use conversion macros to correctly access the BE
fields of the Rx and Tx Buffer Descriptors on LE CPUs.
Signed-off-by: Claudiu Manoil <claudiu.manoil@freescale.com>
Change-Id: If8674c721fb8a9cec22b6921d08680c6afb531e2
Reviewed-on: http://git.am.freescale.net:8181/21174
Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com>
Reviewed-by: Zhengxiong Jin <Jason.Jin@freescale.com>
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Add PM support for DCU driver using callback function suspend
and resume in .driver.pm of platform_driver.
Signed-off-by: Xiubo Li <Li.Xiubo@freescale.com>
--
The first DRM version will be send out to the community
before 15 Dec 2014.
Change-Id: I959eec05d100f212d5d61faaf114fe99618fae19
Reviewed-on: http://git.am.freescale.net:8181/21572
Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com>
Reviewed-by: Dongsheng Wang <dongsheng.wang@freescale.com>
Reviewed-by: Zhengxiong Jin <Jason.Jin@freescale.com>
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Add PM support for FTM pwm driver using callback function suspend
and resume in .driver.pm of platform_driver.
Signed-off-by: Xiubo Li <Li.Xiubo@freescale.com>
---
upstream link: http://patchwork.ozlabs.org/patch/399748/
it is under discussion.
Change-Id: I0c558dffdb9c40d66e4a55d5ce3e8685fe4f1ecf
Reviewed-on: http://git.am.freescale.net:8181/21350
Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com>
Reviewed-by: Dongsheng Wang <dongsheng.wang@freescale.com>
Reviewed-by: Zhengxiong Jin <Jason.Jin@freescale.com>
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This patch is to prepare for adding PM support for FTM pwm driver
using callback function suspend and resume in .driver.pm of
platform_driver.
Signed-off-by: Xiubo Li <Li.Xiubo@freescale.com>
---
upstream link: http://patchwork.ozlabs.org/patch/399752/
it is under discussion.
Change-Id: I517f27b696b6eeeae880e3bd71b122995194127f
Reviewed-on: http://git.am.freescale.net:8181/21349
Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com>
Reviewed-by: Dongsheng Wang <dongsheng.wang@freescale.com>
Reviewed-by: Zhengxiong Jin <Jason.Jin@freescale.com>
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A given application may not use all the peripherals on the device.
In this case, it may be desirable to disable unused peripherals.
DCFG provides a mechanism for gating clocks to IP blocks that are
not used when running an application.
Signed-off-by: Xiubo Li <Li.Xiubo@freescale.com>
---
This patch has been sent out to the community and under discussion：
URL：http://www.spinics.net/lists/arm-kernel/msg370133.html
Change-Id: Iedf07d12955b3fa011a0bef27236f73405cefb44
Reviewed-on: http://git.am.freescale.net:8181/21604
Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com>
Reviewed-by: Dongsheng Wang <dongsheng.wang@freescale.com>
Reviewed-by: Zhengxiong Jin <Jason.Jin@freescale.com>
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Since the Freescale SAI, ESAI and SPDIF are using the regmap-mmio,
there needs a select of REGMAP_MMIO in the Kconfig to ensure that
regmap-mmio is actually enabled.
Signed-off-by: Xiubo Li <Li.Xiubo@freescale.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
---
This patch is pulled back from upstream with few backport changes:
commit 7d150c60f1a29c62e115e0ee2a5678400e724873
Change-Id: I61f6b089ff036b249976c1081afaa04974caca5e
Reviewed-on: http://git.am.freescale.net:8181/21478
Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com>
Reviewed-by: Chao Fu <B44548@freescale.com>
Reviewed-by: Zhengxiong Jin <Jason.Jin@freescale.com>
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The regmap framework has one feature of register cache, which
will be more easy to add big endian mode and PM support.
Signed-off-by: Xiubo Li <Li.Xiubo@freescale.com>
--
The first DRM version will be send out to the community
before 15 Dec 2014.
Change-Id: I3aa3c30f4ab42b64b80669b483b45a62ae31d6bb
Reviewed-on: http://git.am.freescale.net:8181/21571
Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com>
Reviewed-by: Dongsheng Wang <dongsheng.wang@freescale.com>
Reviewed-by: Zhengxiong Jin <Jason.Jin@freescale.com>
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No matter what times the FTM pwm is enabled, the use_count will
always be one.
Signed-off-by: Xiubo Li <Li.Xiubo@freescale.com>
---
upstream link: http://patchwork.ozlabs.org/patch/399746/
it is under discussion.
Change-Id: I6f139f1b3fd5dd8f3a4fda729c348aaab9bf66bd
Reviewed-on: http://git.am.freescale.net:8181/21348
Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com>
Reviewed-by: Dongsheng Wang <dongsheng.wang@freescale.com>
Reviewed-by: Zhengxiong Jin <Jason.Jin@freescale.com>
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