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path: root/arch/arm/boot/dts/omap5.dtsi
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2013-04-08ARM: dts: OMAP2+: Identify GPIO banks that are always poweredJon Hunter
Add the "ti,gpio-always-on" property to the appropriate GPIO banks to indicate which banks are always powered and will never lose logic state. Signed-off-by: Jon Hunter <jon-hunter@ti.com> Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
2013-04-08ARM: dts: OMAP2+: Update DMTIMER compatibility propertyJon Hunter
Update the DMTIMER compatibility property to reflect the register level compatibilty between devices and update the various OMAP/AM timer bindings with the appropriate compatibility string. By doing this we can add platform specific data applicable to specific timer versions to the driver. For example, errata flags can be populated for the timer versions that are impacted. Signed-off-by: Jon Hunter <jon-hunter@ti.com> Acked-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
2013-04-08ARM: dts: OMAP5: Add watchdog timer nodeLokesh Vutla
Add watchdog timer DT node for OMAP5 devices. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
2013-04-08ARM: dts: OMAP4/5: Update l3-noc DT nodesSantosh Shilimkar
Add l3-noc node for OMAP4 and OMAP5 devices. Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com> [jon-hunter@ti.com: Fix the problem caused by adding 32 to the interrupt number for the L3 interrupts to account for per processor interrupts (PPI) and software generated interrupts (SGI) which typically are mapped to the first 32 interrupts in the ARM GIC. This is not necessary because the first parameter of the ARM GIC interrupt property specifies the GIC interrupt type (ie. SGI, PPI, etc). Hence, fix the interrupt number for the L3 interrupts by substracting 32] Signed-off-by: Jon Hunter <jon-hunter@ti.com> Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
2013-04-08ARM: dts: OMAP5: Update keypad reg propertySantosh Shilimkar
Add missing OMAP keypad reg property information. Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
2013-04-08ARM: dts: OMAP5: Update the timer and GIC nodes for HYP kernel supportSantosh Shilimkar
To be able to run kernel in HYP mode, virtual timer and GIC node information needs to be populated. Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
2013-04-08ARM: dts: OMAP5: Move the gic node out of ocp spaceSantosh Shilimkar
GIC is not part of OCP space so move the gic DT node out of ocp DT address space. Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
2013-04-08ARM: dts: OMAP5: Specify nonsecure PPI IRQ for arch timerRajendra Nayak
Specify both secure as well as nonsecure PPI IRQ for arch timer. This fixes the following errors seen on DT OMAP5 boot.. [ 0.000000] arch_timer: No interrupt available, giving up Signed-off-by: Rajendra Nayak <rnayak@ti.com> Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
2013-04-08ARM: dts: OMAP5: Align the local timer dt node as per the current binding codeSantosh Shilimkar
It has been decided to not duplicate banked modules dt nodes and that is how the current arch timer dt extraction code is. Update the OMAP5 DT file accordingly. Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
2013-04-08ARM: dts: OMAP2+: Add SDMA Audio IPs bindingsSebastien Guiriec
Populate DMA client information for McBSP DMIC and McPDM periperhal on OMAP2+ devices. Signed-off-by: Sebastien Guiriec <s-guiriec@ti.com> Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
2013-04-08ARM: dts: OMAP3+: Correct gpio #interrupts-cells propertyJon Hunter
The OMAP gpio binding documention [1] states that the #interrupts-cells property for gpio controllers should be 2. Currently, for OMAP3+ devices the #interrupt-cells is set to 1. By setting this property to 2, it allows clients to pass a 2nd parameter indicating the sensitivity (level or edge) and polarity (high or low) of the interrupt. The OMAP gpio controllers support these options and so update the #interrupt-cells property for OMAP3+ devices to 2. [1] Documentation/devicetree/bindings/gpio/gpio-omap.txt Signed-off-by: Jon Hunter <jon-hunter@ti.com> Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
2013-04-08ARM: dts: Add GPMC node for OMAP2, OMAP4 and OMAP5Jon Hunter
Add the device-tree node for GPMC on OMAP2, OMAP4 and OMAP5 devices. Signed-off-by: Jon Hunter <jon-hunter@ti.com> Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
2013-04-08ARM: dts: OMAP2+: Add SDMA controller bindings and nodesJon Hunter
Add SDMA controller binding for OMAP2+ devices and populate DMA client information for SPI and MMC peripheral on OMAP3+ devices. Please note that OMAP24xx devices do not have SPI and MMC bindings available yet and so DMA client information is not populated. Signed-off-by: Jon Hunter <jon-hunter@ti.com> Reviewed-by: Felipe Balbi <balbi@ti.com> Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Tested-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
2013-04-08ARM: dts: OMAP5: add dwc3 omap and dwc3 core dataKishon Vijay Abraham I
Add dwc3 omap glue data to the omap5 dt data file. The information about the dt node added here is available @ Documentation/devicetree/bindings/usb/omap-usb.txt. Also added dwc3 core dt data as a subnode to dwc3 omap glue data in omap5 dt data file. The information for the entered data node is available @ Documentation/devicetree/bindings/usb/dwc3.txt Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
2013-04-08ARM: dts: OMAP5: Add omap-usb3 and omap-usb2 dataKishon Vijay Abraham I
Add omap-usb3 and omap-usb2 data node in OMAP5 device tree file. The information for the node added here is available @ Documentation/devicetree/bindings/usb/usb-phy.txt Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
2013-04-08ARM: dts: OMAP5: Add ocp2scp dataKishon Vijay Abraham I
Add ocp2scp data node in omap5 device tree file. The information for the node added here can be found @ Documentation/devicetree/bindings/bus/omap-ocp2scp.txt Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
2013-04-08ARM: dts: OMAP5: Add OMAP control usb dataKishon Vijay Abraham I
Add omap control usb data in OMAP5 device tree file. This will have the register address of registers to power on the USB2 PHY and USB3 PHY. The information for the node added here is available in Documentation/devicetree/bindings/usb/omap-usb.txt Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
2013-04-08ARM: dts: OMAP5: Add SPI nodesFelipe Balbi
Add all 4 mcspi instances to omap5.dtsi file. Signed-off-by: Felipe Balbi <balbi@ti.com> Signed-off-by: Sourav Poddar <sourav.poddar@ti.com> [benoit.cousson@linaro.org: Update the subject] Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
2012-11-05ARM: dts: omap5: EMIF device tree data for OMAP5 boardsLokesh Vutla
Adding EMIF device tree data for OMAP5 boards. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Signed-off-by: Benoit Cousson <b-cousson@ti.com>
2012-11-01ARM: dts: OMAP5: Add counter nodeJon Hunter
Add the 32kHz counter node for OMAP5 devices. Signed-off-by: Jon Hunter <jon-hunter@ti.com> Signed-off-by: Benoit Cousson <b-cousson@ti.com>
2012-11-01ARM: dts: OMAP5: Add timer nodesJon Hunter
Add the 11 timer nodes for OMAP5 devices. Signed-off-by: Jon Hunter <jon-hunter@ti.com> Signed-off-by: Benoit Cousson <b-cousson@ti.com>
2012-10-29ARM: dts: omap5: Update MMC with address space and interruptsSebastien Guiriec
Add base address and interrupt line inside Device Tree data for OMAP5. Signed-off-by: Sebastien Guiriec <s-guiriec@ti.com> Signed-off-by: Benoit Cousson <b-cousson@ti.com>
2012-10-29ARM: dts: omap5: Update UART with address space and interruptsSebastien Guiriec
Add base address and interrupt line inside Device Tree data for OMAP5. Fix as well the wrong compatible string on UART5 & 6. Signed-off-by: Sebastien Guiriec <s-guiriec@ti.com> Reviewed-by: Shubhrajyoti D <shubhrajyoti@ti.com> [b-cousson@ti.com: Update the changelog to reflect the fixes done in the patch] Signed-off-by: Benoit Cousson <b-cousson@ti.com>
2012-10-29ARM: dts: omap5: Update I2C with address space and interruptsSebastien Guiriec
Add base address and interrupt line inside Device Tree data for OMAP5 Signed-off-by: Sebastien Guiriec <s-guiriec@ti.com> Reviewed-by: Shubhrajyoti D <shubhrajyoti@ti.com> Signed-off-by: Benoit Cousson <b-cousson@ti.com>
2012-10-29ARM: dts: omap5: Update GPIO with address space and interruptsSebastien Guiriec
Add base address and interrupt line inside Device Tree data for OMAP5. Signed-off-by: Sebastien Guiriec <s-guiriec@ti.com> Signed-off-by: Benoit Cousson <b-cousson@ti.com>
2012-10-29ARM: dts: OMAP: Move interrupt-parent to the root node to avoid duplicationBenoit Cousson
The interrupt-parent attribute does not have to be added in each node since the fmwk will check for the parent as well to get it. Create an interrupt-parent for OMAP2, OMAP3, AM33xx and remove the attributes from every nodes that were using it. Signed-off-by: Benoit Cousson <b-cousson@ti.com> Cc: Vaibhav Hiremath <hvaibhav@ti.com> Cc: Peter Ujfalusi <peter.ujfalusi@ti.com> Cc: Sebastien Guiriec <s-guiriec@ti.com>
2012-10-08ARM/dts: Add pinctrl driver entries for omap5Peter Ujfalusi
These all use the generic pinctrl-single driver for the padconf registers. Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2012-09-21Merge branch 'for_3.7/omap5_arch_timer' of ↵Tony Lindgren
git://github.com/SantoshShilimkar/linux into devel-dt-arch-timer Conflicts: arch/arm/mach-omap2/timer.c
2012-09-19ARM: OMAP5: Enable arch timer supportSantosh Shilimkar
Enable Cortex A15 generic timer support for OMAP5 based SOCs. The CPU local timers run on the free running real time counter clock. Acked-by: Benoit Cousson <b-cousson@ti.com> Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
2012-09-07ARM: dts: omap5: Add McPDM and DMIC section to the dtsi filePeter Ujfalusi
To be able to load the McPDM and DMIC driver when booted with device tree. Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com> Signed-off-by: Benoit Cousson <b-cousson@ti.com>
2012-09-07ARM: dts: omap5: Add McBSP entriesPeter Ujfalusi
Create the sections describing the McBSP ports to be able to use them via DT. Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com> Signed-off-by: Benoit Cousson <b-cousson@ti.com>
2012-09-07ARM: dts: omap5-evm: Add keypad dataSourav Poddar
Add keypad data node in omap5 device tree file. Also fill the device tree binding parameters with the required value in "omap5-evm" dts file. Signed-off-by: Sourav Poddar <sourav.poddar@ti.com> Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Acked-by: Felipe Balbi <balbi@ti.com> [b-cousson@ti.com: Fix merge issue with MMC patches, put node at the proper place, align entries and comments] Signed-off-by: Benoit Cousson <b-cousson@ti.com>
2012-09-07ARM: dts: omap5-evm: Add I2C supportSourav Poddar
Add I2C data nodes in omap5 device tree file. Signed-off-by: Sourav Poddar <sourav.poddar@ti.com> Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Acked-by: Felipe Balbi <balbi@ti.com> Signed-off-by: Benoit Cousson <b-cousson@ti.com>
2012-08-24arm/dts: omap5: Add mmc controller nodes and board dataBalaji T K
Add OMAP MMC related device tree data for OMAP5. Signed-off-by: Balaji T K <balajitk@ti.com> Acked-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Tony Lindgren <tony@atomide.com>
2012-07-09arm/dts: OMAP5: Add omap5 dts filesR Sricharan
Adding the minimum device tree files required for OMAP5 to boot. Reviewed-by: Benoit Cousson <b-cousson@ti.com> Signed-off-by: R Sricharan <r.sricharan@ti.com> Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>