Age | Commit message (Collapse) | Author | |
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2010-07-09 | ARM: 6185/1: AT91: PM: dual ram controller support | Nicolas Ferre | |
This rework allows to address tow memory controllers. AT91SAM9263 and AT91SAM9G45 family have tow SDRAM or DDR/SDRAM controllers. Power management should take care of this. This patch modify the way RAM IP header files are implemented to allow access to registers of both controllers ; it also adds some macros. We also modify the power management files to use those modified header files. Slow clock (assembly) and regular power management functions are synchronized for setting of RAM self-refresh procedure: (lpr & ~AT91_DDRSDRC_LPCB) | AT91_DDRSDRC_LPCB_SELF_REFRESH Note that AT91RM9200 is not impacted by this modification. Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com> Acked-by: Andrew Victor <linux@maxim.org.za> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> | |||
2009-11-10 | ARM: 5778/1: AT91: Add cpuidle support | Albin Tonnerre | |
This patch adds the support for cpuidle on AT91 SoCs, taken from the cpuidle support in mach-kirkwood. cpuidle needs sdram_selfrefresh_enable and _disable, so move their definition to a separate header file instead of duplicating the code already used in pm.c. Tested-by: Nicolas Ferre <nicolas.ferre@atmel.com> Signed-off-by: Albin Tonnerre <albin.tonnerre@free-electrons.com> Acked-by: Andrew Victor <linux@maxim.org.za> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> |