| Age | Commit message (Collapse) | Author |
|---|
|
There is a possible race condition in clockdomain
code handling hw supported idle transitions.
When multiple autodeps dependencies are being added
or removed, a transition of still remaining dependent
powerdomain can result in false readings of the
state counter. This is especially fatal for off mode
state counter, as it could result in a driver not
noticing a context loss.
Fixed by disabling hw supported state transitions
when autodeps are being changed.
Signed-off-by: Kalle Jokiniemi <kalle.jokiniemi@digia.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
|
|
Add some infrastructure to easily iterate over clock and power
domains.
Signed-off-by: Peter 'p2' De Schrijver <peter.de-schrijver@nokia.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
|
|
This patch modifies the clock, clockdomain and OMAP3 specific
powerdomain code to call the PM counter infrastructure whenever one or
more powerdomains might have changed state.
Signed-off-by: Peter 'p2' De Schrijver <peter.de-schrijver@nokia.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
|
|
This patch provides the infrastructure to count how many times a
powerdomain entered a given power state (on, inactive, retention,
off). A number of functions are provided which will be called by the
chip specific powerdomain and clockdomain code whenever a transition
might have happened.
Signed-off-by: Peter 'p2' De Schrijver <peter.de-schrijver@nokia.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
|
|
Use pr_err() for errors rather than pr_debug(). pr_debug() are
compiled away unless -DDEBUG is used.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
|
|
Fix the clockdomain autodep code to respect omap_chip platform flags.
Resolves "Unable to handle kernel paging request at virtual address
5f75706d" panic during power management initialization on OMAP2.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
|
|
Enabling clock in a disabled power domain causes the power domain to be
turned on. However, the power transition is not always finished when
clk_enable() returns and this randomly crashes the kernel when an
interrupt happens right after the clk_enable, and the kernel tries to
read the irq status register for that domain.
Why the irq status register is inaccessible, I don't know. Also it
doesn't seem to be related to the module being not powered up, but to
the transition itself.
The same could perhaps happen after clk_disable also, but I have not
witnessed that.
The problem affects at least dss, cam and sgx clocks.
This change waits for the transition to be finished before returning
from omap2_clkdm_clk_enable().
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@nokia.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
|
|
clockdomain
struct clockdomain contains a struct powerdomain *pwrdm and const char
*pwrdm_name. The pwrdm_name is only used at initialization to look up
the appropriate pwrdm pointer. Combining these into a union saves
about 100 bytes on 3430SDP. This patch should not cause any change in
kernel function.
Updated to gracefully handle autodeps that contain invalid powerdomains,
per Russell King's review comments.
Boot-tested on BeagleBoard ES2.1.
linux-omap source commit is 718fc6cd4db902aa2242a736cc3feb8744a4c71a.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
|
|
Add clkdm_get_pwrdm() to the clockdomain code. It will return a
pointer to the powerdomain struct that the clockdomain is contained
within. Used by the PM code.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
|
|
Thie patch adds code to the powerdomain layer to track the
clockdomains associated with each powerdomain.
It also modifies the clockdomain code to register clockdomains
with their corresponding powerdomain when the clockdomain is registered.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
|
|
This patch creates an interface to the clockdomain registers in the
PRM/CM modules on OMAP2/3. This interface is intended to be used by
PM code, e.g., pm.c; not by device drivers directly.
The patch also adds clockdomain usecount tracking. This is intended
to be called whenever the first clock in a clockdomain is enabled, or
when the last enabled clock in a clockdomain is disabled. If the
clockdomain is in software-supervised mode, the code will force-wakeup
or force-sleep the clockdomain. If the clockdomain is in
hardware-supervised mode, the first clock enable will add sleep and
wakeup dependencies on a user-selectable set of parent domains (usually
MPU & IVA2), and the disable will remove them.
Each clockdomain will be defined in later patches as static
structures. The clockdomain structures are linked into a list at boot
by clkdm_register(), similar to the OMAP clock code.
The patch adds a Kconfig option, CONFIG_OMAP_DEBUG_CLOCKDOMAIN, which
when enabled will emit verbose debug messages via pr_debug().
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
|
