Age | Commit message (Collapse) | Author |
|
The name of the define for the Reset-Out-Mask register as well as its
bit for the watchdog reset are changed to match the names used for
Kirkwood (which in turn match the processor specification more
closely). There is no functional change.
This patch prepares for adding orion5x_wdt as a platform device to
Kirkwood.
Signed-off-by: Thomas Reitmayr <treitmayr@devbase.at>
Signed-off-by: Nicolas Pitre <nico@marvell.com>
|
|
Symbols like SOFT_RESET are way too generic to be exported at large.
To avoid this, let's move the mbus bridge register defines into a
separate file and include it where needed. This affects mach-kirkwood,
mach-loki, mach-mv78xx0 and mach-orion5x simultaneously as they all
share code in plat-orion which relies on those defines.
Some other defines have been moved to narrower scopes, or simply deleted
when they had no user.
This fixes compilation problem with mpt2sas on the above listed
platforms.
Signed-off-by: Nicolas Pitre <nico@marvell.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
|
|
Currently, there are two different fields in the
mv643xx_eth_platform_data struct that together describe the PHY
address -- one field (phy_addr) has the address of the PHY, but if
that address is zero, a second field (force_phy_addr) needs to be
set to distinguish the actual address zero from a zero due to not
having filled in the PHY address explicitly (which should mean
'use the default PHY address').
If we are a bit smarter about the encoding of the phy_addr field,
we can avoid the need for a second field -- this patch does that.
Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
|
|
Signed-off-by: Saeed Bishara <saeed@marvell.com>
Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
|
|
This just leaves include/asm-arm/plat-* to deal with.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
|
|
This patch adds support for the Maxtor Shared Storage II hardware.
Signed-off-by: Sylver Bruneau <sylver.bruneau@googlemail.com>
Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
|