Age | Commit message (Collapse) | Author | |
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2013-01-22 | ARM: PRIMA2: initialize l2x0 according to mach from DT | Barry Song | |
prima2 and marco have diffetent l2 cache configuration, so we initialize l2x0 cache based on dtb given to kernel. Signed-off-by: Barry Song <Baohua.Song@csr.com> Reviewed-by: Mark Rutland <mark.rutland@arm.com> | |||
2011-10-24 | ARM: CSR: call l2x0_of_init to init L2 cache of SiRFprimaII | Barry Song | |
Cc: Rob Herring <robherring2@gmail.com> Signed-off-by: Barry Song <Baohua.Song@csr.com> | |||
2011-07-08 | ARM: CSR: initializing L2 cache | Rongjun Ying | |
Signed-off-by: Rongjun Ying <rongjun.ying@csr.com> Signed-off-by: Barry Song <baohua.song@csr.com> Reviewed-by: Arnd Bergmann <arnd@arndb.de> |