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path: root/arch/microblaze/kernel/entry.S
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2013-02-03microblaze: Move restart allowed out of blockMichal Simek
Better not to break block which do work together. Signed-off-by: Michal Simek <monstr@monstr.eu> Signed-off-by: Al Viro <viro@zeniv.linux.org.uk>
2013-02-03microblaze: fix handling of multiple pending signalsAl Viro
We need to keep building sigframes until no pending signals remain. Wrap do_notify_resume() calls into loops; do _not_ allow syscall restart logics to trigger after the first iteration. Incidentally, comments about pending signals that should (somehow) be in r18 are pure BS. Doesn't work that way and cannot work that way, sorry... Signed-off-by: Al Viro <viro@zeniv.linux.org.uk>
2013-02-03microblaze: fix the horror with restarts of sigreturn()Al Viro
solution a-la arm one - pick a callee-saved register (r30), set it non-zero when entering a syscall, have sigreturn wrapper zero it out and pass the value in it to do_notify_resume() as "in_syscall" (actually, "restarts allowed") argument. Note that we don't give a damn about ret_from_fork() - return value is not restart-worthy anyway. Possible remaining bug: on !MMU we still have _debug_exception() restartable. If it hits with -ERESTART_... accidentally in r3, fun happens. MMU does _not_ have _debug_exception() restartable. If that's decided to be a bug (as I strongly suspect it to be), we'll just need to replace setting r30 to 1 with setting r30 to 0 in !MMU _debug_exception(). Up to microblaze maintainers... [folded a fix from Michal] Signed-off-by: Al Viro <viro@zeniv.linux.org.uk>
2012-11-29microblaze: switch to generic fork/vfork/cloneAl Viro
Signed-off-by: Al Viro <viro@zeniv.linux.org.uk> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2012-11-16microblaze: switch to generic sys_execve()Al Viro
Signed-off-by: Al Viro <viro@zeniv.linux.org.uk>
2012-11-16microblaze: switch to generic kernel_execve()Al Viro
Signed-off-by: Al Viro <viro@zeniv.linux.org.uk> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2012-11-16microblaze: switch to generic kernel_thread()Al Viro
Signed-off-by: Al Viro <viro@zeniv.linux.org.uk> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2012-11-15microblaze: Fix bug with schedule_tailMichal Simek
Signed-off-by: Michal Simek <monstr@monstr.eu>
2012-05-28Merge branch 'next' of git://git.monstr.eu/linux-2.6-microblazeLinus Torvalds
Pull microblaze changes from Michal Simek. * 'next' of git://git.monstr.eu/linux-2.6-microblaze: microblaze: Setup correct pointer to TLS area microblaze: Add TLS support to sys_clone microblaze: ftrace: Pass the first calling instruction for dynamic ftrace microblaze: Port OOM changes to do_page_fault microblaze: Do not select GENERIC_GPIO by default
2012-05-25microblaze: Add TLS support to sys_cloneEdgar E. Iglesias
Formerly unused Args 4/5 now load parent tid / child tid so the brid to do_fork can pick up TLS from r10. Arg 3 still unused There is also necessary to fix old glibc which do not setup r9/r10 (arg 4/5). Simple clearing them is fine. Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com> Signed-off-by: David Holsgrove <david.holsgrove@petalogix.com> Signed-off-by: Michal Simek <monstr@monstr.eu>
2012-05-22microblaze: drop 'oldset' argument of do_notify_resume()Al Viro
never used... Signed-off-by: Al Viro <viro@zeniv.linux.org.uk>
2012-05-22microblaze: handle TIF_NOTIFY_RESUMEAl Viro
Signed-off-by: Al Viro <viro@zeniv.linux.org.uk>
2012-01-05microblaze: Trivial asm fixMichal Simek
Just replace one dot with comma. New binutils can detect it. Signed-off-by: Michal Simek <monstr@monstr.eu>
2011-03-15microblaze: Do not copy reset vectors/manual reset vector setupMichal Simek
Reset vector can be setup by bootloader and kernel doens't need to touch it. If you require to setup reset vector, please use CONFIG_MANUAL_RESET_VECTOR throught menuconfig. It is not possible to setup address 0x0 as reset address because make no sense to set it up at all. Signed-off-by: Michal Simek <monstr@monstr.eu> Signed-off-by: John Williams <john.williams@petalogix.com>
2011-03-15microblaze: Fix _reset functionMichal Simek
If soft reset falls through with no hardware assisted reset, the best we can do is jump to the reset vector and see what the bootloader left for us. Signed-off-by: Michal Simek <monstr@monstr.eu> Signed-off-by: John Williams <john.williams@petalogix.com>
2011-03-15microblaze: Fix microblaze init vectorsMichal Simek
Microblaze vector table stores several vectors (reset, user exception, interrupt, debug exception and hardware exception). All these functions can be below address 0x10000. If they are, wrong vector table is genarated because jump is not setup from two instructions (imm upper 16bit and brai lower 16bit). Adding specific offset prevent problem if address is below 0x10000. For this case only brai instruction is used. Signed-off-by: Michal Simek <monstr@monstr.eu>
2011-03-09microblaze: Do not use "la" pseudo instruction - use addik insteadMichal Simek
"la" pseudo instruction is only translation to "addik". Use directly "addik" which is described in the MB reference guide. Signed-off-by: Michal Simek <monstr@monstr.eu>
2011-03-09microblaze: Remove r0_ram pointer and PTO alignmentMichal Simek
r0_ram pool was used for saving/restoring register content if hw exception happen. This poll was replaced by pt_pool_space with PT_SIZE size. Based on this change SAVE_STATE_ARG_SPACE was removed which caused that PTO offset is zero that's why is also removed. r0_ram space was used as scratchpad by v850. In early Microblaze Linux developing phase was this part of code blindly copied. Signed-off-by: Michal Simek <monstr@monstr.eu>
2011-03-09microblaze: Do not use r0_ram space for syscall debuggingMichal Simek
Remove syscall counting space from r0_ram. Use special syscall_debug_table pool for syscall statistic. Signed-off-by: Michal Simek <monstr@monstr.eu>
2010-11-18Revert "microblaze: Simplify syscall rutine"Michal Simek
This reverts commit 0e41c90908881a1b8205c66a66becec7d8d4eb4a. Break jffs2 rootfs because the patch removes syscall calling from kernel space. Signed-off-by: Michal Simek <monstr@monstr.eu>
2010-10-21microblaze: Fix r16 and r17 reg savingMichal Simek
r16 and r17 should be saved across interrupt and exception handling. Signed-off-by: Michal Simek <monstr@monstr.eu>
2010-10-21microblaze: Clear return value in pt_regsMichal Simek
Signal code uses r3 value which saved in restore_sigcontext to rt_sigframe but it require to be zeroed. If is not zero rt_sigframe contains wrong values. Signed-off-by: Michal Simek <monstr@monstr.eu>
2010-10-21microblaze: Fix sys_rt_sigreturn_wrapperMichal Simek
Do not save return registers before rt_sigreturn is called. _user_exception(syscall handler) already setup return address that's why it is removed from rt_sigreturn_wrapper. Signed-off-by: Michal Simek <monstr@monstr.eu>
2010-08-04microblaze: Add KGDB supportMichal Simek
Kgdb uses brki r16, 0x18 instruction to call low level _debug_exception function which save current state to pt_regs and call microblaze_kgdb_break function. _debug_exception should be called only from the kernel space. User space calling is not supported because user application debugging uses different handling. pt_regs_to_gdb_regs loads additional special registers which can't be changed * Enable KGDB in Kconfig * Remove ancient not-tested KGDB support * Remove ancient _debug_exception code from entry.S Only MMU KGDB support is supported. Signed-off-by: Michal Simek <monstr@monstr.eu> CC: Jason Wessel <jason.wessel@windriver.com> CC: John Williams <john.williams@petalogix.com> CC: Edgar E. Iglesias <edgar.iglesias@petalogix.com> CC: linux-kernel@vger.kernel.org Acked-by: Jason Wessel <jason.wessel@windriver.com>
2010-08-04microblaze: Support brki rX, 0x18 for user application debuggingMichal Simek
This is the first patch which add support for user application debugging through brki rX, 0x18 vector. This patch has side effect which also remove security issue to use brki rX, 0x18 to freeze kernel. Support for old gdb support via priviledged exception (brk r0, r0) is still there. It will be remove in future. Signed-off-by: Michal Simek <monstr@monstr.eu>
2010-08-04microblaze: Remove nop after MSRCLR/SET, MTS, MFS instructionsMichal Simek
We need to save instruction and the latest Microblaze shouldn't have any problem with it. Signed-off-by: Michal Simek <monstr@monstr.eu>
2010-08-04microblaze: Simplify syscall rutineMichal Simek
Syscall can be called only from userspace that's why we don't need to check which space kernel come from. Kernel syscall calling is not check and shouldn't come throught this part of code. Signed-off-by: Michal Simek <monstr@monstr.eu>
2010-08-04microblaze: Move PT_MODE saving to delay slotMichal Simek
We can save one more instruction if PT_MODE is saved in delay slot Signed-off-by: Michal Simek <monstr@monstr.eu>
2010-08-04microblaze: Fix _interrupt functionMichal Simek
Save instructions by using delay slot and clear UMS only if kernel comes from user space. Signed-off-by: Michal Simek <monstr@monstr.eu>
2010-08-04microblaze: Fix _user_exception functionMichal Simek
Saving some instructions. Clear VMS bit if kernel comes from kernel space. Signed-off-by: Michal Simek <monstr@monstr.eu>
2010-08-04microblaze: Put together addik instructionsMichal Simek
Saving instructions by adding 2/3 addik instructions to one. Signed-off-by: Michal Simek <monstr@monstr.eu>
2010-08-04microblaze: Use delay slot in syscall macrosMichal Simek
Saving instruction with delay slot usage. Signed-off-by: Michal Simek <monstr@monstr.eu>
2010-08-04microblaze: Save kernel mode in delay slotMichal Simek
This change save one instruction if kernel comes from kernel space. Signed-off-by: Michal Simek <monstr@monstr.eu>
2010-08-04microblaze: Do not mix register saving and mode settingMichal Simek
Separate reg saving and mode setting. Signed-off-by: Michal Simek <monstr@monstr.eu>
2010-08-04microblaze: Move SAVE_STATE upwardMichal Simek
SAVE_STATE macro could be used by other rutines too. Signed-off-by: Michal Simek <monstr@monstr.eu>
2010-08-04microblaze: entry.S: Macro optimizationMichal Simek
We are not working with values from MSR that's why we can discard it and use r11 for different purpose without saving/restoring. Signed-off-by: Michal Simek <monstr@monstr.eu>
2010-08-04microblaze: Optimize hw exception rutineMichal Simek
Remove set_vms because UMS is cleared and VMS is already setup. Optimize function calling which save one additional instruction. Signed-off-by: Michal Simek <monstr@monstr.eu>
2010-08-04microblaze: Implement clear_ums macro and fix SAVE_STATE macroMichal Simek
VMS is always setup because VM mode was before exception/syscall/interrupt. Kernel continues in kernel mode that's why we have to clear UMS bit if kernel comes from user space. Signed-off-by: Michal Simek <monstr@monstr.eu>
2010-08-04microblaze: Remove additional setup for kernel_modeMichal Simek
PT_MODE stores information if kernel comes from user or kernel space. If come from user space, PT_MODE contains 0. If come from kernel store, PT_MODE contains non zero value. We don't need to save value 1. I am using r1 register which contains non zero value. This change save one additional instruction. Signed-off-by: Michal Simek <monstr@monstr.eu>
2010-08-04microblaze: Optimize SAVE_STATE macroMichal Simek
SAVE_STATE macro could be used for user_exception or interrupt functions. Signed-off-by: Michal Simek <monstr@monstr.eu>
2010-08-04microblaze: Remove additional loadingMichal Simek
We don't need to save r0 to PT_R0. It could be additional operation. Signed-off-by: Michal Simek <monstr@monstr.eu>
2010-08-04microblaze: Completely remove working with R11 registerMichal Simek
We don't need to save R11 register. There is easy way to use only R1 which is saved and restore later. Signed-off-by: Michal Simek <monstr@monstr.eu>
2010-08-04microblaze: Do not setup BIP in _debug_exceptionMichal Simek
BIP is already setup. Signed-off-by: Michal Simek <monstr@monstr.eu>
2010-08-04microblaze: Simplify _debug_exception functionMichal Simek
Keep together all arguments for send_sig function. Move returning address to delay slot which is executed. Remove additional send_sig loading. I am using IMM part of rtbd instruction with r0. old solution: addik r11, r0, send_sig rtbd r11, 0 nop new solution: rtbd r0, send_sig nop There is one instruction saving. Signed-off-by: Michal Simek <monstr@monstr.eu>
2010-08-04microblaze: Optimize SAVE_STATE macroMichal Simek
It is necessary to setup BIP and EE and clear EIP only for unaligned exception handler. The rest of hw exception handlers don't require it. HW exception occured and we are not in virtual mode. That's why we can do operations protected by EIP. Interrupt, next hw exception or syscall can't occur. EIP is cleared by rted. This change speedup page_fault hw exception handler which is critical path. There is also necessary to save R11 content before flag setup for unaligned exception. Signed-off-by: Michal Simek <monstr@monstr.eu>
2010-08-04microblaze: trivial: Use la insted of addikMichal Simek
la is translated to addik by toolchain. Signed-off-by: Michal Simek <monstr@monstr.eu>
2010-08-04microblaze: remove enable_irq from SAVE_STATE macroMichal Simek
SAVE_STATE macro is used in hw exceptions high level handling functions. Hw exception doesn't disable IRQ that's why we don't need to reenable it. Signed-off-by: Michal Simek <monstr@monstr.eu>
2010-08-04microblaze: Move stack backup to SAVE_STATE macroMichal Simek
Remove code duplicity and move it to SAVE_STATE macro. There is no impact on performance. Signed-off-by: Michal Simek <monstr@monstr.eu>
2010-08-04microblaze: Move BIP setup to the end of ret_from_trap/ret_from_excMichal Simek
We don't need to protect by BIP whole ret_from_trap/ret_from_exc code. Only restoring from user/hw exception should be covered. If BIP is setup, IRQ can't occur. Signed-off-by: Michal Simek <monstr@monstr.eu>
2010-08-04microblaze: Remove PER_CPU(KM) variableMichal Simek
There is a way howto remove Kernel Mode variable. It is easier to parse UMS bit in MSR to find out if I come from kernel or user space. Loading MSR content should be in one cycle and loading PER_CPU variable depends on memory state. Signed-off-by: Michal Simek <monstr@monstr.eu>
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