summaryrefslogtreecommitdiff
path: root/arch/mips/oprofile
AgeCommit message (Collapse)Author
2013-02-21Merge branch 'mips-next-3.9' of ↵Ralf Baechle
git://git.linux-mips.org/pub/scm/john/linux-john into mips-for-linux-next
2013-02-16MIPS: Add support for the M14KEc core.Steven J. Hill
Signed-off-by: Steven J. Hill <sjhill@mips.com> Patchwork: http://patchwork.linux-mips.org/patch/4682/ Signed-off-by: John Crispin <blogic@openwrt.org>
2013-02-01MIPS: Whitespace cleanup.Ralf Baechle
Having received another series of whitespace patches I decided to do this once and for all rather than dealing with this kind of patches trickling in forever. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-12-13Merge branch 'mips-next' of http://dev.phrozen.org/githttp/mips-next into ↵Ralf Baechle
mips-for-linux-next
2012-12-13MIPS: PMC-Sierra Yosemite: Remove support.Ralf Baechle
Nobody seems to be interested anymore and upstream also never had an ethernet driver. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-11-09MIPS: oprofile: Support for XLR/XLS processorsMadhusudan Bhat
Add support for XLR and XLS processors in MIPS Oprofile code. These processors are multi-threaded and have two counters per core. Each counter can track either all the events in the core (global mode), or events in just one thread. We use the counters in the global mode, and use only the first thread in each core to handle the configuration etc. Signed-off-by: Madhusudan Bhat <mbhat@netlogicmicro.com> Signed-off-by: Jayachandran C <jchandra@broadcom.com> Patchwork: http://patchwork.linux-mips.org/patch/4471 Signed-off-by: John Crispin <blogic@openwrt.org>
2012-07-25Merge branches 'next/generic', 'next/alchemy', 'next/bcm63xx', ↵Ralf Baechle
'next/cavium', 'next/jz4740', 'next/lantiq', 'next/loongson1b' and 'next/netlogic' into mips-for-linux-next
2012-07-23MIPS: Add CPU support for Loongson1BKelvin Cheung
Loongson 1B is a 32-bit SoC designed by Institute of Computing Technology (ICT) and the Chinese Academy of Sciences (CAS), which implements the MIPS32 release 2 instruction set. [ralf@linux-mips.org: But which is not strictly a MIPS32 compliant device which also is why it identifies itself with the Legacy Vendor ID in the PrID register. When applying the patch I shoveled some code around to keep things in alphabetical order and avoid forward declarations.] Signed-off-by: Kelvin Cheung <keguang.zhang@gmail.com> Cc: To: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Cc: wuzhangjin@gmail.com Cc: zhzhl555@gmail.com Cc: Kelvin Cheung <keguang.zhang@gmail.com> Patchwork: https://patchwork.linux-mips.org/patch/3976/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-07-23MIPS: Remove dead code related to 1004K oprofile support.Steven J. Hill
Signed-off-by: Steven J. Hill <sjhill@mips.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/3854/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-07-06MIPS: Add support for the M14Kc core.Steven J. Hill
[ralf@linux-mips.org: Fixed whitespace damage.] Signed-off-by: Steven J. Hill <sjhill@mips.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/3773/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-05-26Merge branches 'fixes-for-linus', 'generic', 'cavium', 'module.h-fixes', ↵Ralf Baechle
'next/ath79' and 'next/lantiq' into mips-for-linux-next
2012-05-21MIPS: Remove all -Wall and almost all -Werror usage from arch/mips.Ralf Baechle
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-05-15MIPS: make oprofile use cp0_perfcount_irq if it is setFelix Fietkau
Make the oprofile code use the performance counters irq. Signed-off-by: Felix Fietkau <nbd@openwrt.org> Signed-off-by: John Crispin <blogic@openwrt.org> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/3723/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2011-06-15MIPS: oprofile: Add callgraph supportDaniel Kalmar
Stack unwinding is done by code examination. For kernelspace, the already existing unwind function is utilized that uses kallsyms to quickly find the beginning of functions. For userspace a new function was added that examines code at and before the pc. Signed-off-by: Daniel Kalmar <kalmard@homejinni.com> Signed-off-by: Gergely Kis <gergely@homejinni.com> Signed-off-by: Robert Richter <robert.richter@amd.com>
2011-03-17mips: change to new flag variablematt mooney
Replace EXTRA_CFLAGS with ccflags-y. Signed-off-by: matt mooney <mfm@muteddisk.com> Acked-by: WANG Cong <xiyou.wangcong@gmail.com> Signed-off-by: Michal Marek <mmarek@suse.cz>
2010-07-05MIPS: Oprofile: Fixup of loongson2_exit()Wu Zhangjin
When exiting from loongson2_exit(), we need to reset the counter register too, this patch adds a function reset_counters() to do it, by the way, this function will be shared by Perf. Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com> Cc: linux-mips@linux-mips.org Patchwork: http://patchwork.linux-mips.org/patch/1199/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2010-05-21MIPS: Oprofile: Loongson: Cleanup the commentsWu Zhangjin
Removes some out-of-date comments and empty lines. Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com> Cc: linux-mips@linux-mips.org Patchwork: http://patchwork.linux-mips.org/patch/1204/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2010-05-21MIPS: Oprofile: Loongson: Cleanup of the macrosWu Zhangjin
The _EXL, _KERNEL etc. bits are in the performance control register so use _PERFCTRL prefix instead of _PERFCNT. While at it make the macro more readable, use _ENABLE instead of _INT_EN suffix to describe the interrupt enable bit. Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com> Cc: linux-mips@linux-mips.org Patchwork: http://patchwork.linux-mips.org/patch/1203/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2010-05-21MIPS: Oprofile: Loongson: Remove unused variable from loongson2_cpu_setup()Wu Zhangjin
Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com> Cc: linux-mips@linux-mips.org Patchwork: http://patchwork.linux-mips.org/patch/1202/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2010-05-21MIPS: Oprofile: Loongson: Remove useless parenthesesWu Zhangjin
Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com> Cc: linux-mips@linux-mips.org Patchwork: http://patchwork.linux-mips.org/patch/1201/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2010-05-21MIPS: Oprofile: Loongson: Unify macro for setting eventsWu Zhangjin
Unified macro for counter0 and counter1 to set the event in the control register. This will be needed by Perf. Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com> Cc: linux-mips@linux-mips.org Patchwork: http://patchwork.linux-mips.org/patch/1200/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2010-05-15 MIPS: Oprofile: Fix Loongson irq handlerWu Zhangjin
The interrupt enable bit for the performance counters is in the Control Register $24, not in the counter register. loongson2_perfcount_handler(), we need to use Reported-by: Xu Hengyang <hengyang@mail.ustc.edu.cn> Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com> Cc: linux-mips@linux-mips.org Patchwork: http://patchwork.linux-mips.org/patch/1198/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org> ---
2010-02-27MIPS: Loongson: Remove pointless sample_lock from oprofile code.Ralf Baechle
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2010-02-27MIPS: Make various locks static.Ralf Baechle
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2010-02-27MIPS: Simplify the weak annotation with __weakWu Zhangjin
Found by $ find arch/mips/ -name "*.c" | xargs -i grep -H weak {} | grep -v __weak [Ralf: Made this bulletproof by including <linux/compiler.h>] Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com> Cc: linux-mips@linux-mips.org Patchwork: http://patchwork.linux-mips.org/patch/874/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2010-02-27MIPS: Loongson: Change the Email address of Wu ZhangjinWu Zhangjin
Currently wuzj@lemote.com is not usable; change it to wuzhangjin@gmail.com. Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com> Cc: linux-mips@linux-mips.org Cc: yanh@lemote.com Cc: huhb@lemote.com Cc: zhangfx@lemote.com Patchwork: http://patchwork.linux-mips.org/patch/829/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-12-17MIPS: oprofile: Only do performance counter handling for counter interruptsWu Zhangjin
In Loongson2f IP6 is shared by bonito and perfcounters so we need to avoid do_IRQ for perfcounter when the interrupt is from bonito. Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com> Cc: linux-mips@linux-mips.org Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-11-02MIPS: Oprofile: Rename cpu_type from godson2 to loongson2Wu Zhangjin
Unify the naming method between kernel and the user-space oprofile tool. Because loongson is used instead of godson in most of the places, we agreed to use loongson instead, which will simplify future maintenance. Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com> Acked-by: Robert Richter <robert.richter@amd.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-09-30MIPS: Loongson2: Fix typo "enalbe" -> "enable"Uwe Kleine-König
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Cc: Yanhua <yanh@lemote.com> Cc: Robert Richter <robert.richter@amd.com> Acked-by: Wu Zhangjin <wuzj@lemote.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-09-17MIPS: Loongson: Add oprofile supportWu Zhangjin
This kernel support is needed by the user-space tool:oprofile to profile linux kernel or applications via loongson2 performance counters. you can enable this driver via CONFIG_OPROFILE = y or m. On Loongson2 there are two performance counters, each one can count 16 events respectively. when anyone of the performance counter overflows, an interrupt will be generated and is routed to the IRQ MIPS_CPU_IRQ_BASE + 6. Signed-off-by: Yanhua <yanh@lemote.com> Signed-off-by: Wu Zhangjin <wuzj@lemote.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2008-10-15oprofile: more whitespace fixesRobert Richter
Signed-off-by: Robert Richter <robert.richter@amd.com>
2008-07-15generic-ipi: more merge falloutIngo Molnar
fix more API change fallout in recently merged upstream changes. Signed-off-by: Ingo Molnar <mingo@elte.hu>
2008-06-26on_each_cpu(): kill unused 'retry' parameterJens Axboe
It's not even passed on to smp_call_function() anymore, since that was removed. So kill it. Acked-by: Jeremy Fitzhardinge <jeremy.fitzhardinge@citrix.com> Reviewed-by: Paul E. McKenney <paulmck@linux.vnet.ibm.com> Signed-off-by: Jens Axboe <jens.axboe@oracle.com>
2008-05-12[MIPS] Fix build failure in mips oprofile codeThiemo Seufer
This patch fixes a warning-as-error induced build failure of 64bit MIPS kernels. Signed-off-by: Thiemo Seufer <ths@networkno.de> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2008-04-28[MIPS] unexport null_perf_irq() and make it staticDmitri Vorobiev
This patch unexports the null_perf_irq() symbol, and simultaneously makes this function static. Signed-off-by: Dmitri Vorobiev <dmitri.vorobiev@gmail.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2008-04-28[MIPS] Add support for MIPS CMP platform.Ralf Baechle
Signed-off-by: Chris Dearman <chris@mips.com> Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2008-01-29[MIPS] Extend performance counter event field.Ralf Baechle
The latest draft version of the MIPS Architecture Specification extends the 6 bit event field by adding a directly adjacent 4-bit EventExt field for a total of 10 bits. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-12-06[MIPS] Oprofile: Fix computation of number of counters.Ralf Baechle
VSMP kernels will split the available performance counters between the two processors / cores. But don't do this when we're not on a VSMP system ... Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-10-19Combine instrumentation menus in kernel/Kconfig.instrumentationMathieu Desnoyers
Quoting Randy: "It seems sad that this patch sources Kconfig.marker, a 7-line file, 20-something times. Yes, you (we) don't want to put those 7 lines into 20-something different files, so sourcing is the right thing. However, what you did for avr32 seems more on the right track to me: make _one_ Instrumentation support menu that includes PROFILING, OPROFILE, KPROBES, and MARKERS and then use (source) that in all of the arches." Signed-off-by: Mathieu Desnoyers <mathieu.desnoyers@polymtl.ca> Acked-by: Randy Dunlap <randy.dunlap@oracle.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2007-10-11[MIPS] Fix "no space between function name and open parenthesis" warnings.Ralf Baechle
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-10-11[MIPS] Allow hardwiring of the CPU type to a single type for optimization.Ralf Baechle
This saves a few k on systems which only ever ship with a single CPU type. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-07-31[MIPS] Oprofile: Fix rm9000 performance counter handlerDajie Tan
The new type of irq handler remove a parameter (struct pt_regs *),but someone forgot to supply it. Signed-off-by: Dajie Tan <jiankemeng@gmail.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-06-14[MIPS] Separate performance counter interruptsChris Dearman
Support for performance counter overflow interrupt that is on a separate interrupt from the timer. Signed-off-by: Chris Dearman <chris@mips.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-04-24[MIPS] Fix oprofile logic to physical counter remappingRalf Baechle
This did cause oprofile to fail on non-multithreaded systems with more than 2 processors such as the BCM1480. Reported by Manish Lachwani (mlachwani@mvista.com). Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-03-13[MIPS] Oprofile: Reset all performance registers for MIPS_MT_SMP configsChris Dearman
Signed-off-by: Chris Dearman <chris@mips.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-03-04[MIPS] Oprofile: Add missing break statements.Ralf Baechle
This was causing oprofile to fail on R10000, R12000, R14000. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-02-20[MIPS] Fix Kconfig typo bugRalf Baechle
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-02-06[MIPS] Do not allow oprofile to be enabled on SMTC.Ralf Baechle
Oprofile cannot work on SMTC due to the limited number of counters. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-11-30[MIPS] Oprofile: kernel support for the R10000.Ralf Baechle
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-10-30[MIPS] Oprofile: Fix MIPSxx counter number detection.Ralf Baechle
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
generated by cgit v0.10.2 at 2024-11-15 18:39:04 (GMT)