| Age | Commit message (Collapse) | Author | |
|---|---|---|---|
| 2008-07-04 | powerpc/virtex: Fix booting of Xilinx FPGAs with 16550 for 405 and 440 | John Linn | |
| The following changes add processing to initialize the Xilinx 16550 UART in the boot wrapper for Virtex targets without firmware. Normally the boot wrapper assumes that the serial port has already been initialized by firmware. The wrapper was also modified to add the 440 build. Signed-off-by: John Linn <john.linn@xilinx.com> Signed-off-by: Grant Likely <grant.likely@secretlab.ca> | |||
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index : linux-fsl-qoriq | |
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