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Attempt to "tidy" up some of the multi IRQ handling and base + IRQ
management. This should keep it limping along without too much hassle,
and no new parts should ever be enabling or using this API anyways.
It doesn't get any closer to lipstick on a pig as this.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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This has turned in to quite a mess, and with CPUs that care using
dmaengine now it's about time to start cleaning up after the legacy DMA
code. For starters, kill off the stubs for the CPUs that don't do
anything, as well as all of the unused definitions. This leaves us with a
set of IRQs and base addresses we can deal with later.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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cpu-sh4a headers take priority over cpu-sh4 ones by virtue of the build
system, there's no need to try and mingle sh4a stuff in cpu-sh4.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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This takes a bit of a sledgehammer to the horribly CPU subtype
ifdef-ridden header and abstracts all of the different register layouts
in to distinct types which in turn can be overriden on a per-port basis,
or permitted to default to the map matching the port type at probe time.
In the process this ultimately fixes up inumerable bugs with mismatches
on various CPU types (particularly the legacy ones that were obviously
broken years ago and no one noticed) and provides a more tightly coupled
and consolidated platform for extending and implementing generic
features.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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