linux-fsl-qoriq - Freescale linux tree with Scalys patches

Age	Commit message (Collapse)	Author
2012-07-18	arch/tile: provide kernel support for the tilegx USB shim	Chris Metcalf
	This change adds support for accessing the USB shim from within the kernel. Note that this change by itself does not allow the kernel to act as a host or as a device; it merely exposes the built-in on-chip hardware to the kernel. The <arch/usb_host.h> and <arch/usb_host_def.h> headers are empty at the moment because the kernel does not require any types or definitions specific to the tilegx USB shim; the generic USB core code is all we need. The headers are left in as stubs so that we don't need to modify the hypervisor header (drv_usb_host_intf.h) from upstream. Signed-off-by: Chris Metcalf <cmetcalf@tilera.com>
2012-07-11	arch/tile: provide kernel support for the tilegx TRIO shim	Chris Metcalf
	Provide kernel support for the tilegx "Transaction I/O" (TRIO) on-chip hardware. This hardware implements the PCIe interface for tilegx; the driver changes to use TRIO for PCIe are in a subsequent commit. The change is layered on top of the tilegx GXIO IORPC subsystem. Signed-off-by: Chris Metcalf <cmetcalf@tilera.com>
2012-07-11	arch/tile: provide kernel support for the tilegx mPIPE shim	Chris Metcalf
	The TILE-Gx chip includes a packet-processing network engine called mPIPE ("Multicore Programmable Intelligent Packet Engine"). This change adds support for using the mPIPE engine from within the kernel. The engine has more functionality than is exposed here, but to keep the kernel code and binary simpler, this is a subset of the full API designed to enable standard Linux networking only. Signed-off-by: Chris Metcalf <cmetcalf@tilera.com>
2012-07-11	arch/tile: common DMA code for the GXIO IORPC subsystem	Chris Metcalf
	The dma_queue support is used by both the mPipe (networking) and Trio (PCI) hardware shims on tilegx. This common code is selected when either of those drivers is built. Signed-off-by: Chris Metcalf <cmetcalf@tilera.com>
2012-07-11	arch/tile: introduce GXIO IORPC framework for tilegx	Chris Metcalf
	The GXIO I/O RPC subsystem handles exporting I/O hardware resources to Linux and to applications running under Linux. For instance, memory which is made available for I/O DMA must be mapped by an I/O TLB; that means that such memory must be locked down by Linux, so that it is not swapped or otherwise reused, as long as those I/O TLB entries are active. Similarly, configuring direct hardware access introduces new validation requirements. If a user application registers memory, Linux must ensure that the supplied virtual addresses are valid, and turn them into client physical addresses. Similarly, when Linux then supplies those client physical addresses to the Tilera hypervisor, it must in turn validate those before turning them into the real physical addresses which are required by the hardware. To the extent that these sorts of activities were required on previous TILE architecture processors, they were implemented in a device-specific fashion. This meant that every I/O device had its own Tilera hypervisor driver, its own Linux driver, and in some cases its own user-level library support. There was a large amount of more-or-less functionally identical code in different places, particularly in the different Linux drivers. For TILE-Gx, this support has been generalized into a common framework, known as the I/O RPC framework or just IORPC. The two "gxio" directories (one for headers, one for sources) start with just a few files in each with this infrastructure commit, but after adding support for the on-board I/O shims for networking, PCI, USB, crypto, compression, I2CS, etc., there end up being about 20 files in each directory. More information on the IORPC framework is in the <hv/iorpc.h> header, included in this commit. Signed-off-by: Chris Metcalf <cmetcalf@tilera.com>