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2012-11-13Merge branch 'omap-for-v3.8/pm' into omap-for-v3.8/clockTony Lindgren
2012-11-08ARM: OMAP2+: PRCM: remove obsolete prcm.[ch]Paul Walmsley
arch/arm/mach-omap2/prcm.c and arch/arm/plat-omap/include/plat/prcm.h are now completely unused and can be removed. Signed-off-by: Paul Walmsley <paul@pwsan.com> Tested-by: Vaibhav Hiremath <hvaibhav@ti.com>
2012-11-08ARM: OMAP2+: hwmod: call to _omap4_disable_module() should use the ↵Paul Walmsley
SoC-specific call The hwmod code unconditionally calls _omap4_disable_module() on all SoCs when a module doesn't enable correctly. This "worked" due to the weak function omap4_cminst_wait_module_idle() in arch/arm/mach-omap2/prcm.c, which was a no-op. But now those weak functions are going away - they should not be used. So this patch will now call the SoC-specific disable_module code, assuming it exists. Needs to be done before the weak function is removed, otherwise AM33xx will crash early in boot. Signed-off-by: Paul Walmsley <paul@pwsan.com> Tested-by: Vaibhav Hiremath <hvaibhav@ti.com>
2012-11-08ARM: OMAP2+: PRCM: consolidate PRCM-related timeout macrosPaul Walmsley
Consolidate all of the copies of MAX_MODULE_HARDRESET_WAIT and MAX_MODULE_SOFTRESET_WAIT into one place, arch/arm/mach-omap2/prm.h. Signed-off-by: Paul Walmsley <paul@pwsan.com> Tested-by: Vaibhav Hiremath <hvaibhav@ti.com>
2012-11-08ARM: OMAP2+: PRCM: split and relocate the PRM/CM globals setupPaul Walmsley
Split omap2_set_globals_prcm() into PRM, CM, and PRCM_MPU variants, since these are all separate IP blocks. This should make it easier to move the PRM, CM, PRCM_MPU code into drivers/ in future patchsets. At this point arch/arm/plat-omap/include/plat/prcm.h is empty; a subsequent patch will remove it, and remove the #include from all the files that #include it. Signed-off-by: Paul Walmsley <paul@pwsan.com> Tested-by: Vaibhav Hiremath <hvaibhav@ti.com>
2012-11-08ARM: OMAP2+: PRCM: remove omap2_cm_wait_idlest()Paul Walmsley
Now that all users of mach-omap2/omap2_cm_wait_idlest() have been removed, delete the function and its supporting macros and prototypes. Signed-off-by: Paul Walmsley <paul@pwsan.com> Tested-by: Vaibhav Hiremath <hvaibhav@ti.com>
2012-11-08ARM: OMAP2+: CM/clock: convert _omap2_module_wait_ready() to use ↵Paul Walmsley
SoC-independent CM functions Convert the OMAP clock code's _omap2_module_wait_ready() to use SoC-independent CM functions that are provided by the CM code, rather than using a deprecated function from mach-omap2/prcm.c. This facilitates the future conversion of the CM code to a driver, and also removes a mach-omap2/prcm.c user. mach-omap2/prcm.c will be removed by a subsequent patch. Some modules have IDLEST registers that aren't in the CM module, such as the AM3517 IDLEST bits. So we also need a fallback function for these non-CM odd cases. Create a temporary one in mach-omap2/clock.c, intended to exist until the SCM drivers are ready. Signed-off-by: Paul Walmsley <paul@pwsan.com> Tested-by: Vaibhav Hiremath <hvaibhav@ti.com>
2012-11-08ARM: OMAP2xxx: APLL/CM: convert to use omap2_cm_wait_module_ready()Paul Walmsley
Convert the OMAP2xxx APLL code to use omap2_cm_wait_module_ready(), and move the low-level CM register manipulation functions to mach-omap2/cm2xxx.c. The objectives here are to remove the dependency on the deprecated omap2_cm_wait_idlest() function in mach-omap2/prcm.c, so that code can be removed later; and move low-level register accesses to the CM IP block to the CM code, which will soon be moved into drivers/. Signed-off-by: Paul Walmsley <paul@pwsan.com> Tested-by: Vaibhav Hiremath <hvaibhav@ti.com>
2012-11-08ARM: OMAP2+: board files: use SoC-specific system restart functionsPaul Walmsley
Modify the board files to use the SoC-specific system restart functions. At this point it's possible to remove omap_prcm_restart() from mach-omap2/prcm.c. While removing the prototypes for the now-unused restart functions, clean up a few more obsolete prototypes in mach-omap2/clock.h. Signed-off-by: Paul Walmsley <paul@pwsan.com> Tested-by: Vaibhav Hiremath <hvaibhav@ti.com>
2012-11-08ARM: OMAP2+: PRCM: create SoC-specific chip restart functionsPaul Walmsley
Split omap_prcm_restart() from mach-omap2/prcm.c into SoC-specific variants. These functions need to be able to save the reboot reason into the scratchpad RAM. This implies a dependency on both the PRM and SCM IP blocks, so they've been moved into their own file. This will eventually call functions in the PRM and SCM drivers, once those are created. Vaibhav Hiremath <hvaibhav@ti.com> identified an unused prototype in the first version of this patch - now removed. Tony Lindgren <tony@atomide.com> noted a compile problem with some RMK Kconfigs; resolved in this patch. Signed-off-by: Paul Walmsley <paul@pwsan.com> Cc: Vaibhav Hiremath <hvaibhav@ti.com> Tested-by: Vaibhav Hiremath <hvaibhav@ti.com> Cc: Tony Lindgren <tony@atomide.com>
2012-11-08ARM: OMAP2xxx: clock: move virt_prcm_set code into clkt2xxx_virt_prcm_set.cPaul Walmsley
Collect all of the virt_prcm_set-specific clocktype code into mach-omap2/clkt2xxx_virt_prcm_set.c. Remove its dependency on the 'sclk' and 'vclk' global variables. Those variables will be removed by subsequent patches. This is part of the process of cleaning up the OMAP2xxx clock code and preparing for the removal of the omap_prcm_restart() function. Signed-off-by: Paul Walmsley <paul@pwsan.com> Tested-by: Vaibhav Hiremath <hvaibhav@ti.com>
2012-11-08ARM: OMAP2xxx: clock: remove global 'dclk' variablePaul Walmsley
Remove the global 'dclk' variable, instead replacing it with a variable local to the dpllcore clock type C file. This removes some of the special-case code surrounding the OMAP2xxx clock init. This patch is a prerequisite for the removal of the omap_prcm_restart() code from arch/arm/mach-omap2/prcm.c. It also cleans up some special-case OMAP2xxx clock code in the process. Signed-off-by: Paul Walmsley <paul@pwsan.com> Tested-by: Vaibhav Hiremath <hvaibhav@ti.com>
2012-11-08ARM: OMAP2/3: PRM: add SoC reset functions (using the CORE DPLL method)Paul Walmsley
Add SoC reset functions into the PRM code. These functions are based on code from mach-omap2/prcm.c. They reset the SoC using the CORE DPLL reset method (as opposed to one of the other two or three chip reset methods). Adding them here will facilitate their removal from arch/arm/mach-omap2/prcm.c. (prcm.c is deprecated.) Signed-off-by: Paul Walmsley <paul@pwsan.com> Tested-by: Vaibhav Hiremath <hvaibhav@ti.com>
2012-11-08ARM: OMAP2+: common: remove mach-omap2/common.c globals and map_common_io codePaul Walmsley
Get rid of the mach-omap2/common.c globals by moving the global initialization for IP block addresses that must occur early into mach-omap2/io.c. In the process, remove the *_map_common_io*() and SoC-specific *set_globals* functions. Signed-off-by: Paul Walmsley <paul@pwsan.com> Tested-by: Vaibhav Hiremath <hvaibhav@ti.com>
2012-11-08ARM: OMAP2+: PRCM: remove omap_prcm_get_reset_sources()Paul Walmsley
omap_prcm_get_reset_sources() is now unused; so, remove it. Signed-off-by: Paul Walmsley <paul@pwsan.com> Tested-by: Vaibhav Hiremath <hvaibhav@ti.com>
2012-11-07Merge tag 'for_3.8-pm-voltage' of ↵Tony Lindgren
git://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-omap-pm into omap-for-v3.8/pm OMAP voltage layer updates towards supporting auto-retention/auto-off
2012-11-07Merge tag 'for_3.8-pm-sr' of ↵Tony Lindgren
git://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-omap-pm into omap-for-v3.8/pm OMAP: SmartReflex: pass device-independent data via platform_data
2012-11-07Merge tag 'for_3.8-cleanup-pm' of ↵Tony Lindgren
git://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-omap-pm into omap-for-v3.8/pm Minor pr_warn() cleanup for OMAP2+ Voltage Processor (VP)
2012-11-05ARM: OMAP4: OPP: add OMAP4460 definitionsVishwanath Sripathy
Add OMAP4460 OPP definitions for voltage and frequencies based on OMAP4460 ES1.0 DM Operating Condition Addendum Version 0.1 The following exceptions are present: * Smartreflex support is still on experimental mode: the gains and min limits are currently pending characterization data. Currently OMAP4430 values are used. * Efuse offset for core OPP100-OV setting is not clear in documentation. * IVA OPPs beyond OPP100 are disabled due to the delta between max OMAP4460 current requirements and Phoenix Max supply on VCORE2 in the default configuration - boards which have supply which can support this should explicitly call opp_enable and enable the same. * MPU OPPs > OPPTURBO can easily be detected using a efuse burnt - currently disabled pending clock changes to support DCC feature. [nm@ti.com: cleanups and updates from Datamanual] Signed-off-by: Nishanth Menon <nm@ti.com> Signed-off-by: Vishwanath BS <vishwanath.bs@ti.com> [t-kristo@ti.com: rebased to linux-3.6-rc5] Signed-off-by: Tero Kristo <t-kristo@ti.com> Signed-off-by: Kevin Hilman <khilman@ti.com>
2012-11-05ARM: OMAP4: TWL: enable high speed mode for PMIC communicationTero Kristo
With the new parameters, I2C can now be put to high speed mode for better performance. Signed-off-by: Tero Kristo <t-kristo@ti.com> Signed-off-by: Kevin Hilman <khilman@ti.com>
2012-11-05ARM: OMAP4: VC: setup I2C parameters based on board dataTero Kristo
VC code now provides a table of pre-calculated I2C setup parameters, which will be used based on the capacitance value calculated for the I2C trace on the PCB. A default trace length of 6.3cm is used unless board defines its own value during init. The parameters set will be the I2C internal pull setup and the I2C timing parameters for high speed use mode. Full speed mode is not supported as of now. Signed-off-by: Tero Kristo <t-kristo@ti.com> Signed-off-by: Kevin Hilman <khilman@ti.com>
2012-11-05ARM: OMAP4: vc: fix channel configurationTero Kristo
RACEN bit should only be set if the voltage and command register addresses are the same. Signed-off-by: Tero Kristo <t-kristo@ti.com> Signed-off-by: Kevin Hilman <khilman@ti.com>
2012-11-05ARM: OMAP3+: voltage: remove unused volt_setup_time parameterTero Kristo
This is no longer needed as the ramp times are calculated from voltage deltas + slew rates. Signed-off-by: Tero Kristo <t-kristo@ti.com> Signed-off-by: Kevin Hilman <khilman@ti.com>
2012-11-05ARM: OMAP: TWL: change the vddmin / vddmax voltages to specTero Kristo
As vddmin / vddmax voltages for the pmic only describe the pmic capabilities now, change the voltages to be according to spec. TWL data manuals give following values: TWL4030 (SWCS019L) : VDD1: 600mV ... 1450mV, VDD2: 600mV ... 1500mV TWL5030 (SWCS030E) : VDD1: 600mV ... 1450mV, VDD2: 600mV ... 1500mV TWL6030 (SWCS045A) : 0V ... 2100mV Signed-off-by: Tero Kristo <t-kristo@ti.com> Signed-off-by: Kevin Hilman <khilman@ti.com>
2012-11-05ARM: OMAP3+: voltage: use oscillator data to calculate setup timesTero Kristo
We now use the previously defined oscillator setup / shutdown times to calculate the register values for CLKSETUP. Signed-off-by: Tero Kristo <t-kristo@ti.com> Signed-off-by: Kevin Hilman <khilman@ti.com>
2012-11-05ARM: OMAP3+: vp: use new vp_params for calculating vddmin and vddmaxTero Kristo
Now we select the vddmin and vddmax values based on both pmic and voltage processor data, this allows usage of different power ICs. Signed-off-by: Tero Kristo <t-kristo@ti.com> Signed-off-by: Kevin Hilman <khilman@ti.com>
2012-11-05ARM: OMAP: add support for oscillator setupTero Kristo
This contains startup and shutdown times for the oscillator. By default use ULONG_MAX. Oscillator setup is used for calculating and setting up latencies for sleep modes that disable oscillator. Based on a patch from Nishanth Menon <nm@ti.com>. Signed-off-by: Tero Kristo <t-kristo@ti.com> Signed-off-by: Kevin Hilman <khilman@ti.com>
2012-11-05ARM: OMAP4: VC: calculate ramp timesTero Kristo
OMAP4 VC code now uses voltage deltas + slew rates for calculating actual ramp times for voltage changes. Both retention / sleep + off mode voltage ramp times are setup at the same time during initialization. Signed-off-by: Tero Kristo <t-kristo@ti.com> Signed-off-by: Kevin Hilman <khilman@ti.com>
2012-11-05ARM: OMAP4: voltage: add support for VOLTSETUP_x_OFF registerTero Kristo
OMAP4 has two VOLTSETUP registers. One is controlling retention and sleep voltage setup times, the other one off mode setup times. Both of these need to be setup for stable behavior of the device. The code setting up the new register will be added in the next patch. Signed-off-by: Tero Kristo <t-kristo@ti.com> Signed-off-by: Kevin Hilman <khilman@ti.com>
2012-11-05ARM: OMAP3: VC: calculate ramp timesTero Kristo
OMAP3 VC code now uses voltage deltas + slew rates for calculating actual ramp times for voltage changes. Previously a static value was used. Two calculation methods are provided: i2c_timings and off_timings. I2C timings are used during retention or off mode transition which is initiated over I2C, and OFF timings are used if PMIC signal (nsleep) is used to control all the off mode voltages at the same time. Signed-off-by: Tero Kristo <t-kristo@ti.com> Signed-off-by: Kevin Hilman <khilman@ti.com>
2012-11-05ARM: OMAP3+: voltage: introduce omap vc / vp params for voltagedomainsTero Kristo
These new structs will hold the sleep voltage levels (omap_vc_params) and voltage processor min / max voltages (omap_vp_params.) Previously these were part of the PMIC struct, but they do not really belong there, as they are OMAP chip specific, not PMIC specific parameters. voltdm code is also changed to use the new structs. Signed-off-by: Tero Kristo <t-kristo@ti.com> Signed-off-by: Kevin Hilman <khilman@ti.com>
2012-11-05ARM: OMAP: voltage: renamed vp_vddmin and vp_vddmax fieldsTero Kristo
These are now called vddmin and vddmax, as these fields will be used globally for selecting voltage ranges for a pmic channel, and not only for voltage processor. Signed-off-by: Tero Kristo <t-kristo@ti.com> Signed-off-by: Kevin Hilman <khilman@ti.com>
2012-11-05ARM: OMAP3+: PM: VP: use uV for max and min voltage limitsNishanth Menon
Every PMIC has it's own eccentricities, For example, one of the PMIC has MSB set to 1 for a specific function - voltage enable! using an hardcoded value specific for TWL when copied over to such an implementation causes the system to crash as the MSB bit was 0 and the voltage got disabled!. Instead we use actual values and depend on the convertion routines to abstract out the eccentricities of each PMIC. With this, we can now move the voltages to a common location in voltage.h as they are no longer dependent on PMICs and expect the PMIC's conversion routines to set a cap if the voltage is out of reach for the PMIC. Reported-by: Jon Hunter <jon-hunter@ti.com> Signed-off-by: Nishanth Menon <nm@ti.com> Signed-off-by: Vishwanath BS <vishwanath.bs@ti.com> Signed-off-by: Tero Kristo <t-kristo@ti.com> Signed-off-by: Kevin Hilman <khilman@ti.com>
2012-11-02Merge tag 'frv-fixes-20121102' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/dhowells/linux-frv Pull FRV fixes from David Howells: "A collection of small fixes for the FRV architecture." * tag 'frv-fixes-20121102' of git://git.kernel.org/pub/scm/linux/kernel/git/dhowells/linux-frv: frv: fix the broken preempt frv: switch to saner kernel_execve() semantics FRV: Fix the new-style kernel_thread() stuff FRV: Fix the preemption handling FRV: gcc-4.1.2 also inlines weak functions FRV: Don't objcopy the GNU build_id note FRV: Add missing linux/export.h #inclusions
2012-11-02Merge tag 'stable/for-linus-3.7-rc4-tag' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/konrad/xen Pull Xen bugfixes from Konrad Rzeszutek Wilk: - Use appropriate macros instead of hand-rolling our own (ARM). - Fixes if FB/KBD closed unexpectedly. - Fix memory leak in /dev/gntdev ioctl calls. - Fix overflow check in xenbus_file_write. - Document cleanup. - Performance optimization when migrating guests. * tag 'stable/for-linus-3.7-rc4-tag' of git://git.kernel.org/pub/scm/linux/kernel/git/konrad/xen: xen/mmu: Use Xen specific TLB flush instead of the generic one. xen/arm: use the __HVC macro xen/xenbus: fix overflow check in xenbus_file_write() xen-kbdfront: handle backend CLOSED without CLOSING xen-fbfront: handle backend CLOSED without CLOSING xen/gntdev: don't leak memory from IOCTL_GNTDEV_MAP_GRANT_REF x86: remove obsolete comment from asm/xen/hypervisor.h
2012-11-02frv: fix the broken preemptAl Viro
Just get %icc2 into the state we would have after local_irq_disable() and physical IRQ having happened since then. Then we can simply use preempt_schedule_irq() and be done with the whole mess. Acked-by: David Howells <dhowells@redhat.com> Signed-off-by: Al Viro <viro@zeniv.linux.org.uk>
2012-11-02frv: switch to saner kernel_execve() semanticsAl Viro
Signed-off-by: Al Viro <viro@zeniv.linux.org.uk>
2012-11-02FRV: Fix the new-style kernel_thread() stuffDavid Howells
The kernel_thread() changes for FRV don't work, and FRV fails to boot, starting with: commit 02ce496f152df87be081a64796498942c433a2fd Author: Al Viro <viro@zeniv.linux.org.uk> Date: Tue Sep 18 22:18:51 2012 -0400 Subject: frv: split ret_from_fork, simplify kernel_thread() a lot The problem is that the userspace registers are completely cleared when a kernel thread is created and all subsequent user threads are then copied from that. Unfortunately, however, the TBR and PSR registers are restored from the pt_regs and the values they should be set to are clobbered by the memset. Instead, copy across the old user registers as normal, and then merely alter GR8 and GR9 in it if we're going to execute a kernel thread. Signed-off-by: David Howells <dhowells@redhat.com>
2012-11-02FRV: Fix the preemption handlingDavid Howells
Fix the preemption handling in FRV code where the PREEMPT_ACTIVE value is incorrectly loaded into the threadinfo flags rather than the threadinfo preemption count. Unfortunately, the code cannot be simply converted to use preempt_schedule_irq() as is because FRV uses virtual interrupt disablement to cut down on the cost of actually disabling interrupts and thus local_irq_enable() doesn't actually enable interrupts. Reported-by: Al Viro <viro@ZenIV.linux.org.uk> Signed-off-by: David Howells <dhowells@redhat.com> cc: Al Viro <viro@ZenIV.linux.org.uk>
2012-11-02FRV: Don't objcopy the GNU build_id noteDavid Howells
Don't let objcopy transfer the GNU build_id note into the loadable image as it is located at address 0 and the image ends up >3G in size. Signed-off-by: David Howells <dhowells@redhat.com>
2012-11-02FRV: Add missing linux/export.h #inclusionsDavid Howells
Add missing linux/export.h #inclusions to the FRV arch. Signed-off-by: David Howells <dhowells@redhat.com>
2012-11-02Merge tag 'xtensa-next-20121101' of git://github.com/czankel/xtensa-linuxLinus Torvalds
Pull Xtensa fixes from Chris Zankel: "Some important bug fixes. With the change to uapi, there was a bug introduced that results in an empty syscall table (mult-inclusion bug). Switching to the generic thread/execve allowed us to fix a bug we had in vfork()." * tag 'xtensa-next-20121101' of git://github.com/czankel/xtensa-linux: xtensa: switch to generic sys_execve() xtensa: switch to generic kernel_execve() xtensa: switch to generic kernel_thread() xtensa: reset windowbase/windowstart when cloning the VM xtensa: use physical addresses for bus addresses xtensa: allow multi-inclusion for uapi/unistd.h
2012-10-31KVM: x86: fix vcpu->mmio_fragments overflowXiao Guangrong
After commit b3356bf0dbb349 (KVM: emulator: optimize "rep ins" handling), the pieces of io data can be collected and write them to the guest memory or MMIO together Unfortunately, kvm splits the mmio access into 8 bytes and store them to vcpu->mmio_fragments. If the guest uses "rep ins" to move large data, it will cause vcpu->mmio_fragments overflow The bug can be exposed by isapc (-M isapc): [23154.818733] general protection fault: 0000 [#1] SMP DEBUG_PAGEALLOC [ ......] [23154.858083] Call Trace: [23154.859874] [<ffffffffa04f0e17>] kvm_get_cr8+0x1d/0x28 [kvm] [23154.861677] [<ffffffffa04fa6d4>] kvm_arch_vcpu_ioctl_run+0xcda/0xe45 [kvm] [23154.863604] [<ffffffffa04f5a1a>] ? kvm_arch_vcpu_load+0x17b/0x180 [kvm] Actually, we can use one mmio_fragment to store a large mmio access then split it when we pass the mmio-exit-info to userspace. After that, we only need two entries to store mmio info for the cross-mmio pages access Signed-off-by: Xiao Guangrong <xiaoguangrong@linux.vnet.ibm.com> Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com>
2012-10-31xen/mmu: Use Xen specific TLB flush instead of the generic one.Konrad Rzeszutek Wilk
As Mukesh explained it, the MMUEXT_TLB_FLUSH_ALL allows the hypervisor to do a TLB flush on all active vCPUs. If instead we were using the generic one (which ends up being xen_flush_tlb) we end up making the MMUEXT_TLB_FLUSH_LOCAL hypercall. But before we make that hypercall the kernel will IPI all of the vCPUs (even those that were asleep from the hypervisor perspective). The end result is that we needlessly wake them up and do a TLB flush when we can just let the hypervisor do it correctly. This patch gives around 50% speed improvement when migrating idle guest's from one host to another. Oracle-bug: 14630170 CC: stable@vger.kernel.org Tested-by: Jingjie Jiang <jingjie.jiang@oracle.com> Suggested-by: Mukesh Rathor <mukesh.rathor@oracle.com> Signed-off-by: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
2012-10-30xen/arm: use the __HVC macroStefano Stabellini
Use the new __HVC macro in hypercall.S. Signed-off-by: Stefano Stabellini <stefano.stabellini@eu.citrix.com> Signed-off-by: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
2012-10-30x86: remove obsolete comment from asm/xen/hypervisor.hOlaf Hering
Signed-off-by: Olaf Hering <olaf@aepfle.de> Signed-off-by: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
2012-10-30ARM: OMAP2+: WDT: move init; add read_reset_sources pdata function pointerPaul Walmsley
The OMAP watchdog timer driver directly calls a function exported by code in arch/arm/mach-omap2. This is not good; it tightly couples this driver to the mach-omap2 integration code. Instead, add a temporary platform_data function pointer to abstract this function call. A subsequent patch will convert the watchdog driver to use this function pointer. This patch also moves the device creation code out of arch/arm/mach-omap2/devices.c and into arch/arm/mach-omap2/wd_timer.c. This is another step towards the removal of arch/arm/mach-omap2/devices.c. Cc: Wim Van Sebroeck <wim@iguana.be> Acked-by: Wim Van Sebroeck <wim@iguana.be> [paul@pwsan.com: skip wd_timer device creation when DT blob is present] Signed-off-by: Paul Walmsley <paul@pwsan.com>
2012-10-30ARM: OMAP1: CGRM: fix omap1_get_reset_sources() return typePaul Walmsley
An older version of the patch "ARM: OMAP1: create read_reset_sources() function (for initial use by watchdog)" was sent upstream, which used the wrong return type for the omap1_get_reset_sources() function. Fix it to return a u32, which is what the WDTIMER platform_data function pointer read_reset_sources() expects. Signed-off-by: Paul Walmsley <paul@pwsan.com>
2012-10-28Merge tag 'fixes-for-3.7' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc Pull arm-soc fixes from Arnd Bergmann: "Bug fixes for a number of ARM platforms, mostly OMAP, imx and at91. These come a little later than I had hoped but unfortunately we had a few of these patches cause regressions themselves and had to work out how to deal with those in the meantime." * tag 'fixes-for-3.7' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (38 commits) Revert "ARM i.MX25: Fix PWM per clock lookups" ARM: versatile: fix versatile_defconfig ARM: mvebu: update defconfig with 3.7 changes ARM: at91: fix at91x40 build ARM: socfpga: Fix socfpga compilation with early_printk() enabled ARM: SPEAr: Remove unused empty files MAINTAINERS: Add arm-soc tree entry ARM: dts: mxs: add the "clock-names" for gpmi-nand ARM: ux500: Correct SDI5 address and add some format changes ARM: ux500: Specify AMBA Primecell IDs for Nomadik I2C in DT ARM: ux500: Fix build error relating to IRQCHIP_SKIP_SET_WAKE ARM: at91: drop duplicated config SOC_AT91SAM9 entry ARM: at91/i2c: change id to let i2c-at91 work ARM: at91/i2c: change id to let i2c-gpio work ARM: at91/dts: at91sam9g20ek_common: Fix typos in buttons labels. ARM: at91: fix external interrupt specification in board code ARM: at91: fix external interrupts in non-DT case ARM: at91: at91sam9g10: fix SOC type detection ARM: at91/tc: fix typo in the DT document ARM: AM33XX: Fix configuration of dmtimer parent clock by dmtimer driverDate:Wed, 17 Oct 2012 13:55:55 -0500 ...
2012-10-27Revert "ARM i.MX25: Fix PWM per clock lookups"Arnd Bergmann
This reverts commit 92063cee118655d25b50d04eb77b012f3287357a, it was applied prematurely, causing this build error for imx_v4_v5_defconfig: arch/arm/mach-imx/clk-imx25.c: In function 'mx25_clocks_init': arch/arm/mach-imx/clk-imx25.c:206:26: error: 'pwm_ipg_per' undeclared (first use in this function) arch/arm/mach-imx/clk-imx25.c:206:26: note: each undeclared identifier is reported only once for each function it appears in Sascha Hauer explains: > There are several gates missing in clk-imx25.c. I have a patch which > adds support for them and I seem to have missed that the above depends > on it. Signed-off-by: Arnd Bergmann <arnd@arndb.de>