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2013-11-07Merge tag 'staging-3.13-rc1' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/staging Pull staging driver update from Greg KH: "Here's the big drivers/staging/ update for 3.13-rc1. Nothing major here, just a _ton_ of fixes and cleanups, mostly driven by the new round of OPW applicants, but also there are lots of other people doing staging tree cleanups these days in order to help get the drivers into mergable shape. We also merge, and then revert, the ktap code, as Ingo and the other perf/ftrace developers feel it should go into the "real" part of the kernel with only a bit more work, so no need to put it in staging for now. All of this has been in linux-next for a while with no reported issues" * tag 'staging-3.13-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/staging: (1045 commits) staging: drm/imx: fix return value check in ipu_add_subdevice_pdata() Staging: zram: Fix access of NULL pointer Staging: zram: Fix variable dereferenced before check Staging: rtl8187se: space prohibited before semicolon in r8185b_init.c Staging: rtl8187se: fix space prohibited after that open parenthesis '(' in r8185b_init.c Staging: rtl8187se: fix braces {} are not necessary for single statement blocks in r8185b_init.c Staging: rtl8187se: fix trailing whitespace in r8185b_init.c Staging: rtl8187se: fix please, no space before tabs in r8185b_init.c drivers/staging/nvec/Kconfig: remove trailing whitespace Staging: dwc2: Fix variable dereferenced before check Staging: xgifb: fix braces {} are not necessary for any arm of this statement staging: rtl8192e: remove unneeded semicolons staging: rtl8192e: use true and false for bool variables staging: ft1000: return values corrected in scram_start_dwnld staging: ft1000: change values of status return variable in write_dpram32_and_check staging: bcm: Remove unnecessary pointer casting imx-drm: ipuv3-crtc: Invert IPU DI0 clock polarity staging: r8188eu: Fix sparse warnings in rtl_p2p.c staging: r8188eu: Fix sparse warnings in rtw_mlme_ext.c staging: r8188eu: Fix sparse warnings in rtl8188e.cmd.c ...
2013-11-07Merge tag 'driver-core-3.13-rc1' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/driver-core Pull driver core / sysfs patches from Greg KH: "Here's the big driver core / sysfs update for 3.13-rc1. There's lots of dev_groups updates for different subsystems, as they all get slowly migrated over to the safe versions of the attribute groups (removing userspace races with the creation of the sysfs files.) Also in here are some kobject updates, devres expansions, and the first round of Tejun's sysfs reworking to enable it to be used by other subsystems as a backend for an in-kernel filesystem. All of these have been in linux-next for a while with no reported issues" * tag 'driver-core-3.13-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/driver-core: (83 commits) sysfs: rename sysfs_assoc_lock and explain what it's about sysfs: use generic_file_llseek() for sysfs_file_operations sysfs: return correct error code on unimplemented mmap() mdio_bus: convert bus code to use dev_groups device: Make dev_WARN/dev_WARN_ONCE print device as well as driver name sysfs: separate out dup filename warning into a separate function sysfs: move sysfs_hash_and_remove() to fs/sysfs/dir.c sysfs: remove unused sysfs_get_dentry() prototype sysfs: honor bin_attr.attr.ignore_lockdep sysfs: merge sysfs_elem_bin_attr into sysfs_elem_attr devres: restore zeroing behavior of devres_alloc() sysfs: fix sysfs_write_file for bin file input: gameport: convert bus code to use dev_groups input: serio: remove bus usage of dev_attrs input: serio: use DEVICE_ATTR_RO() i2o: convert bus code to use dev_groups memstick: convert bus code to use dev_groups tifm: convert bus code to use dev_groups virtio: convert bus code to use dev_groups ipack: convert bus code to use dev_groups ...
2013-11-07Merge tag 'usb-3.13-rc1' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/usb Pull USB driver update from Greg KH: "Here's the big USB driver update for 3.13-rc1. It includes the usual xhci changes, EHCI updates to get the scheduling of USB transactions working better, and a raft of gadget and musb updates as well. All of this has been in linux-next for a while with no reported issues" * tag 'usb-3.13-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/usb: (305 commits) USB: Maintainers change for usb serial drivers usb: usbtest: support container id descriptor test usb: usbtest: support superspeed device capbility descriptor test usb: usbtest: support usb2 extension descriptor test usb: chipidea: only get vbus regulator for non-peripheral mode USB: ehci-atmel: add usb_clk for transition to CCF usb: cdc-wdm: ignore speed change notifications USB: cdc-wdm: support back-to-back USB_CDC_NOTIFY_RESPONSE_AVAILABLE notifications usbatm: Fix dynamic_debug / ratelimited atm_dbg and atm_rldbg macros printk: pr_debug_ratelimited: check state first to reduce "callbacks suppressed" messages usb: usbtest: support bos descriptor test for usb 3.0 USB: phy: samsung: Support multiple PHYs of same type usb: wusbcore: change WA_SEGS_MAX to a legal value usb: wusbcore: add a quirk for Alereon HWA device isoc behavior usb: wusbcore: combine multiple isoc frames in a single transfer request. usb: wusbcore: set the RPIPE wMaxPacketSize value correctly usb: chipidea: host: more enhancement when ci->hcd is NULL usb: ohci: remove ep93xx bus glue platform driver usb: usbtest: fix checkpatch warning as sizeof code style UWB: clean up attribute use by using ATTRIBUTE_GROUPS() ...
2013-11-06uprobes: Introduce arch_uprobe->ixolOleg Nesterov
Currently xol_get_insn_slot() assumes that we should simply copy arch_uprobe->insn[] which is (ignoring arch_uprobe_analyze_insn) just the copy of the original insn. This is not true for arm which needs to create another insn to execute it out-of-line. So this patch simply adds the new member, ->ixol into the union. This doesn't make any difference for x86 and powerpc, but arm can divorce insn/ixol and initialize the correct xol insn in arch_uprobe_analyze_insn(). Signed-off-by: Oleg Nesterov <oleg@redhat.com>
2013-11-06uprobes: Move function declarations out of archDavid A. Long
Move the function declarations from the arch headers to the common header, since only the function bodies are architecture-specific. These changes are from Vincent Rabin's uprobes patch. [ oleg: update arch/powerpc/include/asm/uprobes.h ] Signed-off-by: Rabin Vincent <rabin@rab.in> Signed-off-by: David A. Long <dave.long@linaro.org> Signed-off-by: Oleg Nesterov <oleg@redhat.com>
2013-11-06x86, hyperv: Move a variable to avoid an unused variable warningH. Peter Anvin
The variable hv_lapic_frequency causes an unused variable warning if CONFIG_X86_LOCAL_APIC is disabled. Since the variable is only used inside a small if statement, move the declaration of that variable into the if statement itself. Cc: K. Y. Srinivasan <kys@microsoft.com> Link: http://lkml.kernel.org/r/1381444224-3303-1-git-send-email-kys@microsoft.com Signed-off-by: H. Peter Anvin <hpa@linux.intel.com>
2013-11-06MIPS: remove duplicate defineMichael Opdenacker
This patch removes a duplicate define from arch/mips/boot/ecoff.h Signed-off-by: Michael Opdenacker <michael.opdenacker@free-electrons.com> Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/6081/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2013-11-06arm64: locks: Remove CONFIG_GENERIC_LOCKBREAKCatalin Marinas
Commit 52ea2a560a9d (arm64: locks: introduce ticket-based spinlock implementation) introduces the arch_spin_is_contended() function making CONFIG_GENERIC_LOCKBREAK unnecessary. Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> Acked-by: Will Deacon <will.deacon@arm.com>
2013-11-06perf/x86/intel: Add Ivy Bridge-EP uncore IRP box supportYan, Zheng
Unlike other uncore boxes, IRP boxes live in PCI buses with no UBOX device. For PCI bus without UBOX device, we find the next bus that has UBOX device and use its 'bus to socket' mapping. Besides the counter/control registers in IRP boxes are not properly aligned. Signed-off-by: Yan, Zheng <zheng.z.yan@intel.com> Signed-off-by: Peter Zijlstra <peterz@infradead.org> Cc: eranian@google.com Cc: "Yan Zheng" <zheng.z.yan@intel.com> Link: http://lkml.kernel.org/r/1383197815-17706-2-git-send-email-zheng.z.yan@intel.com Signed-off-by: Ingo Molnar <mingo@kernel.org>
2013-11-06perf/x86/intel/uncore: Add filter support for IvyBridge-EP QPI boxesYan, Zheng
The encoding for filter registers of IvyBridge-EP uncore QPI boxes is completely the same as SandyBridge-EP. Signed-off-by: Yan, Zheng <zheng.z.yan@intel.com> Signed-off-by: Peter Zijlstra <peterz@infradead.org> Cc: eranian@google.com Cc: "Yan Zheng" <zheng.z.yan@intel.com> Link: http://lkml.kernel.org/r/1383197815-17706-1-git-send-email-zheng.z.yan@intel.com Signed-off-by: Ingo Molnar <mingo@kernel.org>
2013-11-06perf: Fix arch_perf_out_copy_user defaultPeter Zijlstra
The arch_perf_output_copy_user() default of __copy_from_user_inatomic() returns bytes not copied, while all other argument functions given DEFINE_OUTPUT_COPY() return bytes copied. Since copy_from_user_nmi() is the odd duck out by returning bytes copied where all other *copy_{to,from}* functions return bytes not copied, change it over and ammend DEFINE_OUTPUT_COPY() to expect bytes not copied. Oddly enough DEFINE_OUTPUT_COPY() already returned bytes not copied while expecting its worker functions to return bytes copied. Signed-off-by: Peter Zijlstra <peterz@infradead.org> Acked-by: will.deacon@arm.com Cc: Frederic Weisbecker <fweisbec@gmail.com> Link: http://lkml.kernel.org/r/20131030201622.GR16117@laptop.programming.kicks-ass.net Signed-off-by: Ingo Molnar <mingo@kernel.org>
2013-11-06arm64: KVM: vgic: byteswap GICv2 access on world switch if BEMarc Zyngier
Ensure that accesses to the GICH_* registers are byteswapped when the kernel is compiled as big-endian. Signed-off-by: Marc Zyngier <marc.zyngier@arm.com> Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
2013-11-06arm64: KVM: initialize HYP mode following the kernel endiannessMarc Zyngier
Force SCTLR_EL2.EE to 1 if the kernel is compiled as BE. Signed-off-by: Marc Zyngier <marc.zyngier@arm.com> Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
2013-11-06x86/cpu: Increase max CPU count to 8192Josh Boyer
The MAXSMP option is intended to enable silly large numbers of CPUs for testing purposes. The current value of 4096 isn't very silly any longer as there are actual SGI machines that approach 6096 CPUs when taking HT into account. Increase the value to a nice round 8192 to account for this and allow for short term future increases. Signed-off-by: Josh Boyer <jwboyer@fedoraproject.org> Cc: prarit@redhat.com Cc: Russ Anderson <rja@sgi.com> Cc: Linus Torvalds <torvalds@linux-foundation.org> Cc: Andrew Morton <akpm@linux-foundation.org> Link: http://lkml.kernel.org/r/20131105143816.GK9944@hansolo.jdub.homelinux.org [ Tweaked it so that MAXSMP simply sets the maximum of the normal range. ] Signed-off-by: Ingo Molnar <mingo@kernel.org>
2013-11-06x86/cpu: Allow higher NR_CPUS valuesJosh Boyer
The current range for SMP configs is 2 - 512 CPUs, or a full 4096 in the case of MAXSMP. There are machines that have 1024 CPUs in them today and configuring a kernel for that means you are forced to set MAXSMP. This adds additional unnecessary overhead. While that overhead might be considered tiny for large machines, it isn't necessarily so if you are building a kernel that runs across a wide variety of machines. To cover the range of more common machines today, we allow NR_CPUS to be up to 4096 when CPUMASK_OFFSTACK is enabled. Signed-off-by: Josh Boyer <jwboyer@fedoraproject.org> Cc: prarit@redhat.com Cc: Russ Anderson <rja@sgi.com> Cc: Linus Torvalds <torvalds@linux-foundation.org> Cc: Andrew Morton <akpm@linux-foundation.org> Link: http://lkml.kernel.org/r/20131105143728.GJ9944@hansolo.jdub.homelinux.org Signed-off-by: Ingo Molnar <mingo@kernel.org>
2013-11-06x86/cpu: Always print SMP information in /proc/cpuinfoHATAYAMA Daisuke
Currently show_cpuinfo_core() displays cpu core information only if the number of threads per a whole cores is 2 or larger. However, this condition doesn't care about the number of sockets. For example, this condition doesn't hold on systems with two logical cpus consisting of two sockets and a single core on each socket - yet the topology information would be interesting to see in that case as well. I don't know whether or not there are processors in real world by which such configurations are possible, but at least on vitual machine environments, such configuration can occur, typically when no explicit SMP information is provided in advance. For example, on qemu/KVM, SMP information is specified via -smp command-line option, more specifically, its syntax is: -smp n[,cores=cores][,threads=threads][,sockets=sockets][,maxcpus=maxcpus] If this is not specified, qemu tells configuration with n-sockets, 1-core and 1-thread to the guest machine, on which guest, MP information is not displayed in /proc/cpuinfo. I saw this situation on VMWare guest environment, too. To fix this issue, this patch simply removes the condition because this information is useful even if there's only 1 thread. Signed-off-by: HATAYAMA Daisuke <d.hatayama@jp.fujitsu.com> Cc: Vivek Goyal <vgoyal@redhat.com> Cc: H. Peter Anvin <hpa@linux.intel.com> Cc: Linus Torvalds <torvalds@linux-foundation.org> Cc: Andrew Morton <akpm@linux-foundation.org> Cc: Peter Zijlstra <a.p.zijlstra@chello.nl> Link: http://lkml.kernel.org/r/5277D644.4090707@jp.fujitsu.com Signed-off-by: Ingo Molnar <mingo@kernel.org>
2013-11-06Merge tag 'v3.12' into x86/cpu, to refresh the branch before queueing up ↵Ingo Molnar
more changes Signed-off-by: Ingo Molnar <mingo@kernel.org>
2013-11-06ARC: [SMP] Fix build failures for large NR_CPUSVineet Gupta
ST.as only takes S9 (255) for offset. This was going out of range when accessing a task_struct field with 4k NR_CPUS (due to 128b of coumaks itself in there). Workaround by using an intermediate register to do the address scaling. There is some duplication of fix for ctx_sw.c and ctx_sw_asm.S however given that C version will go away soon I'm not bothering to factor out the common code. Reported-by: Noam Camus <noamc@ezchip.com> Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
2013-11-06ARC: [SMP] enlarge possible NR_CPUSNoam Camus
Signed-off-by: Noam Camus <noamc@ezchip.com> Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
2013-11-06ARC: [SMP] TLB flushVineet Gupta
- Add mm_cpumask setting (aggregating only, unlike some other arches) used to restrict the TLB flush cross-calling - cross-calling versions of TLB flush routines (thanks to Noam) Signed-off-by: Noam Camus <noamc@ezchip.com> Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
2013-11-06ARC: [SMP] ASID allocationVineet Gupta
-Track a Per CPU ASID counter -mm-per-cpu ASID (multiple threads, or mm migrated around) Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
2013-11-06arc: export symbol for pm_power_off in reset.cChen Gang
Need export symbol for it, or can not pass compiling, the related error with allmodconfig: MODPOST 2994 modules ERROR: "pm_power_off" [drivers/mfd/retu-mfd.ko] undefined! ERROR: "pm_power_off" [drivers/char/ipmi/ipmi_poweroff.ko] undefined! Signed-off-by: Chen Gang <gang.chen@asianux.com> Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
2013-11-06arc: export symbol for save_stack_trace() in stacktrace.cChen Gang
Need export its symbol just like other architectures done, or can not pass compiling with allmodconfig, the related error: MODPOST 2994 modules ERROR: "save_stack_trace" [kernel/backtracetest.ko] undefined! ERROR: "save_stack_trace" [drivers/md/persistent-data/dm-persistent-data.ko] undefined! Signed-off-by: Chen Gang <gang.chen@asianux.com> Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
2013-11-06arc: remove '__init' for get_hw_config_num_irq()Chen Gang
get_hw_config_num_irq() may be called by normal iss_model_init_smp() which is a function pointer for 'init_smp' which may be called by first_lines_of_secondary() which also need be normal too. The related warning (with allmodconfig): MODPOST vmlinux.o WARNING: vmlinux.o(.text+0x5814): Section mismatch in reference from the function iss_model_init_smp() to the function .init.text:get_hw_config_num_irq() The function iss_model_init_smp() references the function __init get_hw_config_num_irq(). This is often because iss_model_init_smp lacks a __init annotation or the annotation of get_hw_config_num_irq is wrong. Signed-off-by: Chen Gang <gang.chen@asianux.com>
2013-11-06arc: remove '__init' for first_lines_of_secondary()Chen Gang
first_lines_of_secondary() is a '__init' function, but it may be called by __cpu_up() by _cpu_up() by cpu_up() which is a normal export symbol function. So recommend to remove '__init'. The related warning (with allmodconfig): MODPOST vmlinux.o WARNING: vmlinux.o(.text+0x315c): Section mismatch in reference from the function __cpu_up() to the function .init.text:first_lines_of_secondary() The function __cpu_up() references the function __init first_lines_of_secondary(). This is often because __cpu_up lacks a __init annotation or the annotation of first_lines_of_secondary is wrong. Signed-off-by: Chen Gang <gang.chen@asianux.com>
2013-11-06arc: remove '__init' for setup_processor() and arc_init_IRQ()Chen Gang
They haven't '__init' in definition, but has '__init' in declaration. And normal function start_kernel_secondary() may call setup_processor() which will call arc_init_IRQ(). So need remove '__init' for both of them. The related warning (with allmodconfig): MODPOST vmlinux.o WARNING: vmlinux.o(.text+0x3084): Section mismatch in reference from the function start_kernel_secondary() to the function .init.text:setup_processor() The function start_kernel_secondary() references the function __init setup_processor(). This is often because start_kernel_secondary lacks a __init annotation or the annotation of setup_processor is wrong. Signed-off-by: Chen Gang <gang.chen@asianux.com>
2013-11-06arc: kgdb: add default implementation for kgdb_roundup_cpus()Chen Gang
arc supports kgdb, but need update -- add function kgdb_roundup_cpus(), or can not pass compiling. At present, add the simple generic one just like other architectures(e.g. tile, mips ...). The related error (with allmodconfig): kernel/built-in.o: In function `kgdb_cpu_enter': kernel/debug/debug_core.c:580: undefined reference to `kgdb_roundup_cpus' Signed-off-by: Chen Gang <gang.chen@asianux.com> Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
2013-11-06ARC: Fix bogus gcc warning and micro-optimise TLB iteration loopVineet Gupta
------------------>8---------------------- arch/arc/mm/tlb.c: In function ‘do_tlb_overlap_fault’: arch/arc/mm/tlb.c:688:13: warning: array subscript is above array bounds [-Warray-bounds] (pd0[n] & PAGE_MASK)) { ^ ------------------>8---------------------- While at it, remove the usless last iteration of outer loop when reading a TLB SET for duplicate entries. Suggested-by: Mischa Jonker <mjonker@synopsys.com> Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
2013-11-06ARC: Add support for irqflags tracing and lockdepVineet Gupta
Lockdep required a small fix to stacktrace API which was incorrectly unwindign out of __switch_to for the current call frame. Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
2013-11-06ARC: Reset the value of Interrupt Priority RegisterVineet Gupta
In case bootloader has changed the priority of one/more IRQ lines Reported-by: Noam Camus <noamc@ezchip.com> Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
2013-11-06ARC: Reduce #ifdef'ery for unaligned access emulationVineet Gupta
Emulation not enabled is treated as if the fixup failed, so no need for special #ifdef checks. Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
2013-11-06ARC: Change calling convention of do_page_fault()Vineet Gupta
switch the args (address, pt_regs) to match with all the other "C" exception handlers. This removes the awkwardness in EV_ProtV for page fault vs. unaligned access. Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
2013-11-06ARC: cacheflush optim - PTAG can be loop invariant if V-P is constVineet Gupta
Line op needs vaddr (indexing) and paddr (tag match). For page sized flushes (V-P const), each line op will need a different index, but the tag bits wil remain constant, hence paddr can be setup once outside the loop. This improves select LMBench numbers for Aliasing dcache where we have more "preventive" cache flushing. Processor, Processes - times in microseconds - smaller is better ------------------------------------------------------------------------------ Host OS Mhz null null open slct sig sig fork exec sh call I/O stat clos TCP inst hndl proc proc proc --------- ------------- ---- ---- ---- ---- ---- ---- ---- ---- ---- ---- ---- 3.11-rc7- Linux 3.11.0- 80 4.66 8.88 69.7 112. 268. 8.60 28.0 3489 13.K 27.K # Non alias ARC700 3.11-rc7- Linux 3.11.0- 80 4.64 8.51 68.6 98.5 271. 8.58 28.1 4160 15.K 32.K # Aliasing 3.11-rc7- Linux 3.11.0- 80 4.64 8.51 69.8 99.4 270. 8.73 27.5 3880 15.K 31.K # PTAG loop Inv Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
2013-11-06ARC: cacheflush refactor #3: Unify the {d,i}cache flush leaf helpersVineet Gupta
With Line length being constant now, we can fold the 2 helpers into 1. This allows applying any optimizations (forthcoming) to single place. Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
2013-11-06ARC: cacheflush refactor #2: I and D caches lines to have same sizeVineet Gupta
Having them be different seems an obscure configuration. Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
2013-11-06ARC: cacheflush refactor #1: push aux reg ascertaining into leaf routineVineet Gupta
ARC dcache supports 3 ops - Inv, Flush, Flush-n-Inv. The programming model however provides 2 commands FLUSH, INV. INV will either discard or flush-n-discard (based on DT_CTRL bit) The leaf helper __dc_line_loop() used to take the AUX register (corresponding to the 2 commands). Now we push that to within the helper, paving way for code consolidations to follow. Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
2013-11-06ARC: use __weak instead of __attribute__((weak))Vineet Gupta
Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
2013-11-06ARC: Annotate some functions as staticVineet Gupta
Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
2013-11-06arc: Replace __get_cpu_var usesChristoph Lameter
__get_cpu_var() is used for multiple purposes in the kernel source. One of them is address calculation via the form &__get_cpu_var(x). This calculates the address for the instance of the percpu variable of the current processor based on an offset. Other use cases are for storing and retrieving data from the current processors percpu area. __get_cpu_var() can be used as an lvalue when writing data or on the right side of an assignment. __get_cpu_var() is defined as : #define __get_cpu_var(var) (*this_cpu_ptr(&(var))) __get_cpu_var() always only does an address determination. However, store and retrieve operations could use a segment prefix (or global register on other platforms) to avoid the address calculation. this_cpu_write() and this_cpu_read() can directly take an offset into a percpu area and use optimized assembly code to read and write per cpu variables. This patch converts __get_cpu_var into either an explicit address calculation using this_cpu_ptr() or into a use of this_cpu operations that use the offset. Thereby address calcualtions are avoided and less registers are used when code is generated. At the end of the patchset all uses of __get_cpu_var have been removed so the macro is removed too. The patchset includes passes over all arches as well. Once these operations are used throughout then specialized macros can be defined in non -x86 arches as well in order to optimize per cpu access by f.e. using a global register that may be set to the per cpu base. Transformations done to __get_cpu_var() 1. Determine the address of the percpu instance of the current processor. DEFINE_PER_CPU(int, y); int *x = &__get_cpu_var(y); Converts to int *x = this_cpu_ptr(&y); 2. Same as #1 but this time an array structure is involved. DEFINE_PER_CPU(int, y[20]); int *x = __get_cpu_var(y); Converts to int *x = this_cpu_ptr(y); 3. Retrieve the content of the current processors instance of a per cpu variable. DEFINE_PER_CPU(int, u); int x = __get_cpu_var(y) Converts to int x = __this_cpu_read(y); 4. Retrieve the content of a percpu struct DEFINE_PER_CPU(struct mystruct, y); struct mystruct x = __get_cpu_var(y); Converts to memcpy(this_cpu_ptr(&x), y, sizeof(x)); 5. Assignment to a per cpu variable DEFINE_PER_CPU(int, y) __get_cpu_var(y) = x; Converts to this_cpu_write(y, x); 6. Increment/Decrement etc of a per cpu variable DEFINE_PER_CPU(int, y); __get_cpu_var(y)++ Converts to this_cpu_inc(y) Acked-by: Vineet Gupta <vgupta@synopsys.com> Signed-off-by: Christoph Lameter <cl@linux.com>
2013-11-05arm64: compat: Clear the IT state independent of the 32-bit ARM or Thumb-2 modeT.J. Purtell
The ARM architecture reference specifies that the IT state bits in the PSR must be all zeros in ARM mode or behavior is unspecified. If an ARM function is registered as a signal handler, and that signal is delivered inside a block of instructions following an IT instruction, some of the instructions at the beginning of the signal handler may be skipped if the IT state bits of the Program Status Register are not cleared by the kernel. Signed-off-by: T.J. Purtell <tj@mobisocial.us> [catalin.marinas@arm.com: code comment and commit log updated] Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
2013-11-05arm64: Use 42-bit address space with 64K pagesCatalin Marinas
This patch expands the VA_BITS to 42 when the 64K page configuration is enabled allowing 2TB kernel linear mapping. Linux still uses 2 levels of page tables in this configuration with pgd now being a full page. Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> Acked-by: Will Deacon <will.deacon@arm.com> Acked-by: Marc Zyngier <marc.zyngier@arm.com>
2013-11-05arm64: module: ensure instruction is little-endian before manipulationWill Deacon
Relocations that require an instruction immediate to be re-encoded must ensure that the instruction pattern is represented in a little-endian format for the manipulation code to work correctly. This patch converts the loaded instruction into native-endianess prior to encoding and then converts back to little-endian byteorder before updating memory. Signed-off-by: Will Deacon <will.deacon@arm.com> Tested-by: Matthew Leach <matthew.leach@arm.com> Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
2013-11-05arm64: defconfig: Enable CONFIG_PREEMPT by defaultCatalin Marinas
This way we can spot early bugs when just testing with the default config. Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
2013-11-05arm64: fix access to preempt_count from assembly codeMarc Zyngier
preempt_count is defined as an int. Oddly enough, we access it as a 64bit value. Things become interesting when running a BE kernel, and looking at the current CPU number, which is stored as an int next to preempt_count. Like in a per-cpu interrupt handler, for example... Using a 32bit access fixes the issue for good. Cc: Matthew Leach <matthew.leach@arm.com> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com> Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
2013-11-05x86, defconfig: Add DEVTMPFS and DEVTMPFS_MOUNT to *86*_defconfigChen Gang
The defconfig kernel can not run under neither fedora16 x86_64 laptop nor fedora17 x86_64 pc. After enable DEVTMPFS* in x86_64_defconfig, it will be OK. DEVTMPFS* is only related with software, so for i386_defconfig may also need them (at least, it has no negative effect for defconfig). Signed-off-by: Chen Gang <gang.chen@asianux.com> Link: http://lkml.kernel.org/r/52784DFF.8040004@asianux.com Signed-off-by: H. Peter Anvin <hpa@zytor.com>
2013-11-04arm64: move enabling of GIC before CPUs are set onlineMarc Zyngier
Commit 53ae3acd (arm64: Only enable local interrupts after the CPU is marked online) moved the enabling of the GIC after the CPUs are marked online. This has some interesting effect: [...] [<ffffffc0002eefd8>] gic_raise_softirq+0xf8/0x160 [<ffffffc000088f58>] smp_send_reschedule+0x38/0x40 [<ffffffc0000c8728>] resched_task+0x84/0xc0 [<ffffffc0000c8cdc>] check_preempt_curr+0x58/0x98 [<ffffffc0000c8d38>] ttwu_do_wakeup+0x1c/0xf4 [<ffffffc0000c8f90>] ttwu_do_activate.constprop.84+0x64/0x70 [<ffffffc0000cad30>] try_to_wake_up+0x1d4/0x2b4 [<ffffffc0000cae6c>] default_wake_function+0x10/0x18 [<ffffffc0000c5ca4>] __wake_up_common+0x60/0xa0 [<ffffffc0000c7784>] complete+0x48/0x64 [<ffffffc000088bec>] secondary_start_kernel+0xe8/0x110 [...] Here, we end-up calling gic_raise_softirq without having initialized the interrupt controller for this CPU. While this goes unnoticed with GICv2 (the distributor is always accessible), it explodes with GICv3. The fix is to move the call to notify_cpu_starting before we set the secondary CPU online. Signed-off-by: Marc Zyngier <marc.zyngier@arm.com> Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
2013-11-04arm64: use generic RW_DATA_SECTION macro in linker scriptMark Salter
The .data section in the arm64 linker script currently lacks a definition for page-aligned data. This leads to a .page_aligned section being placed between the end of data and start of bss. This patch corrects that by using the generic RW_DATA_SECTION macro which includes support for page-aligned data. Signed-off-by: Mark Salter <msalter@redhat.com> Acked-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
2013-11-04MIPS: Random whitespace clean-upsMaciej W. Rozycki
Another whitespace clean-up, this removes tabs from between sentences in some comments. Signed-off-by: Maciej W. Rozycki <macro@codesourcery.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/6103/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2013-11-04s390/mm,tlb: correct tlb flush on page table upgradeMartin Schwidefsky
The IDTE instruction used to flush TLB entries for a specific address space uses the address-space-control element (ASCE) to identify affected TLB entries. The upgrade of a page table adds a new top level page table which changes the ASCE. The TLB entries associated with the old ASCE need to be flushed and the ASCE for the address space needs to be replaced synchronously on all CPUs which currently use it. The concept of a lazy ASCE update with an exception handler is broken. Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
2013-11-04Merge branch 'perf/urgent' into perf/core to fix conflictsIngo Molnar
Conflicts: tools/perf/bench/numa.c Signed-off-by: Ingo Molnar <mingo@kernel.org>