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2011-02-07x86, nx: Mark the ACPI resume trampoline code as +xH. Peter Anvin
We reserve lowmem for the things that need it, like the ACPI wakeup code, way early to guarantee availability. This happens before we set up the proper pagetables, so set_memory_x() has no effect. Until we have a better solution, use an initcall to mark the wakeup code executable. Originally-by: Matthieu Castet <castet.matthieu@free.fr> Signed-off-by: H. Peter Anvin <hpa@zytor.com> Cc: Matthias Hopf <mhopf@suse.de> Cc: rjw@sisk.pl Cc: Suresh Siddha <suresh.b.siddha@intel.com> LKML-Reference: <4D4F8019.2090104@zytor.com> Signed-off-by: Ingo Molnar <mingo@elte.hu>
2011-02-07powerpc: Fix hcall tracepoint recursionAnton Blanchard
Spinlocks on shared processor partitions use H_YIELD to notify the hypervisor we are waiting on another virtual CPU. Unfortunately this means the hcall tracepoints can recurse. The patch below adds a percpu depth and checks it on both the entry and exit hcall tracepoints. Signed-off-by: Anton Blanchard <anton@samba.org> Acked-by: Steven Rostedt <rostedt@goodmis.org> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> CC: stable@kernel.org
2011-02-07powerpc/numa: Fix bug in unmap_cpu_from_nodeAnton Blanchard
When converting to the new cpumask code I screwed up: - if (cpu_isset(cpu, numa_cpumask_lookup_table[node])) { - cpu_clear(cpu, numa_cpumask_lookup_table[node]); + if (cpumask_test_cpu(cpu, node_to_cpumask_map[node])) { + cpumask_set_cpu(cpu, node_to_cpumask_map[node]); This was introduced in commit 25863de07af9 (powerpc/cpumask: Convert NUMA code to new cpumask API) Fix it. Signed-off-by: Anton Blanchard <anton@samba.org> Cc: <stable@kernel.org> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
2011-02-07powerpc/numa: Disable VPHN on dedicated processor partitionsAnton Blanchard
There is no need to start up the timer and monitor topology changes on a dedicated processor partition, so disable it. Signed-off-by: Anton Blanchard <anton@samba.org> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
2011-02-07powerpc/numa: Add length when creating OF properties via VPHNAnton Blanchard
The rest of the NUMA code expects an OF associativity property with the first cell containing the length. Without this fix all topology changes cause us to misparse the property and put the cpu into node 0. Signed-off-by: Anton Blanchard <anton@samba.org> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
2011-02-07powerpc/numa: Check for all VPHN changesAnton Blanchard
The hypervisor uses unsigned 1 byte counters to signal topology changes to the OS. Since they can wrap we need to check for any difference, not just if the hypervisor count is greater than the previous count. Signed-off-by: Anton Blanchard <anton@samba.org> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
2011-02-07powerpc/numa: Only use active VPHN count fieldsAnton Blanchard
VPHN supports up to 8 distance fields but the number of entries in ibm,associativity-reference-points signifies how many are in use. Don't look at all the VPHN counts, only distance_ref_points_depth worth. Since we already cap our distance metrics at MAX_DISTANCE_REF_POINTS, use that to size the VPHN arrays and add a BUILD_BUG_ON to avoid it growing larger than the VPHN maximum of 8. Signed-off-by: Anton Blanchard <anton@samba.org> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
2011-02-07powerpc/pseries: Remove unnecessary variable initializations in numa.cJesse Larrew
Remove unnecessary variable initializations in VPHN functions. Signed-off-by: Jesse Larrew <jlarrew@linux.vnet.ibm.com> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
2011-02-07powerpc/pseries: Fix brace placement in numa.cJesse Larrew
Fix brace placement in VPHN code. Signed-off-by: Jesse Larrew <jlarrew@linux.vnet.ibm.com> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
2011-02-07powerpc/pseries: Fix typo in VPHN commentsJesse Larrew
Correct a spelling error in VPHN comments in numa.c. Signed-off-by: Jesse Larrew <jlarrew@linux.vnet.ibm.com> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
2011-02-07powerpc: Fix some 6xx/7xxx CPU setup functionsBenjamin Herrenschmidt
Some of those functions try to adjust the CPU features, for example to remove NAP support on some revisions. However, they seem to use r5 as an index into the CPU table entry, which might have been right a long time ago but no longer is. r4 is the right register to use. This probably caused some off behaviours on some PowerMac variants using 750cx or 7455 processor revisions. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> CC: stable@kernel.org
2011-02-07powerpc: Pass the right cpu_spec to ->setup_cpu() on 64-bitBenjamin Herrenschmidt
When calling setup_cpu() on 64-bit, we pass a pointer to the cputable entry we have found. This used to be fine when cur_cpu_spec was a pointer to that entry, but nowadays, we copy the entry into a separate variable, and we do so before we call the setup_cpu() callback. That means that any attempt by that callback at patching the CPU table entry (to adjust CPU features for example) will patch the wrong table. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
2011-02-07powerpc/book3e: Protect complex macro args in mmu-book3e.hScott Wood
Signed-off-by: Scott Wood <scottwood@freescale.com> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
2011-02-07powerpc: Fix pfn_valid() when memory starts at a non-zero addressScott Wood
max_mapnr is a pfn, not an index innto mem_map[]. So don't add ARCH_PFN_OFFSET a second time. Signed-off-by: Scott Wood <scottwood@freescale.com> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
2011-02-06Merge branch 'ixp4xx' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/chris/linux-2.6 * 'ixp4xx' of git://git.kernel.org/pub/scm/linux/kernel/git/chris/linux-2.6: arm/ixp4xx: Rename FREQ macro to avoid collisions IXP4xx: Fix qmgr_release_queue() flushing unexpected queue entries.
2011-02-06Merge branch 'irq-fixes-for-linus' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip * 'irq-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip: m32r: Fixup last __do_IRQ leftover genirq: Add missing status flags to modification mask
2011-02-06Merge branch 'x86-fixes-for-linus' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip * 'x86-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip: x86-32: Make sure the stack is set up before we use it x86, mtrr: Avoid MTRR reprogramming on BP during boot on UP platforms x86, nx: Don't force pages RW when setting NX bits
2011-02-06arm/ixp4xx: Rename FREQ macro to avoid collisionsBen Hutchings
FREQ is a ridiculously short name for a platform-specific macro in a generic header, and it now conflicts with an enumeration in the gspca/ov519 driver. Also delete conditional reference to ixp4xx_get_board_tick_rate() which is not defined anywhere. Signed-off-by: Ben Hutchings <ben@decadent.org.uk> Signed-off-by: Krzysztof Hałasa <khc@pm.waw.pl>
2011-02-06IXP4xx: Fix qmgr_release_queue() flushing unexpected queue entries.Krzysztof Hałasa
Queues should be empty when released, if not, there is a safety valve. Make sure the queue is usable after it triggers. Signed-off-by: Krzysztof Hałasa <khc@pm.waw.pl>
2011-02-05m32r: Fixup last __do_IRQ leftoverThomas Gleixner
Somehow I managed to miss the last __do_IRQ caller when I cleanup the remaining users. m32r is fully converted to the generic irq layer, but I managed to not commit the conversion of __do_IRQ() to generic_handle_irq() after compile testing the quilt series :( Pointed-out-by: Christoph Hellwig <hch@lst.de> Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Cc: Hirokazu Takata <takata@linux-m32r.org> Cc: Paul Mundt <lethal@linux-sh.org>
2011-02-05ARM: 6652/1: ep93xx: correct the end address of the AC97 memory resourceMika Westerberg
The last register is at offset 0xa8 making the resource end to be 0xac - 1 instead of 0xb0 - 1. Signed-off-by: Mika Westerberg <mika.westerberg@iki.fi> Acked-by: H Hartley Sweeten <hsweeten@visionengravers.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2011-02-05x86-32: Make sure the stack is set up before we use itH. Peter Anvin
Since checkin ebba638ae723d8a8fc2f7abce5ec18b688b791d7 we call verify_cpu even in 32-bit mode. Unfortunately, calling a function means using the stack, and the stack pointer was not initialized in the 32-bit setup code! This code initializes the stack pointer, and simplifies the interface slightly since it is easier to rely on just a pointer value rather than a descriptor; we need to have different values for the segment register anyway. This retains start_stack as a virtual address, even though a physical address would be more convenient for 32 bits; the 64-bit code wants the other way around... Reported-by: Matthieu Castet <castet.matthieu@free.fr> LKML-Reference: <4D41E86D.8060205@free.fr> Tested-by: Kees Cook <kees.cook@canonical.com> Signed-off-by: H. Peter Anvin <hpa@linux.intel.com>
2011-02-03serial: bfin_5xx: split uart RX lock from uart port lock to avoid deadlockSonic Zhang
The RX lock is used to protect the RX buffer from concurrent access in DMA mode between the timer and RX interrupt routines. It is independent from the uart lock which is used to protect the TX buffer. It is possible for a uart TX transfer to be started up from the RX interrupt handler if low latency is enabled. So we need to split the locks to avoid deadlocking in this situation. In PIO mode, the RX lock is not necessary because the handle_simple_irq and handle_level_irq functions ensure driver interrupt handlers are called once on one core. And now that the RX path has its own lock, the TX interrupt has nothing to do with the RX path, so disabling it at the same time. Signed-off-by: Sonic Zhang <sonic.zhang@analog.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
2011-02-03x86, mm: avoid possible bogus tlb entries by clearing prev mm_cpumask after ↵Suresh Siddha
switching mm Clearing the cpu in prev's mm_cpumask early will avoid the flush tlb IPI's while the cr3 is still pointing to the prev mm. And this window can lead to the possibility of bogus TLB fills resulting in strange failures. One such problematic scenario is mentioned below. T1. CPU-1 is context switching from mm1 to mm2 context and got a NMI etc between the point of clearing the cpu from the mm_cpumask(mm1) and before reloading the cr3 with the new mm2. T2. CPU-2 is tearing down a specific vma for mm1 and will proceed with flushing the TLB for mm1. It doesn't send the flush TLB to CPU-1 as it doesn't see that cpu listed in the mm_cpumask(mm1). T3. After the TLB flush is complete, CPU-2 goes ahead and frees the page-table pages associated with the removed vma mapping. T4. CPU-2 now allocates those freed page-table pages for something else. T5. As the CR3 and TLB caches for mm1 is still active on CPU-1, CPU-1 can potentially speculate and walk through the page-table caches and can insert new TLB entries. As the page-table pages are already freed and being used on CPU-2, this page walk can potentially insert a bogus global TLB entry depending on the (random) contents of the page that is being used on CPU-2. T6. This bogus TLB entry being global will be active across future CR3 changes and can result in weird memory corruption etc. To avoid this issue, for the prev mm that is handing over the cpu to another mm, clear the cpu from the mm_cpumask(prev) after the cr3 is changed. Marking it for -stable, though we haven't seen any reported failure that can be attributed to this. Signed-off-by: Suresh Siddha <suresh.b.siddha@intel.com> Acked-by: Ingo Molnar <mingo@elte.hu> Cc: stable@kernel.org [v2.6.32+] Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2011-02-03Merge branch 'perf-fixes-for-linus' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip * 'perf-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip: perf: Fix reading in perf_event_read() watchdog: Don't change watchdog state on read of sysctl watchdog: Fix sysctl consistency watchdog: Fix broken nowatchdog logic perf: Fix Pentium4 raw event validation perf: Fix alloc_callchain_buffers()
2011-02-03x86, mtrr: Avoid MTRR reprogramming on BP during boot on UP platformsSuresh Siddha
Markus Kohn ran into a hard hang regression on an acer aspire 1310, when acpi is enabled. git bisect showed the following commit as the bad one that introduced the boot regression. commit d0af9eed5aa91b6b7b5049cae69e5ea956fd85c3 Author: Suresh Siddha <suresh.b.siddha@intel.com> Date: Wed Aug 19 18:05:36 2009 -0700 x86, pat/mtrr: Rendezvous all the cpus for MTRR/PAT init Because of the UP configuration of that platform, native_smp_prepare_cpus() bailed out (in smp_sanity_check()) before doing the set_mtrr_aps_delayed_init() Further down the boot path, native_smp_cpus_done() will call the delayed MTRR initialization for the AP's (mtrr_aps_init()) with mtrr_aps_delayed_init not set. This resulted in the boot processor reprogramming its MTRR's to the values seen during the start of the OS boot. While this is not needed ideally, this shouldn't have caused any side-effects. This is because the reprogramming of MTRR's (set_mtrr_state() that gets called via set_mtrr()) will check if the live register contents are different from what is being asked to write and will do the actual write only if they are different. BP's mtrr state is read during the start of the OS boot and typically nothing would have changed when we ask to reprogram it on BP again because of the above scenario on an UP platform. So on a normal UP platform no reprogramming of BP MTRR MSR's happens and all is well. However, on this platform, bios seems to be modifying the fixed mtrr range registers between the start of OS boot and when we double check the live registers for reprogramming BP MTRR registers. And as the live registers are modified, we end up reprogramming the MTRR's to the state seen during the start of the OS boot. During ACPI initialization, something in the bios (probably smi handler?) don't like this fact and results in a hard lockup. We didn't see this boot hang issue on this platform before the commit d0af9eed5aa91b6b7b5049cae69e5ea956fd85c3, because only the AP's (if any) will program its MTRR's to the value that BP had at the start of the OS boot. Fix this issue by checking mtrr_aps_delayed_init before continuing further in the mtrr_aps_init(). Now, only AP's (if any) will program its MTRR's to the BP values during boot. Addresses https://bugzilla.novell.com/show_bug.cgi?id=623393 [ By the way, this behavior of the bios modifying MTRR's after the start of the OS boot is not common and the kernel is not prepared to handle this situation well. Irrespective of this issue, during suspend/resume, linux kernel will try to reprogram the BP's MTRR values to the values seen during the start of the OS boot. So suspend/resume might be already broken on this platform for all linux kernel versions. ] Reported-and-bisected-by: Markus Kohn <jabber@gmx.org> Tested-by: Markus Kohn <jabber@gmx.org> Signed-off-by: Suresh Siddha <suresh.b.siddha@intel.com> Cc: Thomas Renninger <trenn@novell.com> Cc: Rafael Wysocki <rjw@novell.com> Cc: Venkatesh Pallipadi <venki@google.com> Cc: stable@kernel.org # [v2.6.32+] LKML-Reference: <1296694975.4418.402.camel@sbsiddha-MOBL3.sc.intel.com> Signed-off-by: Ingo Molnar <mingo@elte.hu>
2011-02-03Merge branch 'for-linus' of git://git390.marist.edu/pub/scm/linux-2.6Linus Torvalds
* 'for-linus' of git://git390.marist.edu/pub/scm/linux-2.6: [S390] reset default for CONFIG_CHSC_SCH [S390] qdio: prevent compile warning under CONFIG_32BIT [S390] use asm-generic/cacheflush.h [S390] tlb: fix build error caused by THP [S390] missing sacf in uaccess [S390] pgtable_list corruption [S390] dasd: prevent panic with unresumed devices
2011-02-03x86, nx: Don't force pages RW when setting NX bitsMatthieu CASTET
Xen want page table pages read only. But the initial page table (from head_*.S) live in .data or .bss. That was broken by 64edc8ed5ffae999d8d413ba006850e9e34166cb. There is absolutely no reason to force these pages RW after they have already been marked RO. Signed-off-by: Matthieu CASTET <castet.matthieu@free.fr> Tested-by: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com> Signed-off-by: H. Peter Anvin <hpa@linux.intel.com>
2011-02-02arm: omap4: panda: remove usb_nop_xceiv_register(v1)Ming Lei
Panda uses both twl6030 otg phy(vbus, id) and internal phy(data lines, DP/DM), so removes usb_nop_xceiv_register to make twl6030 otg driver working since current otg code only supports one global transceiver. Otherwise, musb doesn't work without the remove. Reviewd-by: Felipe Balbi <balbi@ti.com> Signed-off-by: Ming Lei <tom.leiming@gmail.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2011-02-02OMAP1: Fix non-working LCD on OMAP310Marek Vasut
This patch fixes bug introduced in revision: f8e9e98454606e43b728269de21db349f57861c7 omap1: DMA: move LCD related code from plat-omap to mach-omap1 The code introduced by this patch didn't consider any other CPUs but OMAP1510, which rendered OMAP310 -- which has the same LCD controller -- non-working. Use cpu_is_omap15xx() instead of cpu_is_omap1510() to squash this issue. Bug found on Palm Zire 71 hardware. Signed-off-by: Marek Vasut <marek.vasut@gmail.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2011-02-02OMAP3: Devkit8000: Change lcd power pinThomas Weber
This patch fixes a wrongly used lcd enable pin. The Devkit8000 uses twl4030_ledA configured as output gpio only for the lcd enable line. twl4030_gpio.1 is used through the generic gpio functions while ledA is used via low level twl4030 calls. This patch removes the low level calls and use the generic gpio functions for initialization and use of ledA. This patch also fixes a bug where the lcd would not power down when blanking. Further this patch fixes an indentation issue. The comment line uses eight whitespace and is replaced with a hard tab. gpio_request + gpio_direction_output are replaced with gpio_request_one. The return value of gpio_request_one is used to set the value of the gpio to -EINVAL when unsuccessful, so that gpio_is_valid can detect the unsuccessful request. But already successful requested gpios are not freed. Reported-by: Daniel Morsing <daniel.morsing@gmail.com> Signed-off-by: Thomas Weber <weber@corscience.de> Signed-off-by: Tony Lindgren <tony@atomide.com>
2011-02-01omap1: remove duplicated #includeHuang Weiyi
Remove duplicated #include('s) in arch/arm/mach-omap1/time.c Signed-off-by: Huang Weiyi <weiyi.huang@gmail.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2011-02-01arm: mach-omap2: mux: free allocated memory on error exitAaro Koskinen
Free allocated memory on error exit. Signed-off-by: Aaro Koskinen <aaro.koskinen@nokia.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2011-02-01arm: mach-omap2: board-rm680: fix rm680_vemmc regulator constraintsAaro Koskinen
With the commit 757902513019e6ee469791ff76f954b19ca8d036 (regulator: Factor out voltage set operation into a separate function) fixed voltage regulator setup will fail if there are voltage constraints defined. This made MMC unusable on this board. Fix by just deleting those redundant constraints. Signed-off-by: Aaro Koskinen <aaro.koskinen@nokia.com> Reviewed-by: Jarkko Nikula <jhnikula@gmail.com> [tony@atomide.com: updated comments] Signed-off-by: Tony Lindgren <tony@atomide.com>
2011-02-01Merge branch 'next' of git://git.monstr.eu/linux-2.6-microblazeLinus Torvalds
* 'next' of git://git.monstr.eu/linux-2.6-microblaze: microblaze: Fix ASM optimized code for LE microblaze: Fix unaligned issue on MMU system with BS=0 DIV=1 microblaze: Fix DTB passing from bootloader
2011-02-01ARM: mxs/imx28: remove now unused clock lookup "fec.0"Uwe Kleine-König
Commit b2878fa (ARM: mx28: update clock and device name for dual fec support) added only the new lookups without removing the old one. Cc: Shawn Guo <shawn.guo@freescale.com> Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Acked-by: Shawn Guo <shawn.guo@freescale.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2011-02-01ARM: mxs: fix clock base address missingShawn Guo
Signed-off-by: Shawn Guo <shawn.guo@freescale.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2011-01-31Merge branch 'fixes' of master.kernel.org:/home/rmk/linux-2.6-armLinus Torvalds
* 'fixes' of master.kernel.org:/home/rmk/linux-2.6-arm: ARM: smp_on_up: allow non-ARM SMP processors ARM: io: ensure inb/outb() et.al. are properly ordered on ARMv6+ ARM: initrd: disable initrd if passed address overlaps reserved region ARM: footbridge: fix debug macros ARM: mmci: round down the bytes transferred on error ARM: mmci: complete the transaction on error ARM: 6642/1: mmci: calculate remaining bytes at error correctly
2011-01-31Merge branch 'omap-fixes-for-linus' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap-2.6 * 'omap-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap-2.6: arch/arm/mach-omap2/dma.c: Convert IS_ERR result to PTR_ERR arm: omap2: mux: fix compile warning omap1: Simplify use of omap_irq_flags omap2+: Fix unused variable warning for omap_irq_base
2011-01-31ARM: smp_on_up: allow non-ARM SMP processorsRussell King
Allow non-ARM SMP processors to use the SMP_ON_UP feature. CPUs supporting SMP must have the new CPU ID format, so check for this first. Then check for ARM11MPCore, which fails the MPIDR check. Lastly check the MPIDR reports multiprocessing extensions and that the CPU is part of a multiprocessing system. Cc: <stable@kernel.org> Reported-and-Tested-by: Stephen Boyd <sboyd@codeaurora.org> Acked-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2011-01-31Merge branch 'for_2.6.38/pm-fixes' of ↵Tony Lindgren
ssh://master.kernel.org/pub/scm/linux/kernel/git/khilman/linux-omap-pm into devel-fixes
2011-01-31OMAP: PM: SmartReflex: Fix possible null pointer read accessStefan Weil
These errors were found by cppcheck: arch/arm/mach-omap2/smartreflex.c:784: error: Possible null pointer dereference: sr_info arch/arm/mach-omap2/smartreflex.c:799: error: Possible null pointer dereference: sr_info Both conditional statements are executed when sr_info == NULL, so accessing sr_info->voltdm would fail. Cc: Russell King <linux@arm.linux.org.uk> Cc: linux-omap@vger.kernel.org Cc: linux-arm-kernel@lists.infradead.org Cc: linux-kernel@vger.kernel.org Signed-off-by: Stefan Weil <weil@mail.berlios.de> Signed-off-by: Kevin Hilman <khilman@ti.com>
2011-01-31OMAP: PM: SmartReflex: Fix possible memory leakStefan Weil
sr_info was allocated and needs a kfree before returning. This error was reported by cppcheck: arch/arm/mach-omap2/smartreflex.c:837: error: Memory leak: sr_info To: Tony Lindgren <tony@atomide.com> Cc: Russell King <linux@arm.linux.org.uk> Cc: linux-omap@vger.kernel.org Cc: linux-arm-kernel@lists.infradead.org Cc: linux-kernel@vger.kernel.org Signed-off-by: Stefan Weil <weil@mail.berlios.de> Acked-by: Shweta Gulati <shweta.gulati@ti.com> Signed-off-by: Kevin Hilman <khilman@ti.com>
2011-01-31arm: mach-omap2: voltage: debugfs: fix memory leakAaro Koskinen
The temporary string holding the directory name to be created should be released. Signed-off-by: Aaro Koskinen <aaro.koskinen@nokia.com> Signed-off-by: Kevin Hilman <khilman@ti.com>
2011-01-31ARM: io: ensure inb/outb() et.al. are properly ordered on ARMv6+Russell King
Ensure that the ISA/PCI IO space accessors are properly ordered on ARMv6+ architectures. These should always be ordered with respect to all other accesses. This also fixes __iormb() and __iowmb() not being visible to ioread/ iowrite if a platform defines its own MMIO accessors. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2011-01-31ARM: initrd: disable initrd if passed address overlaps reserved regionRussell King
Disable the initrd if the passed address already overlaps the reserved region. This avoids oopses on Netwinders when NeTTrom tells the kernel that an initrd is located at mem+4MB, but this overlaps the BSS, resulting in the kernels in-use BSS being freed. This should be applied to v2.6.37-stable. Cc: <stable@kernel.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2011-01-31ARM: footbridge: fix debug macrosRussell King
0ea1293 (arm: return both physical and virtual addresses from addruart) changed the way the 'addruart' worked, making it return both the virt and phys addresses. Unfortunately, for footbridge, these were reversed. Fix that. Tested on Netwinder. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2011-01-31[S390] reset default for CONFIG_CHSC_SCHSebastian Ott
6f9a3c33 "[S390] cleanup s390 Kconfig" accidentally changed the default for CONFIG_CHSC_SCH. Reset it to m. Signed-off-by: Sebastian Ott <sebott@linux.vnet.ibm.com> Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
2011-01-31[S390] use asm-generic/cacheflush.hAkinobu Mita
The implementation of the cache flushing interfaces on the s390 is identical with the default implementation in asm-generic. Signed-off-by: Akinobu Mita <akinobu.mita@gmail.com> Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
2011-01-31[S390] tlb: fix build error caused by THPHeiko Carstens
Fix this build error with !CONFIG_SWAP caused by tranparent huge pages support: In file included from mm/pgtable-generic.c:9:0: /linux-2.6/arch/s390/include/asm/tlb.h: In function 'tlb_remove_page': /linux-2.6/arch/s390/include/asm/tlb.h:92:2: error: implicit declaration of function 'page_cache_release' Signed-off-by: Heiko Carstens <heiko.carstens@de.ibm.com> Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
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