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2014-03-17fsl_pci_ep: add VF ATMU access supportMinghuan Lian
All VFs of a PF share the common inbound/outbound windows except translation registers of outbound windows. A VF can only change translation registers of outbound windows. A PF can change all ATMU of VF. The patch provides VF ATMU register definition and provides interfaces to access inbound/outbound windows. It also adds PCI_EP_REGION_MEM type to return PF's memory resource. The application can get and reassign the memory resource to VF. Signed-off-by: Minghuan Lian <Minghuan.Lian@freescale.com> Change-Id: Iec877a8054ac47b64d9d94abb9bc32dc0450211e Reviewed-on: http://git.am.freescale.net:8181/9604 Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com> Reviewed-by: Tiefei Zang <tie-fei.zang@freescale.com> Reviewed-by: Jose Rivera <German.Rivera@freescale.com>
2014-03-17fman/dts: fix compatible of mdio node for fman v3Shaohui Xie
Mdio node's compatible for each MAC should be "fsl,fman-memac-mdio" instead of "fsl,fman-memac-tbi" in fman v3. Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com> Change-Id: I848527f67b4e5d033fcfbb739d78341de576f6d0 Reviewed-on: http://git.am.freescale.net:8181/9661 Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com> Reviewed-by: Tiefei Zang <tie-fei.zang@freescale.com> Reviewed-by: Jose Rivera <German.Rivera@freescale.com>
2014-03-17powerpc/t4240/dts: add XFI PHY device nodes for 10GBASE-KRShaohui Xie
10GBASE-KR use XFI PCS(Physical Coding Sublayer) module. Each PCS is driven by the corresponding MAC's MDIO. 10GBASE-KR will use PCS module to do auto-negotiation and link training. So, add XFI PHY device nodes for each 10G MAC. Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com> Change-Id: I69609ff42eba95dbed978850bf07fe0c360c9ce2 Reviewed-on: http://git.am.freescale.net:8181/9664 Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com> Reviewed-by: Tiefei Zang <tie-fei.zang@freescale.com> Reviewed-by: Jose Rivera <German.Rivera@freescale.com>
2014-03-17powerpc/pci: Fix IMMRBAR addressMinghuan Lian
For PEXCSRBAR, bits 3-0 indicate prefetchable and address type. So when getting base address, these bits should be masked, otherwise we may get incorrect base address. Signed-off-by: Minghuan Lian <Minghuan.Lian@freescale.com> Change-Id: I03ca7c1201cf0de1042173488e9e8dd4c48faf6e Reviewed-on: http://git.am.freescale.net:8181/9818 Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com> Reviewed-by: Tiefei Zang <tie-fei.zang@freescale.com> Reviewed-by: Jose Rivera <German.Rivera@freescale.com>
2014-03-17mpc85xx: Expand the size of u-boot Bootloader ImageYing Zhang
Because the size of u-boot Bootloader gets bigger, this patch adjust the size for NAND bootloader to 768KB and adjust the size for SPI bootloader to 1MB. Signed-off-by: Ying Zhang <b40530@freescale.com> Change-Id: Ida21977b15cc25c9e2667138222537b3af7138c7 Reviewed-on: http://git.am.freescale.net:8181/9454 Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com> Reviewed-by: Xiaobo Xie <X.Xie@freescale.com> Reviewed-by: Jose Rivera <German.Rivera@freescale.com>
2014-03-13powerpc/t2080rdb: Add T2080RDB board supportShengzhou Liu
T2080PCIe-RDB is a Freescale Reference Design Board that hosts the T2080 SoC. The board feature overview: Processor: - T2080 SoC integrating four 64-bit dual-threads e6500 cores up to 1.8GHz DDR Memory: - Single memory controller capable of supporting DDR3 and DDR3-LP devices - 72bit 4GB DDR3-LP SODIMM in slot Ethernet interfaces: - Two 10M/100M/1Gbps RGMII ports on-board - Two 10Gbps SFP+ ports on-board - Two 10Gbps Base-T ports on-board Accelerator: - DPAA components consist of FMan, BMan, QMan, PME, DCE and SEC SerDes 16 lanes configuration: - SerDes-1 Lane A-B: to two 10G SFP+ (MAC9 & MAC10) - SerDes-1 Lane C-D: to two 10G Base-T (MAC1 & MAC2) - SerDes-1 Lane E-H: to PCIe goldfinger (PCIe1 x4, Gen3) - SerDes-2 Lane A-D: to PCIe connector (PCIe4 x4, Gen3) - SerDes-2 Lane E-F: to C293 secure co-processor (PCIe2 x2) - SerDes-2 Lane G-H: to SATA1 & SATA2 IFC/Local Bus - NOR: 128MB 16-bit NOR flash - NAND: 1GB 8-bit NAND flash - CPLD: for system controlling with programable header on-board eSPI: - 64MB N25Q512 SPI flash USB: - Two USB2.0 ports with internal PHY (both Type-A) PCIe: - One PCIe x4 gold-finger - One PCIe x4 connector - One PCIe x2 end-point device (C293 crypto co-processor) SATA: - Two SATA 2.0 ports on-board SDHC: - support a TF-card on-board I2C: - Four I2C controllers. UART: - Dual 4-pins UART serial ports This board can work in two mode: standalone mode and PCIe endpoint mode. Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com> Change-Id: Id30adfba9b78b0707aecae33dbc03a44e4c38b59 Reviewed-on: http://git.am.freescale.net:8181/9459 Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com> Reviewed-by: Xiaobo Xie <X.Xie@freescale.com> Reviewed-by: Jose Rivera <German.Rivera@freescale.com>
2014-03-13t2080qds : Add USDPAA device trees for T2080QDSKuldip Giroh
- 42G configuration (4x10G + 2x1G) is selected for USDPAA. - Add USDPAA device tree for shared MAC and macless interfaces also. 10GEC4 is made shared MAC in the tree. Signed-off-by: Kuldip Giroh <kuldip.giroh@freescale.com> Change-Id: Iff57cc9a722f0cde187f841ab7e5001d9ef2dd28 Reviewed-on: http://git.am.freescale.net:8181/6911 Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com> Reviewed-by: Vakul Garg <vakul@freescale.com> Reviewed-by: Jose Rivera <German.Rivera@freescale.com> (cherry picked from commit 662f83e43b86d291026251eb080a599c142f0040) Reviewed-on: http://git.am.freescale.net:8181/9652 Reviewed-by: Sandeep Singh <sandeep@freescale.com>
2014-03-12powerpc/85xx/dts: add third elo3 dma componentShengzhou Liu
Add elo3-dma-2.dtsi to support the third DMA controller. This is used on T2080, T4240, B4860, etc. FSL MPIC v4.3 adds a new discontiguous address range for internal interrupts, e.g. internal interrupt 0 is at offset 0x200 and thus interrupt number is: 0x200 >> 5 = 16 in the device tree. DMA controller 3 channel 0 internal interrupt 240 is at offset 0x3a00, and thus the corresponding interrupt number is: 0x3a00 >> 5 = 464, it's similar for other 7 interrupt numbers of DMA 3 channels. Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com> Signed-off-by: Hongbo Zhang <hongbo.zhang@freescale.com> Change-Id: Iee7019bb1729274327db598d935c0c5560fc2418 Reviewed-on: http://git.am.freescale.net:8181/9455 Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com> Reviewed-by: Xiaobo Xie <X.Xie@freescale.com> Reviewed-by: Jose Rivera <German.Rivera@freescale.com>
2014-03-12powerpc/t2081qds: Add ethernet supportShengzhou Liu
Add T2081QDS Ethernet configuration to support RGMII, SGMII, XFI. Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com> Change-Id: I347a2e000d0ed616e33fdb96bfbda8f6c25b6d3b Reviewed-on: http://git.am.freescale.net:8181/8971 Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com> Reviewed-by: Xiaobo Xie <X.Xie@freescale.com> Reviewed-by: Jose Rivera <German.Rivera@freescale.com> Reviewed-on: http://git.am.freescale.net:8181/9460
2014-03-12powerpc/t2080qds: add dpaa ethernet and rman nodesShengzhou Liu
- Add DPAA related nodes for ethernet on T2080QDS - Add RMan node Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com> Change-Id: I1f92de8d646b8ea08ddbb582660e7a14eba9af13 Reviewed-on: http://git.am.freescale.net:8181/9458 Reviewed-by: Xiaobo Xie <X.Xie@freescale.com> Reviewed-by: Jose Rivera <German.Rivera@freescale.com> Tested-by: Jose Rivera <German.Rivera@freescale.com>
2014-03-12powerpc/fsl-booke: Add initial T208x QDS board supportShengzhou Liu
Add support for Freescale T2080/T2081 QDS Development System Board. T2081QDS board shares the same PCB with T1040QDS with some differences. The T2080QDS Development System is a high-performance computing, evaluation, and development platform that supports T2080 QorIQ Power Architecture processor, with following major features: T2080QDS feature overview: Processor: - T2080 SoC integrating four 64-bit dual-threads e6500 cores up to 1.8GHz Memory: - Single memory controller capable of supporting DDR3 and DDR3-LV devices - Two DDR3 memory, 4GB, Dual rank @ 1866 Mbps data rate, and ECC support Ethernet interfaces: - Two 1Gbps RGMII on-board ports - Four 10Gbps XFI on-board cages - 1Gbps/2.5Gbps SGMII Riser card - 10Gbps XAUI Riser card Accelerator: - DPAA components consist of FMan, BMan, QMan, PME, DCE and SEC SerDes: - 16 lanes up to 10.3125GHz - Supports Aurora debug, PEX, SATA, SGMII, sRIO, HiGig, XFI and XAUI IFC: - 128MB NOR Flash, 512MB NAND Flash, PromJet debug port and FPGA eSPI: - Three SPI flash (16MB N25Q128A + 16MB EN25S64 + 512KB SST25WF040) USB: - Two USB2.0 ports with internal PHY (one Type-A + one micro Type-AB) PCIE: - Four PCI Express controllers (two PCIe 2.0 and two PCIe 3.0) SATA: - Two SATA 2.0 ports on-board SRIO: - Two Serial RapidIO 2.0 ports up to 5 GHz eSDHC: - Supports SD/MMC/eMMC Card DMA: - Three 8-channels DMA controllers I2C: - Four I2C controllers. UART: - Dual 4-pins UART serial ports System Logic: - QIXIS-II FPGA system controll Differences between T2080 and T2081: Feature T2080 T2081 1G Ethernet numbers: 8 6 10G Ethernet numbers: 4 2 SerDes lanes: 16 8 Serial RapidIO,RMan: 2 no SATA Controller: 2 no Aurora: yes no SoC Package: 896-pins 780-pins Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com> Change-Id: I957e25509ee47dab0d8e9d780241728358c609a5 Reviewed-on: http://git.am.freescale.net:8181/9457 Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com> Reviewed-by: Xiaobo Xie <X.Xie@freescale.com> Reviewed-by: Jose Rivera <German.Rivera@freescale.com>
2014-03-12powerpc/fsl-booke: Add initial device tree support for T2080/T2081 SoCShengzhou Liu
Add initial device tree for T2080/T2081 without DPAA components. The T2080 SoC includes the following function and features: - Four dual-threaded 64-bit Power architecture e6500 cores, up to 1.8GHz - 2MB L2 cache and 512KB CoreNet platform cache (CPC) - Hierarchical interconnect fabric - One 32-/64-bit DDR3/3L SDRAM memory controllers with ECC and interleaving - Data Path Acceleration Architecture (DPAA) incorporating acceleration - 16 SerDes lanes up to 10.3125 GHz - 8 Ethernet interfaces (multiple 1G/2.5G/10G MACs) - High-speed peripheral interfaces - Four PCI Express controllers (two PCIe 2.0 and two PCIe 3.0) - Two Serial RapidIO 2.0 controllers/ports running at up to 5 GHz - Additional peripheral interfaces - Two serial ATA (SATA 2.0) controllers - Two high-speed USB 2.0 controllers with integrated PHY - Enhanced secure digital host controller (SD/SDXC/eMMC) - Enhanced serial peripheral interface (eSPI) - Four I2C controllers - Four 2-pin UARTs or two 4-pin UARTs - Integrated Flash Controller supporting NAND and NOR flash - Three eight-channel DMA engines - Support for hardware virtualization and partitioning enforcement - QorIQ Platform's Trust Architecture 2.0 T2081 personality is a reduced personality of T2080 without SATA, sRIO, RMan, Aurora, and with less SerDes lanes and ethernet interfaces. Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com> Change-Id: Idb3b97d617fc2dd9ce6c778560f95d44542bbdfd Reviewed-on: http://git.am.freescale.net:8181/9456 Reviewed-by: Xiaobo Xie <X.Xie@freescale.com> Reviewed-by: Jose Rivera <German.Rivera@freescale.com> Tested-by: Jose Rivera <German.Rivera@freescale.com>
2014-03-11Entry of CEETM in DTS fileGanga Negi
Adding details regarding CEETM QDisc qportal in DTS file. Signed-off-by: Ganga Negi <ganga.negi@freescale.com> CQ: ENGR299854 Change-Id: I36bc185227bfef275470be001deb5bebb6a151b9 Reviewed-on: http://git.am.freescale.net:8181/9510 Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com> Reviewed-by: Haiying Wang <Haiying.Wang@freescale.com> Reviewed-by: Jose Rivera <German.Rivera@freescale.com>
2014-03-07fmd: extend workaround of fman reset on t208x and t4160v2Shengzhou Liu
The same hang issue was observed on T208x and T4160v2 also. So extend the workaround for now. Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com> Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com> Signed-off-by: Mandy Lavi <mandy.lavi@freescale.com> Change-Id: If75d58a3d609f3607050c0cf306d9c86aa69cfaf Reviewed-on: http://git.am.freescale.net:8181/7205 Reviewed-by: Jose Rivera <German.Rivera@freescale.com> Tested-by: Jose Rivera <German.Rivera@freescale.com> Reviewed-on: http://git.am.freescale.net:8181/9450 Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com>
2014-03-07FMD: DSAR: Added dsar device tree sourceEyal Harari
Change-Id: I1da08cec47972011c871796ab0d1b7a8fbe3024e Signed-off-by: Eyal Harari <Eyal.Harari@freescale.com> Reviewed-on: http://git.am.freescale.net:8181/9306 Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com> Reviewed-by: Mandy Lavi <Mandy.Lavi@freescale.com> Reviewed-by: Sunil Kumar Kori <Sunil.Kori@freescale.com> Reviewed-by: Jose Rivera <German.Rivera@freescale.com> Reviewed-on: http://git.am.freescale.net:8181/9447 Tested-by: Jose Rivera <German.Rivera@freescale.com>
2014-02-26powerpc/corenet: Enable muxing MDIO buses via GPIOShruti Kanetkar
P4080 DS is using GPIO(s) to mux the on board MDIO buses. The P4080 DS is the only board that uses GPIO(s) for MDIO muxing and commit '431f241 qoriq: Enable muxing MDIO buses' missed this particular board Signed-off-by: Shruti Kanetkar <Shruti@Freescale.com> Change-Id: I6e085b131e0cec1dadeda8f2c31b4b81f6587640 Reviewed-on: http://git.am.freescale.net:8181/9080 Reviewed-by: Madalin-Cristian Bucur <madalin.bucur@freescale.com> Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com> Reviewed-by: Emilian Medve <Emilian.Medve@freescale.com> Reviewed-by: Marian-Cornel Chereji <marian.chereji@freescale.com> Reviewed-by: Jose Rivera <German.Rivera@freescale.com>
2014-02-26powerpc/mpc85xx: move the cpufreq driver to drivers/cpufreq/Zhao Chenhui
Change-Id: I83eb8533d747a5da8c06df54398db1a43b22fe4b Signed-off-by: Zhao Chenhui <chenhui.zhao@freescale.com> Reviewed-on: http://git.am.freescale.net:8181/8744 Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com> Reviewed-by: Yang Li <LeoLi@freescale.com> Reviewed-by: Jose Rivera <German.Rivera@freescale.com>
2014-02-26powerpc/mpc85xx: fix compile error in cpufreq-jog.cZhao Chenhui
These compile errors are caused by the changes of the internal interface of kernel. Also fix some problems found by the script checkpatch. Change-Id: Ie719d3f40f1ffcf932dd00b9c5b1b5e1bb0d1b22 Signed-off-by: Zhao Chenhui <chenhui.zhao@freescale.com> Reviewed-on: http://git.am.freescale.net:8181/8743 Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com> Reviewed-by: Yang Li <LeoLi@freescale.com> Reviewed-by: Jose Rivera <German.Rivera@freescale.com>
2014-02-26powerpc/irq: fix compilation error if CONFIG_TRACE_IRQFLAGS is enabledAlex Porosanu
If CONFIG_TRACE_IRQFLAGS is set to 'y' in the kernel configuration file, then compilation will fail with the following error message: CC arch/powerpc/kernel/irq.o arch/powerpc/kernel/irq.c: In function 'arch_local_irq_restore': arch/powerpc/kernel/irq.c:233:2: error: 'else' without a previous 'if' make[1]: *** [arch/powerpc/kernel/irq.o] Error 1 make: *** [arch/powerpc/kernel] Error 2 This is due to the fact that the __hard_irq_disable() macro used if erratum A006198 is not enabled has a trailing semicolon. This leads to having two statements instead of one in arch/powerpc/kernel/irq.c: ... if (unlikely(irq_happened != PACA_IRQ_HARD_DIS)) __hard_irq_disable(); else { ... The 2nd semicolon (coming from the code above) signals the end of the braceless "if", which leaves the subsequent "else" without a corresponding "if", which is exactly what the compiler complains about. This patch removes the trailing semicolon from the __hard_irq_disable() macro. Change-Id: If223ee6f85f3f0e0bd0883ccf3ea95768cb6e69e Signed-off-by: Alex Porosanu <alexandru.porosanu@freescale.com> Reviewed-on: http://git.am.freescale.net:8181/8547 Reviewed-by: Scott Wood <scottwood@freescale.com> Reviewed-by: Jose Rivera <German.Rivera@freescale.com> Tested-by: Jose Rivera <German.Rivera@freescale.com>
2014-02-18powerpc/85xx: add sysfs for pw20 state and altivec idleWang Dongsheng
Add a sys interface to enable/diable pw20 state or altivec idle, and control the wait entry time. Enable/Disable interface: 0, disable. 1, enable. /sys/devices/system/cpu/cpuX/pw20_state /sys/devices/system/cpu/cpuX/altivec_idle Set wait time interface:(Nanosecond) /sys/devices/system/cpu/cpuX/pw20_wait_time /sys/devices/system/cpu/cpuX/altivec_idle_wait_time Example: Base on TBfreq is 41MHZ. 1~48(ns): TB[63] 49~97(ns): TB[62] 98~195(ns): TB[61] 196~390(ns): TB[60] 391~780(ns): TB[59] 781~1560(ns): TB[58] ... Signed-off-by: Wang Dongsheng <dongsheng.wang@freescale.com> [scottwood@freescale.com: change ifdef] Signed-off-by: Scott Wood <scottwood@freescale.com> Change-Id: Ief3f07f89902f8f3c1a40feefc0b6f1fb9bb9eb3 Reviewed-on: http://git.am.freescale.net:8181/8666 Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com> Reviewed-by: Yang Li <LeoLi@freescale.com> Reviewed-by: Jose Rivera <German.Rivera@freescale.com> Reviewed-on: http://git.am.freescale.net:8181/8896
2014-02-13powerpc/pci: Remove the calling pcibios_setup_devices() in ↵Chunhe Lan
pcibios_enable_device() For devices which are hot-plugged, when they are re-scanned, the pcibios_setup_device is called from pcibios_add_device if bus setup is complete. So remove the calling pcibios_setup _devices() from pcibios_enable_device(). With this change, device setup code is called exactly once for both static and hot plugged devices. Signed-off-by: Chunhe Lan <Chunhe.Lan@freescale.com> Change-Id: I5b29412daabbb8ebebc0d198fa3bf30889a7e58c Reviewed-on: http://git.am.freescale.net:8181/8706 Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com> Reviewed-by: Scott Wood <scottwood@freescale.com> Reviewed-by: Jose Rivera <German.Rivera@freescale.com>
2014-01-10powerpc/fsl-booke: Use SPRN_SPRGn rather than mfsprg/mtsprgScott Wood
This fixes a build break that was probably introduced with the removal of -Wa,-me500 (commit f49596a4cf4753d13951608f24f939a59fdcc653), where the assembler refuses to recognize SPRG4-7 with a generic PPC target. Signed-off-by: Scott Wood <scottwood@freescale.com> Cc: Dongsheng Wang <dongsheng.wang@freescale.com> Cc: Anton Vorontsov <avorontsov@mvista.com> Change-Id: I386dd50ee6718c12e8a6d8fc261200d0dfddd6bd Reviewed-on: http://git.am.freescale.net:8181/7610 Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com> Reviewed-by: Dongsheng Wang <dongsheng.wang@freescale.com> Reviewed-by: Jose Rivera <German.Rivera@freescale.com>
2014-01-07powerpc/e6500: Use CORENET_GENERICEmil Medve
As per '9e096757 powerpc/85xx: use one kernel option for all the CoreNet_Generic boards' drivers/edac/mpc85xx_edac.c: In function ‘mpc85xx_mc_clear_rfxe’: drivers/edac/mpc85xx_edac.c:1228:103: error: ‘HID1_RFXE’ undeclared (first use in this function) mtspr(SPRN_HID1, (orig_hid1[smp_processor_id()] & ~HID1_RFXE)); ^ Signed-off-by: Chunhe Lan <Chunhe.Lan@freescale.com> Signed-off-by: Emil Medve <Emilian.Medve@Freescale.com> Change-Id: Icedce355da55a2b1f32e3ba1d323b00fec2ca922 Reviewed-on: http://git.am.freescale.net:8181/7626 Reviewed-by: Emilian Medve <Emilian.Medve@freescale.com> Tested-by: Emilian Medve <Emilian.Medve@freescale.com>
2014-01-07powerpc/83xx: fix pci build breakScott Wood
Apparently part of upstream commit b37e161388ac3980d5dfb73050e85874b84253eb ("powerpc/pci: Fix boot panic on mpc83xx (regression)") got lost when merging 3.13-rc3. arch/powerpc/sysdev/fsl_pci.c: In function 'mpc83xx_add_bridge': arch/powerpc/sysdev/fsl_pci.c:879:3: error: implicit declaration of function 'fsl_setup_indirect_pci' Signed-off-by: Scott Wood <scottwood@freescale.com> Change-Id: Id1ecb29be87fe814a1dda5ffba61eb2a342e2669 Reviewed-on: http://git.am.freescale.net:8181/7611 Reviewed-by: Emilian Medve <Emilian.Medve@freescale.com> Tested-by: Emilian Medve <Emilian.Medve@freescale.com>
2014-01-06PPC: POWERNV: move iommu_add_device earlierAlexey Kardashevskiy
The current implementation of IOMMU on sPAPR does not use iommu_ops and therefore does not call IOMMU API's bus_set_iommu() which 1) sets iommu_ops for a bus 2) registers a bus notifier Instead, PCI devices are added to IOMMU groups from subsys_initcall_sync(tce_iommu_init) which does basically the same thing without using iommu_ops callbacks. However Freescale PAMU driver (https://lkml.org/lkml/2013/7/1/158) implements iommu_ops and when tce_iommu_init is called, every PCI device is already added to some group so there is a conflict. This patch does 2 things: 1. removes the loop in which PCI devices were added to groups and adds explicit iommu_add_device() calls to add devices as soon as they get the iommu_table pointer assigned to them. 2. moves a bus notifier to powernv code in order to avoid conflict with the notifier from Freescale driver. iommu_add_device() and iommu_del_device() are public now. Signed-off-by: Alexey Kardashevskiy <aik@ozlabs.ru> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
2014-01-01powerpc/b4860: Fix merge duplicationEmil Medve
d31c342 Merge branch 'sdk-kernel-3.8' into master Signed-off-by: Emil Medve <Emilian.Medve@Freescale.com> Change-Id: I9d5f3f45bfe4b01583ba0469a405dac13b723aac Reviewed-on: http://git.am.freescale.net:8181/4680 Reviewed-by: Emilian Medve <Emilian.Medve@freescale.com> Tested-by: Emilian Medve <Emilian.Medve@freescale.com>
2013-12-14Merge remote-tracking branch 'origin/master' into mergeScott Wood
Conflicts: arch/powerpc/boot/dts/b4qds.dts drivers/crypto/caam/Makefile
2013-12-14Merge remote-tracking branch 'linus/master' into mergeScott Wood
Conflicts: Documentation/hwmon/ina2xx arch/powerpc/Kconfig arch/powerpc/boot/dts/b4860emu.dts arch/powerpc/boot/dts/b4qds.dtsi arch/powerpc/boot/dts/fsl/b4si-post.dtsi arch/powerpc/boot/dts/fsl/qoriq-sec6.0-0.dtsi arch/powerpc/boot/dts/p1023rdb.dts arch/powerpc/boot/dts/t4240emu.dts arch/powerpc/boot/dts/t4240qds.dts arch/powerpc/configs/85xx/p1023_defconfig arch/powerpc/configs/corenet32_smp_defconfig arch/powerpc/configs/corenet64_smp_defconfig arch/powerpc/configs/mpc85xx_smp_defconfig arch/powerpc/include/asm/cputable.h arch/powerpc/include/asm/device.h arch/powerpc/include/asm/epapr_hcalls.h arch/powerpc/include/asm/kvm_host.h arch/powerpc/include/asm/mpic.h arch/powerpc/include/asm/pci.h arch/powerpc/include/asm/ppc-opcode.h arch/powerpc/include/asm/ppc_asm.h arch/powerpc/include/asm/reg_booke.h arch/powerpc/kernel/epapr_paravirt.c arch/powerpc/kernel/process.c arch/powerpc/kernel/prom.c arch/powerpc/kernel/setup-common.c arch/powerpc/kernel/setup_32.c arch/powerpc/kernel/setup_64.c arch/powerpc/kernel/smp.c arch/powerpc/kernel/swsusp_asm64.S arch/powerpc/kernel/swsusp_booke.S arch/powerpc/kvm/book3s_pr.c arch/powerpc/kvm/booke.c arch/powerpc/kvm/booke.h arch/powerpc/kvm/e500.c arch/powerpc/kvm/e500.h arch/powerpc/kvm/e500_emulate.c arch/powerpc/kvm/e500mc.c arch/powerpc/kvm/powerpc.c arch/powerpc/perf/e6500-pmu.c arch/powerpc/platforms/85xx/Kconfig arch/powerpc/platforms/85xx/Makefile arch/powerpc/platforms/85xx/b4_qds.c arch/powerpc/platforms/85xx/c293pcie.c arch/powerpc/platforms/85xx/corenet_ds.c arch/powerpc/platforms/85xx/corenet_ds.h arch/powerpc/platforms/85xx/p1023_rds.c arch/powerpc/platforms/85xx/p2041_rdb.c arch/powerpc/platforms/85xx/p3041_ds.c arch/powerpc/platforms/85xx/p4080_ds.c arch/powerpc/platforms/85xx/p5020_ds.c arch/powerpc/platforms/85xx/p5040_ds.c arch/powerpc/platforms/85xx/smp.c arch/powerpc/platforms/85xx/t4240_qds.c arch/powerpc/platforms/Kconfig arch/powerpc/sysdev/Makefile arch/powerpc/sysdev/fsl_mpic_timer_wakeup.c arch/powerpc/sysdev/fsl_msi.c arch/powerpc/sysdev/fsl_pci.c arch/powerpc/sysdev/fsl_pci.h arch/powerpc/sysdev/fsl_soc.h arch/powerpc/sysdev/mpic.c arch/powerpc/sysdev/mpic_timer.c drivers/Kconfig drivers/clk/Kconfig drivers/clk/clk-ppc-corenet.c drivers/cpufreq/Kconfig.powerpc drivers/cpufreq/Makefile drivers/cpufreq/ppc-corenet-cpufreq.c drivers/crypto/caam/Kconfig drivers/crypto/caam/Makefile drivers/crypto/caam/ctrl.c drivers/crypto/caam/desc_constr.h drivers/crypto/caam/intern.h drivers/crypto/caam/jr.c drivers/crypto/caam/regs.h drivers/dma/fsldma.c drivers/hwmon/ina2xx.c drivers/iommu/Kconfig drivers/iommu/fsl_pamu.c drivers/iommu/fsl_pamu.h drivers/iommu/fsl_pamu_domain.c drivers/iommu/fsl_pamu_domain.h drivers/misc/Makefile drivers/mmc/card/block.c drivers/mmc/core/core.c drivers/mmc/host/sdhci-esdhc.h drivers/mmc/host/sdhci-pltfm.c drivers/mtd/nand/fsl_ifc_nand.c drivers/net/ethernet/freescale/gianfar.c drivers/net/ethernet/freescale/gianfar.h drivers/net/ethernet/freescale/gianfar_ethtool.c drivers/net/phy/at803x.c drivers/net/phy/phy_device.c drivers/net/phy/vitesse.c drivers/pci/msi.c drivers/staging/Kconfig drivers/staging/Makefile drivers/uio/Kconfig drivers/uio/Makefile drivers/uio/uio.c drivers/usb/host/ehci-fsl.c drivers/vfio/Kconfig drivers/vfio/Makefile include/crypto/algapi.h include/linux/iommu.h include/linux/mmc/sdhci.h include/linux/msi.h include/linux/netdev_features.h include/linux/phy.h include/linux/skbuff.h include/net/ip.h include/uapi/linux/vfio.h net/core/ethtool.c net/ipv4/route.c net/ipv6/route.c
2013-12-09Merge tag 'arm64-stable' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/cmarinas/linux-aarch64 Pull ARM64 fixes from Catalin Marinas: - Page table fixes (PROT_NONE, shareability attribute, TLB invalidation) - Secondary CPUs entry endianness fix - Make NR_CPUS default to 8 * tag 'arm64-stable' of git://git.kernel.org/pub/scm/linux/kernel/git/cmarinas/linux-aarch64: arm64: mm: Fix PMD_SECT_PROT_NONE definition arm64: Fix memory shareability attribute for ioremap_wc/cache arm64: kernel: add code to set cpu boot mode to secondary_entry shim arm64: make default NR_CPUS 8 arm64: ensure completion of TLB invalidatation
2013-12-06arm64: mm: Fix PMD_SECT_PROT_NONE definitionSteve Capper
Modify the value of PMD_SECT_PROT_NONE to match that of PTE_NONE. This should have been in commit 3676f9ef5481 (Move PTE_PROT_NONE higher up). Signed-off-by: Steve Capper <steve.capper@linaro.org> Cc: <stable@vger.kernel.org> # 3.11+: 3676f9ef5481: arm64: Move PTE_PROT_NONE higher up Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
2013-12-06arm64: Fix memory shareability attribute for ioremap_wc/cacheCatalin Marinas
Write-combine and cacheable mappings use Normal memory on arm64. On SMP systems, the pte needs the shareability bit which is set in pgprot_default. Use this for defining PROT_DEFAULT used by ioremap_wc and ioremap_cache (Device memory is shareable by default, does not need additional attributes). Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
2013-12-06arm64: kernel: add code to set cpu boot mode to secondary_entry shimLorenzo Pieralisi
The refactoring of el2_setup split code setting up EL2 and detecting the CPU boot mode in separate chunks. This allows the code that sets up EL2 to run in an endian independent way - ie before the endianess is set up in the respective sctlr registers. This patch brings secondary_entry up-to-date so that CPUs entering the kernel through this code path set-up EL2 and the cpu boot mode properly. Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Acked-by: Mark Rutland <mark.rutand@arm.com> Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
2013-12-06arm64: make default NR_CPUS 8Rob Herring
Rather than continue to add per platform defaults, make the default a likely common core count. 8 is also the default for x86. Signed-off-by: Rob Herring <rob.herring@calxeda.com> Cc: Will Deacon <will.deacon@arm.com> Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
2013-12-06arm64: ensure completion of TLB invalidatationMark Rutland
Currently there is no dsb between the tlbi in __cpu_setup and the write to SCTLR_EL1 which enables the MMU in __turn_mmu_on. This means that the TLB invalidation is not guaranteed to have completed at the point address translation is enabled, leading to a number of possible issues including incorrect translations and TLB conflict faults. This patch moves the tlbi in __cpu_setup above an existing dsb used to synchronise I-cache invalidation, ensuring that the TLBs have been invalidated at the point the MMU is enabled. Signed-off-by: Mark Rutland <mark.rutland@arm.com> Cc: Catalin Marinas <catalin.marinas@arm.com> Cc: Will Deacon <will.deacon@arm.com> Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
2013-12-05Merge branch 'x86/urgent' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip Pull x86 and EFI fixes from Peter Anvin: "Half of these are EFI-related: The by far biggest change is the change to hold off the deletion of a sysfs entry while a backend scan is in progress. This is to avoid calling kmemdup() while under a spinlock. The other major change is for each entry in the EFI pstore backend to get a unique identifier, as required by the pstore filesystem proper. The other changes are: A fix to the recent consolidation and optimization of using "asm goto" with read-modify-write operation, which broke the bitops; specifically in such a way that we could end up generating invalid code. A build hack to make sure we compile with -mno-sse. icc, and most likely future versions of gcc, can generate SSE instructions unless we tell it not to. A comment-only patch to a change the was due in part to an unpublished erratum; now when the erratum is published we want to add a comment explaining why" * 'x86/urgent' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: x86/apic, doc: Justification for disabling IO APIC before Local APIC x86, bitops: Correct the assembly constraints to testing bitops x86-64, build: Always pass in -mno-sse efi-pstore: Make efi-pstore return a unique id x86/efi: Fix earlyprintk off-by-one bug efivars, efi-pstore: Hold off deletion of sysfs entry until the scan is completed
2013-12-05x86/apic, doc: Justification for disabling IO APIC before Local APICFenghua Yu
Since erratum AVR31 in "Intel Atom Processor C2000 Product Family Specification Update" is now published, I added a justification comment for disabling IO APIC before Local APIC, as changed in commit: 522e66464467 x86/apic: Disable I/O APIC before shutdown of the local APIC Signed-off-by: Fenghua Yu <fenghua.yu@intel.com> Link: http://lkml.kernel.org/r/1386202069-51515-1-git-send-email-fenghua.yu@intel.com Signed-off-by: H. Peter Anvin <hpa@linux.intel.com>
2013-12-04x86, bitops: Correct the assembly constraints to testing bitopsH. Peter Anvin
In checkin: 0c44c2d0f459 x86: Use asm goto to implement better modify_and_test() functions the various functions which do modify and test were unified and optimized using "asm goto". However, this change missed the detail that the bitops require an "Ir" constraint rather than an "er" constraint ("I" = integer constant from 0-31, "e" = signed 32-bit integer constant). This would cause code to miscompile if these functions were used on constant bit positions 32-255 and the build to fail if used on constant bit positions above 255. Add the constraints as a parameter to the GEN_BINARY_RMWcc() macro to avoid this problem. Reported-by: Jesse Brandeburg <jesse.brandeburg@intel.com> Signed-off-by: H. Peter Anvin <hpa@linux.intel.com> Cc: Peter Zijlstra <peterz@infradead.org> Link: http://lkml.kernel.org/r/529E8719.4070202@zytor.com
2013-12-04Merge tag 'fixes-for-linus' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc Pull ARM SoC fixes from Olof Johansson: "Another batch of fixes for ARM SoCs for 3.13. The diffstat is large, mostly because of: - Another set of fixes to fix regressions caused by moving OMAP from board files to DT. Tony thinks this was the last major set of fixes, with maybe just a few small patches to follow. - More fixes for Marvell platforms, most dealing with misdescribed PCIe hardware, i.e. incorrect number of busses on some SoCs, etc. The line delta adds up due to various ranges moving around when this is fixed. But there's also: - Some smaller tweaks to defconfigs to make more boards bootable in my test setup for better coverage. - There are also a few other smaller fixes, a short series for at91, a couple of reverts for ux500, etc" * tag 'fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (39 commits) arm: dts: socfpga: Change some clocks of gate-clk type to perip-clk arm: socfpga: Enable ARM_TWD for socfpga ARM: multi_v7_defconfig: enable SDHCI_BCM_KONA and MMC_BLOCK_MINORS=16 ARM: sunxi_defconfig: enable NFS, TMPFS, PRINTK_TIME and nfsroot support ARM: multi_v7_defconfig: enable network for BeagleBone Black ARM: dts: Fix the name of supplies for smsc911x shared by OMAP ARM: OMAP2+: Powerdomain: Fix unchecked dereference of arch_pwrdm ARM: dts: omap3-beagle: Add omap-twl4030 audio support ARM: dts: omap4-sdp: Fix pin muxing for wl12xx ARM: dts: omap4-panda-common: Fix pin muxing for wl12xx ARM: at91: fixed unresolved symbol "at91_pm_set_standby" when built without CONFIG_PM ARM: at91: add usart3 alias to dtsi ARM: at91: sama5d3: reduce TWI internal clock frequency mmc: omap: Fix I2C dependency and make driver usable with device tree mmc: omap: Fix DMA configuration to not rely on device id ARM: dts: omap3-beagle: Fix USB host on beagle boards (for 3.13) ARM: dts: omap3-igep0020: name twl4030 VPLL2 regulator as vdds_dsi ARM: dts: AM33XX IGEP0033: add USB support ARM: dts: AM33XX BASE0033: add 32KBit EEPROM support ARM: dts: AM33XX BASE0033: add pinmux and user led support ...
2013-12-04Merge branch 'parisc-3.13' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/deller/parisc-linux Pull parsic updates from Helge Deller: - a fix for the mmap(MAP_FIXED|MAP_SHARED) syscall to the same address which was already given in a previous call (fixes locale-gen on debian) - change the memory layout of the kernel to avoid the need for the -mlong-calls compiler option (depends on commit 5ecbe3c3c690 - "kernel/extable: fix address-checks for core_kernel and init areas") - defconfig updates, e.g. use the SIL680 driver instead of the SIIMAGE driver - add more parisc machine names to the machine database * 'parisc-3.13' of git://git.kernel.org/pub/scm/linux/kernel/git/deller/parisc-linux: parisc: update 64bit defconfigs and use SIL680 instead of SIIMAGE driver parisc: remove CONFIG_MLONGCALLS=y from defconfigs parisc: fix kernel memory layout in vmlinux.ld.S parisc: use kernel_text_address() in unwind functions parisc: remove empty SERIAL_PORT_DFNS in serial.h parisc: add some more machine names to hardware database parisc: fix mmap(MAP_FIXED|MAP_SHARED) to already mmapped address
2013-12-04Merge git://git.kernel.org/pub/scm/linux/kernel/git/herbert/crypto-2.6Linus Torvalds
Pull crypto fixes from Herbert Xu: "This push fixes a number of crashes triggered by a previous crypto self-test update. It also fixes a build problem in the caam driver, as well as a concurrency issue in s390. Finally there is a pair of fixes to bugs in the crypto scatterwalk code and authenc that may lead to crashes" * git://git.kernel.org/pub/scm/linux/kernel/git/herbert/crypto-2.6: crypto: testmgr - fix sglen in test_aead for case 'dst != src' crypto: talitos - fix aead sglen for case 'dst != src' crypto: caam - fix aead sglen for case 'dst != src' crypto: ccm - Fix handling of zero plaintext when computing mac crypto: s390 - Fix aes-xts parameter corruption crypto: talitos - corrrectly handle zero-length assoc data crypto: scatterwalk - Set the chain pointer indication bit crypto: authenc - Find proper IV address in ablkcipher callback crypto: caam - Add missing Job Ring include
2013-12-04Merge branch 'timers-urgent-for-linus' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip Pull timer fixes from Thomas Gleixner: - timekeeping: Cure a subtle drift issue on GENERIC_TIME_VSYSCALL_OLD - nohz: Make CONFIG_NO_HZ=n and nohz=off command line option behave the same way. Fixes a long standing load accounting wreckage. - clocksource/ARM: Kconfig update to avoid ARM=n wreckage - clocksource/ARM: Fixlets for the AT91 and SH clocksource/clockevents - Trivial documentation update and kzalloc conversion from akpms pile * 'timers-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: nohz: Fix another inconsistency between CONFIG_NO_HZ=n and nohz=off time: Fix 1ns/tick drift w/ GENERIC_TIME_VSYSCALL_OLD clocksource: arm_arch_timer: Hide eventstream Kconfig on non-ARM clocksource: sh_tmu: Add clk_prepare/unprepare support clocksource: sh_tmu: Release clock when sh_tmu_register() fails clocksource: sh_mtu2: Add clk_prepare/unprepare support clocksource: sh_mtu2: Release clock when sh_mtu2_register() fails ARM: at91: rm9200: switch back to clockevents_config_and_register tick: Document tick_do_timer_cpu timer: Convert kmalloc_node(...GFP_ZERO...) to kzalloc_node(...) NOHZ: Check for nohz active instead of nohz enabled
2013-12-04x86-64, build: Always pass in -mno-sseH. Peter Anvin
Always pass in the -mno-sse argument, regardless if -preferred-stack-boundary is supported. We never want to generate SSE instructions in the kernel unless we *really* know what we're doing. According to H. J. Lu, any version of gcc new enough that we support it at all should handle the -mno-sse option, so just add it unconditionally. Reported-by: Kevin B. Smith <kevin.b.smith@intel.com> Signed-off-by: H. Peter Anvin <hpa@linux.intel.com> Cc: H. J. Lu <hjl.tools@gmail.com> Link: http://lkml.kernel.org/n/tip-j21wzqv790q834n7yc6g80j1@git.kernel.org Cc: <stable@vger.kernel.org> # build fix only
2013-12-03parisc: update 64bit defconfigs and use SIL680 instead of SIIMAGE driverHelge Deller
Signed-off-by: Helge Deller <deller@gmx.de>
2013-12-03arm: dts: socfpga: Change some clocks of gate-clk type to perip-clkDinh Nguyen
Some of the clocks that were designated gate-clk do not have a gate, so change those clocks to be of periph-clk type. Signed-off-by: Dinh Nguyen <dinguyen@altera.com> Signed-off-by: Olof Johansson <olof@lixom.net>
2013-12-03arm: socfpga: Enable ARM_TWD for socfpgaDinh Nguyen
Update Kconfig to enable TWD. Signed-off-by: Dinh Nguyen <dinguyen@altera.com> Reviewed-by: Pavel Machek <pavel@denx.de> Signed-off-by: Olof Johansson <olof@lixom.net>
2013-12-03ARM: multi_v7_defconfig: enable SDHCI_BCM_KONA and MMC_BLOCK_MINORS=16Olof Johansson
Enable MMC/SD on the Broadcom mobile platforms, and increase the block minors from the default 8 to 16 (since the Broadcom board by default has root on the 8th partition). Signed-off-by: Olof Johansson <olof@lixom.net> Cc: stable@vger.kernel.org # v3.12
2013-12-03ARM: sunxi_defconfig: enable NFS, TMPFS, PRINTK_TIME and nfsroot supportOlof Johansson
This enables a few more options on the sunxi defconfigs such that I can use nfsroot to boot them (there is no local storage support yet). It also enables PRINTK_TIME and tmpfs since it's a common distro requirement. Signed-off-by: Olof Johansson <olof@lixom.net>
2013-12-03Merge tag 'omap-for-v3.13/more-dt-regressions' of ↵Olof Johansson
git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into fixes From Tony Lindgren: Few more legacy booting vs device tree booting fixes that people have noticed while booting things with device tree for things like omap4 WLAN, smsc911x, and beagle audio. Hopefully this will be it for the legacy booting vs device tree fixes for this -rc cycle. * tag 'omap-for-v3.13/more-dt-regressions' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap: ARM: dts: Fix the name of supplies for smsc911x shared by OMAP ARM: OMAP2+: Powerdomain: Fix unchecked dereference of arch_pwrdm ARM: dts: omap3-beagle: Add omap-twl4030 audio support ARM: dts: omap4-sdp: Fix pin muxing for wl12xx ARM: dts: omap4-panda-common: Fix pin muxing for wl12xx
2013-12-03ARM: multi_v7_defconfig: enable network for BeagleBone BlackOlof Johansson
BeagleBone Black uses the TI CPSW ethernet controller, enable it in the multi_v7_defconfig for testing coverage purposes. Signed-off-by: Olof Johansson <olof@lixom.net> Acked-by: Tony Lindgren <tony@atomide.com> Cc: stable@vger.kernel.org # v3.12
2013-12-03Merge tag 'at91-fixes' of git://github.com/at91linux/linux-at91 into fixesOlof Johansson
From Nicolas Ferre: AT91: second round of fixes for 3.13 - reduce IP frequency for I2C on sama5d3 - missing aliases directive for USART3 on 9x5 family - a PM symbol is missing if !CONFIG_PM * tag 'at91-fixes' of git://github.com/at91linux/linux-at91: ARM: at91: fixed unresolved symbol "at91_pm_set_standby" when built without CONFIG_PM ARM: at91: add usart3 alias to dtsi ARM: at91: sama5d3: reduce TWI internal clock frequency
generated by cgit v0.10.2 at 2024-08-24 13:28:44 (GMT)