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2014-12-11Revert "crypto: caam: remove code duplication"Richard Schmitt
This reverts commit d2dfa8c0cdf585008cdf6a15c337c30e264f045e. Change-Id: Ib5504c1600f99debc2654086781d9bf904e32f63 Reviewed-on: http://git.am.freescale.net:8181/24187 Reviewed-by: Richard Schmitt <richard.schmitt@freescale.com> Tested-by: Richard Schmitt <richard.schmitt@freescale.com>
2014-12-11crypto: caam: remove code duplicationCristian Stoica
Duplicated code has already been extracted into an independent function. Replace the code with a function call Signed-off-by: Cristian Stoica <cristian.stoica@freescale.com> Change-Id: Ieb70040fe4c13d27b7a5ab4450c7550b9b74f3b3 Reviewed-on: http://git.am.freescale.net:8181/19796 Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com> Reviewed-by: Horia Ioan Geanta Neag <horia.geanta@freescale.com> Reviewed-by: Mircea Pop <mircea.pop@freescale.com> Reviewed-by: Richard Schmitt <richard.schmitt@freescale.com>
2014-12-11crypto: caamalg_qi: remove redundant checks on fast pathCristian Stoica
The function is called with arguments known at compile time. Remove runtime checks for out of bound values. Signed-off-by: Cristian Stoica <cristian.stoica@freescale.com> Change-Id: I2fe2e3d4bd3c63b81f99065b0db159a009f217e6 Reviewed-on: http://git.am.freescale.net:8181/19806 Reviewed-by: Horia Ioan Geanta Neag <horia.geanta@freescale.com> Reviewed-by: Mircea Pop <mircea.pop@freescale.com> Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com> Reviewed-by: Matthew Weigel <Matthew.Weigel@freescale.com>
2014-12-11crypto: caamhash: fix jr alloc leak on error pathCristian Stoica
Memory allocated for ctx->jrdev is freed in all error paths except when ahash_set_sh_desc(ahash) fails. Add a check for this case and free memory as appropriate. Signed-off-by: Cristian Stoica <cristian.stoica@freescale.com> Change-Id: I1c4e45a8cfdc6d24d768e90a148bb398b3d09f52 Reviewed-on: http://git.am.freescale.net:8181/19803 Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com> Reviewed-by: Horia Ioan Geanta Neag <horia.geanta@freescale.com> Reviewed-by: Mircea Pop <mircea.pop@freescale.com> Reviewed-by: Matthew Weigel <Matthew.Weigel@freescale.com>
2014-12-11crypto: caam - fix memleak in caam_jr moduleCristian Stoica
This patch fixes a memory leak that appears when caam_jr module is unloaded. Cc: <stable@vger.kernel.org> # 3.13+ Signed-off-by: Cristian Stoica <cristian.stoica@freescale.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au> (cherry picked from commit 0378c9a855bfa395f595fbfb049707093e270f69) Change-Id: I65f5e6d3611a007506d9c80c344e9467f6b20c84 Reviewed-on: http://git.am.freescale.net:8181/19794 Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com> Reviewed-by: Horia Ioan Geanta Neag <horia.geanta@freescale.com> Reviewed-by: Mircea Pop <mircea.pop@freescale.com> Reviewed-by: Matthew Weigel <Matthew.Weigel@freescale.com>
2014-12-11crypto: caam - fix mem leak in ahash_setkeyHoria Geanta
In case hash key is bigger than algorithm block size, it is hashed. In this case, memory is allocated to keep this hash in hashed_key. hashed_key has to be freed on the key_dma dma mapping error path. Signed-off-by: Horia Geanta <horia.geanta@freescale.com> Reviewed-by: Marek Vasut <marex@denx.de> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au> (cherry picked from commit 3d67be2761dc4b5b792037f296f3394a29581efc) Change-Id: Ied6b875209839897e144e93f09b77431136c9703 Reviewed-on: http://git.am.freescale.net:8181/19765 Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com> Reviewed-by: Mircea Pop <mircea.pop@freescale.com> Reviewed-by: Matthew Weigel <Matthew.Weigel@freescale.com>
2014-12-11crypto: caam - remove duplicated sg copy functionsCristian Stoica
Replace equivalent (and partially incorrect) scatter-gather functions with ones from crypto-API. The replacement is motivated by page-faults in sg_copy_part triggered by successive calls to crypto_hash_update. The following fault appears after calling crypto_ahash_update twice, first with 13 and then with 285 bytes: Unable to handle kernel paging request for data at address 0x00000008 Faulting instruction address: 0xf9bf9a8c Oops: Kernel access of bad area, sig: 11 [#1] SMP NR_CPUS=8 CoreNet Generic Modules linked in: tcrypt(+) caamhash caam_jr caam tls CPU: 6 PID: 1497 Comm: cryptomgr_test Not tainted 3.12.19-rt30-QorIQ-SDK-V1.6+g9fda9f2 #75 task: e9308530 ti: e700e000 task.ti: e700e000 NIP: f9bf9a8c LR: f9bfcf28 CTR: c0019ea0 REGS: e700fb80 TRAP: 0300 Not tainted (3.12.19-rt30-QorIQ-SDK-V1.6+g9fda9f2) MSR: 00029002 <CE,EE,ME> CR: 44f92024 XER: 20000000 DEAR: 00000008, ESR: 00000000 GPR00: f9bfcf28 e700fc30 e9308530 e70b1e55 00000000 ffffffdd e70b1e54 0bebf888 GPR08: 902c7ef5 c0e771e2 00000002 00000888 c0019ea0 00000000 00000000 c07a4154 GPR16: c08d0000 e91a8f9c 00000001 e98fb400 00000100 e9c83028 e70b1e08 e70b1d48 GPR24: e992ce10 e70b1dc8 f9bfe4f4 e70b1e55 ffffffdd e70b1ce0 00000000 00000000 NIP [f9bf9a8c] sg_copy+0x1c/0x100 [caamhash] LR [f9bfcf28] ahash_update_no_ctx+0x628/0x660 [caamhash] Call Trace: [e700fc30] [f9bf9c50] sg_copy_part+0xe0/0x160 [caamhash] (unreliable) [e700fc50] [f9bfcf28] ahash_update_no_ctx+0x628/0x660 [caamhash] [e700fcb0] [f954e19c] crypto_tls_genicv+0x13c/0x300 [tls] [e700fd10] [f954e65c] crypto_tls_encrypt+0x5c/0x260 [tls] [e700fd40] [c02250ec] __test_aead.constprop.9+0x2bc/0xb70 [e700fe40] [c02259f0] alg_test_aead+0x50/0xc0 [e700fe60] [c02241e4] alg_test+0x114/0x2e0 [e700fee0] [c022276c] cryptomgr_test+0x4c/0x60 [e700fef0] [c004f658] kthread+0x98/0xa0 [e700ff40] [c000fd04] ret_from_kernel_thread+0x5c/0x64 Signed-off-by: Cristian Stoica <cristian.stoica@freescale.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au> (cherry picked from commit 307fd543f3d23f8f56850eca1b27b1be2fe71017) Change-Id: I6d5822563f2437231def72c8a6ac37932a5139b8 Reviewed-on: http://git.am.freescale.net:8181/19763 Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com> Reviewed-by: Horia Ioan Geanta Neag <horia.geanta@freescale.com> Reviewed-by: Matthew Weigel <Matthew.Weigel@freescale.com>
2014-12-11crypto: caamctrl: fix array out of bound accessCristian Stoica
desc_len(desc) returns a result masked by a seven bits mask representing a descriptor length. The maximum length is 64 u32 words but masking allows for larger but incorrect values. This fix adds a bound check to the index of deco.descbuf array (which is smaller than the maximum of 64 words), to avoid invalid memory accesses. (based on commit 05dbe2ed7da7d67cfd8915382c2559db684a0a29) Signed-off-by: Cristian Stoica <cristian.stoica@freescale.com> Signed-off-by: Matthew Weigel <matthew.weigel@freescale.com> Change-Id: I05dbe2ed7da7d67cfd8915382c2559db684a0a29 Conflicts: drivers/crypto/caam/ctrl.c Reviewed-on: http://git.am.freescale.net:8181/19805 Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com> Reviewed-by: Matthew Weigel <Matthew.Weigel@freescale.com>
2014-12-11crypto: caamctrl refactoring: remove code duplicationCristian Stoica
Both error and normal paths call clrbits32 before returning. Put this call in a single place to avoid code duplication Signed-off-by: Cristian Stoica <cristian.stoica@freescale.com> (cherry picked from commit c75e03a2d47583e39f46c2925abd0ca79a693086) Signed-off-by: Matthew Weigel <Matthew.Weigel@freescale.com> Conflicts: drivers/crypto/caam/ctrl.c Change-Id: I3c2ec1c34215b5d2a1ee036809beaeabf724ac48 Reviewed-on: http://git.am.freescale.net:8181/24179 Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com> Reviewed-by: Matthew Weigel <Matthew.Weigel@freescale.com>
2014-12-11crypto: caam: fix sg_count searching out of boundCristian Stoica
Signed-off-by: Cristian Stoica <cristian.stoica@freescale.com> Change-Id: I0acac8a5fb22a0095ec1c347e4a100a277ac788f Reviewed-on: http://git.am.freescale.net:8181/19810 Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com> Reviewed-by: Mircea Pop <mircea.pop@freescale.com> Reviewed-by: Matthew Weigel <Matthew.Weigel@freescale.com>
2014-12-11crypto: caam: fix array out of bound accessCristian Stoica
All arrays in question have six elements but the index is seven bits wide. Make sure the index is bound by ARRAY_SIZE to avoid incorrect memory accesses Signed-off-by: Cristian Stoica <cristian.stoica@freescale.com> Change-Id: Ic1a65f55e9aa76dc7828021010bac8ebac75b565 Reviewed-on: http://git.am.freescale.net:8181/19802 Reviewed-by: Horia Ioan Geanta Neag <horia.geanta@freescale.com> Reviewed-by: Mircea Pop <mircea.pop@freescale.com> Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com> Reviewed-by: Matthew Weigel <Matthew.Weigel@freescale.com>
2014-12-11crypto: caam: fix offset field in hw sg entriesCristian Stoica
The offset field is 13 bits wide; make sure we don't overwrite more than that in the caam hardware scatter gather structure Signed-off-by: Cristian Stoica <cristian.stoica@freescale.com> Change-Id: Id590d2aa9362d58e6920d9e54076ff6f184f3815 Reviewed-on: http://git.am.freescale.net:8181/19801 Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com> Reviewed-by: Mircea Pop <mircea.pop@freescale.com> Reviewed-by: Matthew Weigel <Matthew.Weigel@freescale.com>
2014-12-11crypto: caam - fix sg_count searching out of boundHoria Geanta
In case sg_count is provided with a buffer length greater than what is in the scatterlist, it will oops. Stop the count of nents when sg is NULL. Change-Id: I3fffdf901e602d11776e4fe5eb9322d2c186a612 Signed-off-by: Horia Geanta <horia.geanta@freescale.com> Reviewed-on: http://git.am.freescale.net:8181/6467 Reviewed-by: Richard Schmitt <B43082@freescale.com> Tested-by: Richard Schmitt <B43082@freescale.com> Reviewed-on: http://git.am.freescale.net:8181/19787 Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com> Reviewed-by: Matthew Weigel <Matthew.Weigel@freescale.com>
2014-12-11crypto: caam - fix addressing of struct memberCristian Stoica
buf_0 and buf_1 in caam_hash_state are not next to each other. Accessing buf_1 is incorrect from &buf_0 with an offset of only size_of(buf_0). The same issue is also with buflen_0 and buflen_1 Cc: <stable@vger.kernel.org> # 3.13+ Signed-off-by: Cristian Stoica <cristian.stoica@freescale.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au> (cherry picked from commit 4451d494b1910bf7b7f8381a637d0fe6d2142467) Change-Id: Ibd092659780d8a918424e4cc753f3e83792406f8 Reviewed-on: http://git.am.freescale.net:8181/19764 Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com> Reviewed-by: Horia Ioan Geanta Neag <horia.geanta@freescale.com> Reviewed-by: Mircea Pop <mircea.pop@freescale.com> Reviewed-by: Matthew Weigel <Matthew.Weigel@freescale.com>
2014-12-11crypto: caam - enable raw data instead of von Neumann dataAlex Porosanu
The sampling of the oscillator can be done in multiple modes for generating the entropy value. By default, this is set to von Neumann. This patch changes the sampling to raw data, since it has been discovered that the generated entropy has a better 'quality'. Signed-off-by: Alex Porosanu <alexandru.porosanu@freescale.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au> (cherry picked from commit e5ffbfc182bc148f44840bdd3970ea4c8bf80c3c) Change-Id: Ib366aa7e0477b2793f648333f2798a5c7b59ec5f Reviewed-on: http://git.am.freescale.net:8181/23839 Reviewed-by: Matthew Weigel <Matthew.Weigel@freescale.com> Tested-by: Matthew Weigel <Matthew.Weigel@freescale.com>
2014-12-11crypto: caam - change starting entropy delay valueAlex Porosanu
The entropy delay (the length in system clocks of each entropy sample) for the RNG4 block of CAAM is dependent on the frequency of the SoC. By elaborate methods, it has been determined that a good starting value for all platforms integrating the CAAM IP is 3200. Using a higher value has additional benefit of speeding up the process of instantiating the RNG, since the entropy delay will be increased and instantiation of the RNG state handles will be reattempted by the driver. If the starting value is low, for certain platforms, this can lead to a quite lengthy process. This patch changes the starting value of the length of the entropy sample to 3200 system clocks. In addition to this change, the attempted entropy delay values are now printed on the console upon initialization of the RNG block. While here, a safeguard for yielding the processor was added for ensuring that in very adverse cases, the CPU isn't hogged by the instantiation loop. Signed-off-by: Alex Porosanu <alexandru.porosanu@freescale.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au> (cherry picked from commit eeaa1724a2e9c8958a8621b3c10d5ca0667e78fa) Conflicts: drivers/crypto/caam/ctrl.c Change-Id: Ibc271d629cef3cab291ac8e5c8e7b68b0dc7c1e3 Reviewed-on: http://git.am.freescale.net:8181/23840 Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com> Reviewed-by: Horia Ioan Geanta Neag <horia.geanta@freescale.com> Reviewed-by: Matthew Weigel <Matthew.Weigel@freescale.com>
2014-12-11crypto: caam - disable RNG oscillator maximum frequency checkAlex Porosanu
The rtfrqmax & rtfrqmin set the bounds of the expected frequency of the oscillator, when SEC runs at its maximum frequency. For certain platforms (f.i. T2080), the oscillator is very fast and thus if the SEC runs at a lower than normal frequency, the ring oscillator is incorrectly detected as being out of bounds. This patch effectively disables the maximum frequency check, by setting a high enough maximum allowable frequency for the oscillator. The reasoning behind this is that usually a broken oscillator will run too slow (i.e. not run at all) rather than run too fast. Signed-off-by: Alex Porosanu <alexandru.porosanu@freescale.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au> (cherry picked from commit b061f3fefcffa0cdcdc61ae2a1123a4e7697d452) Change-Id: I796cf92bf08c66d0499bfe3962dcd67afd51a72e Reviewed-on: http://git.am.freescale.net:8181/23838 Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com> Reviewed-by: Horia Ioan Geanta Neag <horia.geanta@freescale.com> Reviewed-by: Matthew Weigel <Matthew.Weigel@freescale.com>
2014-12-11pdb: Patch to replace flag CPU_BIG_ENDIAN with __BIG_ENDIANAlok Makhariya
Flag CPU_BIG_ENDIAN is not defined in powerpc config file so it is replace with __BIG_ENDIAN flag. Signed-off-by: Alok Makhariya <B46187@freescale.com> Change-Id: I8cf0b83ab53a6dd544de81cf17ad0441ebb08ce5 Reviewed-on: http://git.am.freescale.net:8181/23694 Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com> Reviewed-by: Horia Ioan Geanta Neag <horia.geanta@freescale.com> Reviewed-by: Richard Schmitt <richard.schmitt@freescale.com>
2014-12-11crypto:caam: Initialize sec4_sg_bytes to 0 in ahash_final_no_ctxRuchika Gupta
In function, ahash_final_no_ctx space is allocated for base edesc and hw desc commands, link tables. After SEC has finished executing the descriptor, ahash_unmap is called. In this function, unmapping of sec_sg_dma is done on the basis of variable sec4_sg_bytes in edesc. Since sec4_sg_bytes was not initialized when edesc was allocated, this results in kernel crash. caam algorithms registered in /proc/crypto Unable to handle kernel paging request at virtual address 7f5d8000 pgd = 80003000 [7f5d8000] *pgd=80000080005003, *pmd=00000000 Internal error: Oops: 206 [#1] SMP THUMB2 Modules linked in: CPU: 0 PID: 96 Comm: cryptomgr_test Not tainted 3.12.19-rt30+ls1+gd62899c9b13f #4 task: ef1b7480 ti: cf98a000 task.ti: cf98a000 PC is at dma_cache_maint_page+0x3c/0xd4 LR is at __dma_page_dev_to_cpu+0x19/0x80 pc : [<8001285c>] lr : [<80012951>] psr: b0000133 sp : cf98b9b0 ip : 80012c09 fp : 7f5d8000 r10: 00000014 r9 : 8053f2c0 r8 : 804e0f04 r7 : 00000001 r6 : 00004000 r5 : 80558000 r4 : 24940000 r3 : 805215c0 r2 : ff080000 r1 : 00000340 r0 : 80558000 Flags: NzCV IRQs on FIQs on Mode SVC_32 ISA Thumb Segment kernel Control: 70c53c7d Table: 80003000 DAC: f45b2700 Process cryptomgr_test (pid: 96, stack limit = 0xcf98a248) Stack: (0xcf98b9b0 to 0xcf98c000) b9a0: 00000001 24940000 00000014 7f5d8000 b9c0: 00000001 cf8adc00 cf912000 00000014 00000000 80012951 8001514d 00000014 b9e0: 81579080 80012c09 80012c09 00000000 cf8adc00 80249d89 00000000 00210020 ba00: 00000000 40000193 81573b80 802f96c5 00000001 800302f5 cf98bd6c cf98bcfc ba20: 00000000 cf98bd6c cf98bd00 cf98bd68 00000003 00000000 00000001 8002e021 ba40: 0000001c 0000001c 000cf912 00000001 804e0f04 80012879 00000001 0000001c ba60: 00000040 80f4a240 00000001 cf8d3c00 000014b4 00000109 cf8d3c00 81578c44 ba80: 00000001 81579080 cf8d3c00 802877ad 804d9c44 cf8d3c00 0000010a 80244945 baa0: 00000000 80012879 cf912040 cf98bcf0 81578e00 0000010a cf8d3cc0 0000003f bac0: 00001360 81578c44 81574180 0000012c 81574188 ffff8c3a 0000003f 80522e44 bae0: 00000001 802883d1 80288351 0000000c 00000020 00000020 000cf912 00000001 bb00: 804e0f04 80012879 00000001 00000020 00000018 80f4a240 00000001 cf8d3c00 bb20: 000014f0 0000010c 00000860 80012951 cf8d3c00 0000010d 00000001 81579080 bb40: cf8d3c00 80249cf1 0000010c 802449ff 00000000 81573b80 cf912018 cf8adc00 bb60: 81578e00 0000010d cf8d3cc0 0000003f 802f7d9c 81578c44 81574180 0000012c bb80: 81574188 ffff8c3a 0000003f 80522e44 00000001 802883d1 80288351 0000000c bba0: 00000001 cf98a000 cf98a000 00000003 804d80c0 00000100 80523c40 8001b07f bbc0: 802f7da2 00000000 0000000a 00208040 ffff8c39 00000000 cf98a018 40000193 bbe0: 804d3e3c 00000000 cf98bc64 cf98a018 804d4b80 cf98a000 804deb60 8001b185 bc00: cf98a008 8001b6b5 00000087 8000ca01 f0002000 cf98bc30 804decdc 800083e3 bc20: 802f7da2 00000133 ffffffff 802f9a9b 00000000 00000000 00000001 00000000 bc40: 81573b80 cf98bdcc 00000000 cf98bc88 cf98a018 804d4b80 cf98a000 804deb60 bc60: 800128f5 cf98bc78 802f7d9d 802f7da2 00000133 ffffffff 00000001 00000000 bc80: cf98bcf4 00030002 00000014 00000014 802f8011 804d4b80 804e0f04 80012879 bca0: 00000050 00000050 000cf970 00000001 804e0f04 80012879 00000001 00000270 bcc0: 80f4ae00 800128f5 00000000 804e0f04 00000040 5c200014 00000033 80012915 bce0: 00000020 ef1b7480 cf98bdcc cf98bdc8 cf98bd08 cf98bd5c cf98a000 00000001 bd00: 00000001 802f8011 7fffffff 7fffffff cf98bd50 802f75c3 cf8d3c80 010d010c bd20: 00000001 802447a1 0000010d cf8d3c00 cf98bdcc 00010000 ef1b7480 7fffffff bd40: cf98bdcc cf98bdc8 cf98bd50 802f8283 cf912018 00000001 00000000 ef1b7480 bd60: cf98bddc cf98bddc 00000002 cf98bdc8 804f6b24 cf8486a0 cf98bd90 cf8efb80 bd80: 00000001 cf98bdc8 00000000 802f82db cf970000 80136d85 cf8adc00 80137097 bda0: ef07d308 ef1b74c8 804f6b3d 0000000e ef07d308 00000000 cf8b69c0 804f6b24 bdc0: 00000007 00000000 00000000 00010001 dead4ead ffffffff ffffffff cf98bd60 bde0: cf98bd60 00000000 cf965000 cf964000 cf963000 cf962000 cf961000 cf960000 be00: cf95f000 cf95e000 80f4aca2 00000000 00000008 00000000 80f4abc2 00000e90 be20: 0000000e cf95ee90 00000000 804e0f04 00000000 5c200014 00000000 80012915 be40: 80015141 80f4ae00 00000270 cf970000 cf911010 80249423 00000001 00000000 be60: 8054abc8 000c000b 04410000 00000014 cf848638 00000000 cf970000 cf970040 be80: cf848638 ef36b780 0000008a cf970000 00000000 00000007 804f6b24 ef36b7c0 bea0: 00000400 00000064 00000000 801371db 00000000 804f6b24 00000007 cf970000 bec0: 80313bac 00000000 ffffffff 80137249 ef36b780 80137209 0000008a 80136d0d bee0: e7fddef0 e7fddef0 e7fddef0 e7fddef0 e7fddef0 e7fddef0 e7fddef0 e7fddef0 bf00: e7fddef0 e7fddef0 e7fddef0 e7fddef0 00000001 ef081e08 ef081e04 ef1b7480 bf20: 00000000 ef36b780 00000000 ef36b780 801352d5 00000000 00000000 00000000 bf40: 00000000 801352ed ef081df4 80029395 e7fddef0 00000000 e7fddef0 ef36b780 bf60: 00000000 00000000 dead4ead ffffffff ffffffff cf98bf74 cf98bf74 00000000 bf80: 00000000 dead4ead ffffffff ffffffff cf98bf90 cf98bf90 00000000 ef081df4 bfa0: 80029339 00000000 00000000 8000c1d9 00000000 00000000 00000000 00000000 bfc0: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 bfe0: 00000000 00000000 00000000 00000000 00000013 00000000 e7fddef0 e7fddef0 [<8001285c>] (dma_cache_maint_page+0x3c/0xd4) from [<80012951>] (__dma_page_dev_to_cpu+0x19/0x80) [<80012951>] (__dma_page_dev_to_cpu+0x19/0x80) from [<80249d89>] (ahash_done+0x99/0xb8) [<80249d89>] (ahash_done+0x99/0xb8) from [<802449ff>] (caam_jr_dequeue+0x163/0x178) [<802449ff>] (caam_jr_dequeue+0x163/0x178) from [<802883d1>] (net_rx_action+0x81/0x114) [<802883d1>] (net_rx_action+0x81/0x114) from [<8001b07f>] (__do_softirq+0x8b/0x128) [<8001b07f>] (__do_softirq+0x8b/0x128) from [<8001b185>] (do_softirq+0x31/0x3c) [<8001b185>] (do_softirq+0x31/0x3c) from [<8001b6b5>] (irq_exit+0x4f/0x8e) [<8001b6b5>] (irq_exit+0x4f/0x8e) from [<8000ca01>] (handle_IRQ+0x41/0x60) [<8000ca01>] (handle_IRQ+0x41/0x60) from [<800083e3>] (gic_handle_irq+0x2b/0x44) [<800083e3>] (gic_handle_irq+0x2b/0x44) from [<802f9a9b>] (__irq_svc+0x3b/0x5c) Exception stack(0xcf98bc30 to 0xcf98bc78) bc20: 00000000 00000000 00000001 00000000 bc40: 81573b80 cf98bdcc 00000000 cf98bc88 cf98a018 804d4b80 cf98a000 804deb60 bc60: 800128f5 cf98bc78 802f7d9d 802f7da2 00000133 ffffffff [<802f9a9b>] (__irq_svc+0x3b/0x5c) from [<802f7da2>] (__schedule+0x36/0x24c) [<802f7da2>] (__schedule+0x36/0x24c) from [<802f8011>] (schedule+0x59/0x6c) [<802f8011>] (schedule+0x59/0x6c) from [<802f75c3>] (schedule_timeout+0x13/0x100) [<802f75c3>] (schedule_timeout+0x13/0x100) from [<802f8283>] (wait_for_common+0x9b/0xc4) [<802f8283>] (wait_for_common+0x9b/0xc4) from [<802f82db>] (wait_for_completion_interruptible+0xf/0x20) [<802f82db>] (wait_for_completion_interruptible+0xf/0x20) from [<80136d85>] (do_one_async_hash_op.isra.5+0x19/0x22) [<80136d85>] (do_one_async_hash_op.isra.5+0x19/0x22) from [<80137097>] (__test_hash+0x309/0x3ae) [<80137097>] (__test_hash+0x309/0x3ae) from [<801371db>] (test_hash+0x17/0x44) [<801371db>] (test_hash+0x17/0x44) from [<80137249>] (alg_test_hash+0x41/0x54) [<80137249>] (alg_test_hash+0x41/0x54) from [<80136d0d>] (alg_test+0x129/0x188) [<80136d0d>] (alg_test+0x129/0x188) from [<801352ed>] (cryptomgr_test+0x19/0x34) [<801352ed>] (cryptomgr_test+0x19/0x34) from [<80029395>] (kthread+0x5d/0x6c) [<80029395>] (kthread+0x5d/0x6c) from [<8000c1d9>] (ret_from_fork+0x11/0x38) Code: 3212 0152 eb00 0b02 (5882) 0f92 ---[ end trace 3a9625077c8d21fb ]--- Kernel panic - not syncing: Fatal exception in interrupt CPU1: stopping CPU: 1 PID: 0 Comm: swapper/1 Tainted: G D 3.12.19-rt30+ls1+gd62899c9b13f #4 [<800107d9>] (unwind_backtrace+0x1/0x88) from [<8000e4ef>] (show_stack+0xb/0xc) [<8000e4ef>] (show_stack+0xb/0xc) from [<802f6dbd>] (dump_stack+0x4d/0x60) [<802f6dbd>] (dump_stack+0x4d/0x60) from [<8000fee3>] (handle_IPI+0x7f/0xbc) [<8000fee3>] (handle_IPI+0x7f/0xbc) from [<800083f3>] (gic_handle_irq+0x3b/0x44) [<800083f3>] (gic_handle_irq+0x3b/0x44) from [<802f9a9b>] (__irq_svc+0x3b/0x5c) Exception stack(0xef09bfa0 to 0xef09bfe8) bfa0: ffffffed 00000000 010a7000 00000000 ef09a000 ef09a010 80000000 80523390 bfc0: 80003010 410fc075 00000000 00000000 00000008 ef09bfe8 8000cbd1 8000cbd2 bfe0: 60000133 ffffffff [<802f9a9b>] (__irq_svc+0x3b/0x5c) from [<8000cbd2>] (arch_cpu_idle+0x1a/0x20) [<8000cbd2>] (arch_cpu_idle+0x1a/0x20) from [<8003a285>] (cpu_startup_entry+0x7d/0xc4) [<8003a285>] (cpu_startup_entry+0x7d/0xc4) from [<80008485>] (__enable_mmu+0x1/0x1c) Signed-off-by: Ruchika Gupta <ruchika.gupta@freescale.com> Change-Id: I1bcaa5a402409a943b47d7e7b3672a081d934a24 Reviewed-on: http://git.am.freescale.net:8181/23427 Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com> Reviewed-by: Horia Ioan Geanta Neag <horia.geanta@freescale.com> Reviewed-by: Matthew Weigel <Matthew.Weigel@freescale.com>
2014-12-11Integrate t1024 patchesRich Schmitt
Merge remote-tracking branch 't1024-linux/master'
2014-12-11capwap: add capwap supportPan Jiafei
CAPWAP stands for Control and Provisioning of Wireless Access Points. CAPWAP is a standard, interoperable protocol that enables a controller to manage a collection of wireless access points. There are three drivers in Kernel Space: CAPWAP Domain driver, CAPWAP Bridge driver and CAPWAP Tunnel driver. CAPWAP Domain Driver implements configuration for CAPWAP Domain, including PCD configuration and FQs setup. User must configure and initialize CAPWAP domain before CAPWAP Tunnel and CAPWAP Bridge works. CAPWAP Tunnel Driver is a misc device driver, which registers four misc devices for four CAPWAP tunnels: fsl-capwap-ctrl-dtls, fsl-capwap-ctl-n-dtls, fsl-capwap-data-dtls, fsl-capwap-data-n-dtls. The misc device provides file-operation to transmit/receive DTLS/non-DTLS packets. For example, read from the device fsl-capwap-ctrl-dtls can receive DTLS control packet; Write to the device fsl-capwap-ctrl-dtls can transmit DTLS control packet. The CAPWAP Bridge Driver is also a misc device driver; it can bridge packets between PCIe NIC and CAPWAP data tunnels. To support capwap drivers, there should be a shared ethernet port in dts file to use as CAPWAP Ethernet port. Signed-off-by: Pan Jiafei <Jiafei.Pan@freescale.com> Change-Id: I7c99191156ebee5dd43673d20fb5c8469a780546 Reviewed-on: http://git.am.freescale.net:8181/21438 Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com> Reviewed-by: Jianhua Xie <jianhua.xie@freescale.com> Reviewed-by: Shengzhou Liu <Shengzhou.Liu@freescale.com>
2014-12-11ASFIPSEC: Porting ASF to LS1.Nikhil Agarwal
Adding PDB endianness independent. Signed-off-by: Nikhil Agarwal <Nikhil.Agarwal@freescale.com> Change-Id: I44bfc921ba1460dd2785c21252898b55953d8385 Reviewed-on: http://git.am.freescale.net:8181/17497 Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com> Reviewed-by: Sandeep Malik <Sandeep.Malik@freescale.com> Reviewed-by: Zhengxiong Jin <Jason.Jin@freescale.com> Tested-by: Zhengxiong Jin <Jason.Jin@freescale.com> (cherry picked from commit 16e2ab4fab053e020d4857f14fe8bd35616ad304) Reviewed-on: http://git.am.freescale.net:8181/21354
2014-12-11crypto: caam - Dynamic allocation of addresses for various memory blocks in ↵Nitesh Narayan Lal
CAAM. CAAM's memory is broken into following address blocks: Block Included Registers 7 QI registers Size of the above stated block varies in various platforms. The block size can be 4K or 64K. The block size can be dynamically determined by reading CTPR register in CAAM. This patch fixes the issues related to the dynamic initialization of the QI block address based on the value read from this register. Signed-off-by: Nitesh Narayan Lal <b44382@freescale.com> Change-Id: I11d6cb2814ee4eb1c966773636bf6bd0ff986811 Reviewed-on: http://git.am.freescale.net:8181/20999 Reviewed-by: Ruchika Gupta <ruchika.gupta@freescale.com> Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com> Reviewed-by: Zhengxiong Jin <Jason.Jin@freescale.com>
2014-12-11crypto: caam - Dynamic allocation of addresses for various memory blocks in ↵Nitesh Narayan Lal
CAAM. CAAM's memory is broken into following address blocks: Block Included Registers 0 General Registers 1-4 Job ring registers 6 RTIC registers 7 QI registers 8 DECO and CCB Size of the above stated blocks varies in various platforms. The block size can be 4K or 64K. The block size can be dynamically determined by reading CTPR register in CAAM. This patch initializes the block addresses dynamically based on the value read from this register. Signed-off-by: Ruchika Gupta <r66431@freescale.com> Signed-off-by: Nitesh Narayan Lal <b44382@freescale.com> Change-Id: I0ff5e5fe947134c56014544f335843dcc1595259 Reviewed-on: http://git.am.freescale.net:8181/17748 Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com> Reviewed-by: Ruchika Gupta <ruchika.gupta@freescale.com> Reviewed-by: Zhengxiong Jin <Jason.Jin@freescale.com>
2014-12-11crypto: caam - fix uninitialized state->buf_dma fieldHoria Geanta
state->buf_dma not being initialized can cause try_buf_map_to_sec4_sg to try to free unallocated DMA memory: caam_jr ffe301000.jr: DMA-API: device driver tries to free DMA memory it has not allocated [device address=0x000000002eb15068] [size=0 bytes] WARNING: at lib/dma-debug.c:1080 Modules linked in: caamhash(+) [last unloaded: caamhash] CPU: 0 PID: 1387 Comm: cryptomgr_test Tainted: G W 3.16.0-rc1 #23 task: eed24e90 ti: eebd0000 task.ti: eebd0000 NIP: c02889fc LR: c02889fc CTR: c02d7020 REGS: eebd1a50 TRAP: 0700 Tainted: G W (3.16.0-rc1) MSR: 00029002 <CE,EE,ME> CR: 44042082 XER: 00000000 GPR00: c02889fc eebd1b00 eed24e90 0000008d c1de3478 c1de382c 00000000 00029002 GPR08: 00000007 00000000 01660000 00000000 24042082 00000000 c07a1900 eeda2a40 GPR16: 005d62a0 c078ad4c 00000000 eeb15068 c07e1e10 c0da1180 00029002 c0d97408 GPR24: c62497a0 00000014 eebd1b58 00000000 c078ad4c ee130210 00000000 2eb15068 NIP [c02889fc] check_unmap+0x8ac/0xab0 LR [c02889fc] check_unmap+0x8ac/0xab0 Call Trace: [eebd1b00] [c02889fc] check_unmap+0x8ac/0xab0 (unreliable) --- Exception: 0 at (null) LR = (null) [eebd1b50] [c0288c78] debug_dma_unmap_page+0x78/0x90 (unreliable) [eebd1bd0] [f956f738] ahash_final_ctx+0x6d8/0x7b0 [caamhash] [eebd1c30] [c022ff4c] __test_hash+0x2ac/0x6c0 [eebd1de0] [c0230388] test_hash+0x28/0xb0 [eebd1e00] [c02304a4] alg_test_hash+0x94/0xc0 [eebd1e20] [c022fa94] alg_test+0x114/0x2e0 [eebd1ea0] [c022cd1c] cryptomgr_test+0x4c/0x60 [eebd1eb0] [c00497a4] kthread+0xc4/0xe0 [eebd1f40] [c000f2fc] ret_from_kernel_thread+0x5c/0x64 Instruction dump: 41de01c8 80a9002c 2f850000 40fe0008 80a90008 80fa0018 3c60c06d 811a001c 3863f4a4 813a0020 815a0024 4830cd01 <0fe00000> 81340048 2f890000 40feff48 Signed-off-by: Horia Geanta <horia.geanta@freescale.com> Acked-by: Kim Phillips <kim.phillips@freescale.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au> (cherry picked from commit de0e35ec2b72be30892f28a939c358af1df4fa2c) Change-Id: I7a3df37981b64f28191fee3f91332c371a179fc1 Reviewed-on: http://git.am.freescale.net:8181/17747 Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com> Reviewed-by: Zhengxiong Jin <Jason.Jin@freescale.com>
2014-12-11crypto: caam - fix uninitialized edesc->dst_dma fieldHoria Geanta
dst_dma not being properly initialized causes ahash_done_ctx_dst to try to free unallocated DMA memory: caam_jr ffe301000.jr: DMA-API: device driver tries to free DMA memory it has not allocated [device address=0x0000000006513340] [size=28 bytes] WARNING: at lib/dma-debug.c:1080 Modules linked in: caamhash(+) [last unloaded: caamhash] CPU: 0 PID: 1373 Comm: cryptomgr_test Tainted: G W 3.16.0-rc1 #23 task: ee23e350 ti: effd2000 task.ti: ee1f6000 NIP: c02889fc LR: c02889fc CTR: c02d7020 REGS: effd3d50 TRAP: 0700 Tainted: G W (3.16.0-rc1) MSR: 00029002 <CE,EE,ME> CR: 44048082 XER: 00000000 GPR00: c02889fc effd3e00 ee23e350 0000008e c1de3478 c1de382c 00000000 00029002 GPR08: 00000007 00000000 01660000 00000000 24048082 00000000 00000018 c07db080 GPR16: 00000006 00000100 0000002c eeb4a7e0 c07e1e10 c0da1180 00029002 c0d9b3c8 GPR24: eeb4a7c0 00000000 effd3e58 00000000 c078ad4c ee130210 00000000 06513340 NIP [c02889fc] check_unmap+0x8ac/0xab0 LR [c02889fc] check_unmap+0x8ac/0xab0 Call Trace: [effd3e00] [c02889fc] check_unmap+0x8ac/0xab0 (unreliable) [effd3e50] [c0288c78] debug_dma_unmap_page+0x78/0x90 [effd3ed0] [f94b89ec] ahash_done_ctx_dst+0x11c/0x200 [caamhash] [effd3f00] [c0429640] caam_jr_dequeue+0x1c0/0x280 [effd3f50] [c002c94c] tasklet_action+0xcc/0x1a0 [effd3f80] [c002cb30] __do_softirq+0x110/0x220 [effd3fe0] [c002cf34] irq_exit+0xa4/0xe0 [effd3ff0] [c000d834] call_do_irq+0x24/0x3c [ee1f7ae0] [c000489c] do_IRQ+0x8c/0x110 [ee1f7b00] [c000f86c] ret_from_except+0x0/0x18 --- Exception: 501 at _raw_spin_unlock_irq+0x30/0x50 LR = _raw_spin_unlock_irq+0x2c/0x50 [ee1f7bd0] [c0590158] wait_for_common+0xb8/0x170 [ee1f7c10] [c059024c] wait_for_completion_interruptible+0x1c/0x40 [ee1f7c20] [c022fc78] do_one_async_hash_op.isra.2.part.3+0x18/0x40 [ee1f7c30] [c022ffb8] __test_hash+0x318/0x6c0 [ee1f7de0] [c0230388] test_hash+0x28/0xb0 [ee1f7e00] [c02304a4] alg_test_hash+0x94/0xc0 [ee1f7e20] [c022fa94] alg_test+0x114/0x2e0 [ee1f7ea0] [c022cd1c] cryptomgr_test+0x4c/0x60 [ee1f7eb0] [c00497a4] kthread+0xc4/0xe0 [ee1f7f40] [c000f2fc] ret_from_kernel_thread+0x5c/0x64 Instruction dump: 41de01c8 80a9002c 2f850000 40fe0008 80a90008 80fa0018 3c60c06d 811a001c 3863f4a4 813a0020 815a0024 4830cd01 <0fe00000> 81340048 2f890000 40feff48 Signed-off-by: Horia Geanta <horia.geanta@freescale.com> Acked-by: Kim Phillips <kim.phillips@freescale.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au> (cherry picked from commit 76b99080ccc964163b4567fac2bb8619f5ed789f) Change-Id: I8eb93e0c4282d45d70b67941cea62441221df845 Reviewed-on: http://git.am.freescale.net:8181/17746 Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com> Reviewed-by: Zhengxiong Jin <Jason.Jin@freescale.com> Tested-by: Zhengxiong Jin <Jason.Jin@freescale.com>
2014-12-11crypto: caam - fix uninitialized S/G table size in ahash_digestHoria Geanta
Not initializing edesc->sec4_sg_bytes correctly causes ahash_done callback to free unallocated DMA memory: caam_jr ffe301000.jr: DMA-API: device driver tries to free DMA memory it has not allocated [device address=0x300900000000b44d] [size=46158 bytes] WARNING: at lib/dma-debug.c:1080 Modules linked in: caamhash(+) [last unloaded: caamhash] CPU: 0 PID: 1358 Comm: cryptomgr_test Tainted: G W 3.16.0-rc1 #23 task: eed04250 ti: effd2000 task.ti: c6046000 NIP: c02889fc LR: c02889fc CTR: c02d7020 REGS: effd3d50 TRAP: 0700 Tainted: G W (3.16.0-rc1) MSR: 00029002 <CE,EE,ME> CR: 44048082 XER: 00000000 GPR00: c02889fc effd3e00 eed04250 00000091 c1de3478 c1de382c 00000000 00029002 GPR08: 00000007 00000000 01660000 00000000 22048082 00000000 00000018 c07db080 GPR16: 00000006 00000100 0000002c ee2497e0 c07e1e10 c0da1180 00029002 c0d912c8 GPR24: 00000014 ee2497c0 effd3e58 00000000 c078ad4c ee130210 30090000 0000b44d NIP [c02889fc] check_unmap+0x8ac/0xab0 LR [c02889fc] check_unmap+0x8ac/0xab0 Call Trace: [effd3e00] [c02889fc] check_unmap+0x8ac/0xab0 (unreliable) [effd3e50] [c0288c78] debug_dma_unmap_page+0x78/0x90 [effd3ed0] [f9404fec] ahash_done+0x11c/0x190 [caamhash] [effd3f00] [c0429640] caam_jr_dequeue+0x1c0/0x280 [effd3f50] [c002c94c] tasklet_action+0xcc/0x1a0 [effd3f80] [c002cb30] __do_softirq+0x110/0x220 [effd3fe0] [c002cf34] irq_exit+0xa4/0xe0 [effd3ff0] [c000d834] call_do_irq+0x24/0x3c [c6047ae0] [c000489c] do_IRQ+0x8c/0x110 [c6047b00] [c000f86c] ret_from_except+0x0/0x18 --- Exception: 501 at _raw_spin_unlock_irq+0x30/0x50 LR = _raw_spin_unlock_irq+0x2c/0x50 [c6047bd0] [c0590158] wait_for_common+0xb8/0x170 [c6047c10] [c059024c] wait_for_completion_interruptible+0x1c/0x40 [c6047c20] [c022fc78] do_one_async_hash_op.isra.2.part.3+0x18/0x40 [c6047c30] [c022ff98] __test_hash+0x2f8/0x6c0 [c6047de0] [c0230388] test_hash+0x28/0xb0 [c6047e00] [c0230458] alg_test_hash+0x48/0xc0 [c6047e20] [c022fa94] alg_test+0x114/0x2e0 [c6047ea0] [c022cd1c] cryptomgr_test+0x4c/0x60 [c6047eb0] [c00497a4] kthread+0xc4/0xe0 [c6047f40] [c000f2fc] ret_from_kernel_thread+0x5c/0x64 Instruction dump: 41de01c8 80a9002c 2f850000 40fe0008 80a90008 80fa0018 3c60c06d 811a001c 3863f4a4 813a0020 815a0024 4830cd01 <0fe00000> 81340048 2f890000 40feff48 Signed-off-by: Horia Geanta <horia.geanta@freescale.com> Acked-by: Kim Phillips <kim.phillips@freescale.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au> (cherry picked from commit 45e9af78b1abb00b7c394a7ce4e72584c3ca0eb8) Change-Id: Id66573defe2b61fb9d33ed05de221e8524418508 Reviewed-on: http://git.am.freescale.net:8181/17745 Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com> Reviewed-by: Zhengxiong Jin <Jason.Jin@freescale.com> Tested-by: Zhengxiong Jin <Jason.Jin@freescale.com>
2014-12-11crypto: caam - fix DMA direction mismatch in ahash_done_ctx_srcHoria Geanta
caam_jr ffe301000.jr: DMA-API: device driver frees DMA memory with different direction [device address=0x0000000006271dac] [size=28 bytes] [mapped with DMA_TO_DEVICE] [unmapped with DMA_FROM_DEVICE] ------------[ cut here ]------------ WARNING: at lib/dma-debug.c:1131 Modules linked in: caamhash(+) [last unloaded: caamhash] CPU: 0 PID: 0 Comm: swapper/0 Tainted: G W 3.16.0-rc1 #23 task: c0789380 ti: effd2000 task.ti: c07d6000 NIP: c02885cc LR: c02885cc CTR: c02d7020 REGS: effd3d50 TRAP: 0700 Tainted: G W (3.16.0-rc1) MSR: 00021002 <CE,ME> CR: 44048082 XER: 00000000 GPR00: c02885cc effd3e00 c0789380 000000c6 c1de3478 c1de382c 00000000 00021002 GPR08: 00000007 00000000 01660000 0000012f 84048082 00000000 00000018 c07db080 GPR16: 00000006 00000100 0000002c c62517a0 c07e1e10 c0da1180 00029002 c0d95f88 GPR24: c07a0000 c07a4acc effd3e58 ee322bc0 0000001c ee130210 00000000 c0d95f80 NIP [c02885cc] check_unmap+0x47c/0xab0 LR [c02885cc] check_unmap+0x47c/0xab0 Call Trace: [effd3e00] [c02885cc] check_unmap+0x47c/0xab0 (unreliable) [effd3e50] [c0288c78] debug_dma_unmap_page+0x78/0x90 [effd3ed0] [f9624d84] ahash_done_ctx_src+0xa4/0x200 [caamhash] [effd3f00] [c0429640] caam_jr_dequeue+0x1c0/0x280 [effd3f50] [c002c94c] tasklet_action+0xcc/0x1a0 [effd3f80] [c002cb30] __do_softirq+0x110/0x220 [effd3fe0] [c002cf34] irq_exit+0xa4/0xe0 [effd3ff0] [c000d834] call_do_irq+0x24/0x3c [c07d7d50] [c000489c] do_IRQ+0x8c/0x110 [c07d7d70] [c000f86c] ret_from_except+0x0/0x18 --- Exception: 501 at _raw_spin_unlock_irq+0x30/0x50 LR = _raw_spin_unlock_irq+0x2c/0x50 [c07d7e40] [c0053084] finish_task_switch+0x74/0x130 [c07d7e60] [c058f278] __schedule+0x238/0x620 [c07d7f70] [c058fb50] schedule_preempt_disabled+0x10/0x20 [c07d7f80] [c00686a0] cpu_startup_entry+0x100/0x1b0 [c07d7fb0] [c074793c] start_kernel+0x338/0x34c [c07d7ff0] [c00003d8] set_ivor+0x140/0x17c Instruction dump: 7d495214 7d294214 806a0010 80c90010 811a001c 813a0020 815a0024 90610008 3c60c06d 90c1000c 3863f764 4830d131 <0fe00000> 3c60c06d 3863f0f4 4830d121 ---[ end trace db1fae088c75c280 ]--- Mapped at: [<f96251bc>] ahash_final_ctx+0x14c/0x7b0 [caamhash] [<c022ff4c>] __test_hash+0x2ac/0x6c0 [<c0230388>] test_hash+0x28/0xb0 [<c02304a4>] alg_test_hash+0x94/0xc0 [<c022fa94>] alg_test+0x114/0x2e0 Signed-off-by: Horia Geanta <horia.geanta@freescale.com> Acked-by: Kim Phillips <kim.phillips@freescale.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au> (cherry picked from commit bc9e05f9e770b9c6a1bcc0cdee676e74e5a04fd2) Change-Id: I67764d2c3f2c4f7f6d155717a16d474d43a0c410 Reviewed-on: http://git.am.freescale.net:8181/17744 Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com> Reviewed-by: Zhengxiong Jin <Jason.Jin@freescale.com> Tested-by: Zhengxiong Jin <Jason.Jin@freescale.com>
2014-12-11crypto: caam - fix DMA direction mismatch in ahash_done_ctx_dstHoria Geanta
caam_jr ffe301000.jr: DMA-API: device driver frees DMA memory with different direction [device address=0x00000000062ad1ac] [size=28 bytes] [mapped with DMA_FROM_DEVICE] [unmapped with DMA_TO_DEVICE] ------------[ cut here ]------------ WARNING: at lib/dma-debug.c:1131 Modules linked in: caamhash(+) [last unloaded: caamhash] CPU: 0 PID: 0 Comm: swapper/0 Tainted: G W 3.16.0-rc1 #23 task: c0789380 ti: effd2000 task.ti: c07d6000 NIP: c02885cc LR: c02885cc CTR: c02d7020 REGS: effd3d50 TRAP: 0700 Tainted: G W (3.16.0-rc1) MSR: 00021002 <CE,ME> CR: 44048082 XER: 00000000 GPR00: c02885cc effd3e00 c0789380 000000c6 c1de3478 c1de382c 00000000 00021002 GPR08: 00000007 00000000 01660000 0000012f 84048082 00000000 00000018 c07db080 GPR16: 00000006 00000100 0000002c eee567e0 c07e1e10 c0da1180 00029002 c0d96708 GPR24: c07a0000 c07a4acc effd3e58 ee29b140 0000001c ee130210 00000000 c0d96700 NIP [c02885cc] check_unmap+0x47c/0xab0 LR [c02885cc] check_unmap+0x47c/0xab0 Call Trace: [effd3e00] [c02885cc] check_unmap+0x47c/0xab0 (unreliable) [effd3e50] [c0288c78] debug_dma_unmap_page+0x78/0x90 [effd3ed0] [f9350974] ahash_done_ctx_dst+0xa4/0x200 [caamhash] [effd3f00] [c0429640] caam_jr_dequeue+0x1c0/0x280 [effd3f50] [c002c94c] tasklet_action+0xcc/0x1a0 [effd3f80] [c002cb30] __do_softirq+0x110/0x220 [effd3fe0] [c002cf34] irq_exit+0xa4/0xe0 [effd3ff0] [c000d834] call_do_irq+0x24/0x3c [c07d7d50] [c000489c] do_IRQ+0x8c/0x110 [c07d7d70] [c000f86c] ret_from_except+0x0/0x18 --- Exception: 501 at _raw_spin_unlock_irq+0x30/0x50 LR = _raw_spin_unlock_irq+0x2c/0x50 [c07d7e40] [c0053084] finish_task_switch+0x74/0x130 [c07d7e60] [c058f278] __schedule+0x238/0x620 [c07d7f70] [c058fb50] schedule_preempt_disabled+0x10/0x20 [c07d7f80] [c00686a0] cpu_startup_entry+0x100/0x1b0 [c07d7fb0] [c074793c] start_kernel+0x338/0x34c [c07d7ff0] [c00003d8] set_ivor+0x140/0x17c Instruction dump: 7d495214 7d294214 806a0010 80c90010 811a001c 813a0020 815a0024 90610008 3c60c06d 90c1000c 3863f764 4830d131 <0fe00000> 3c60c06d 3863f0f4 4830d121 ---[ end trace db1fae088c75c270 ]--- Mapped at: [<f9352454>] ahash_update_first+0x5b4/0xba0 [caamhash] [<c022ff28>] __test_hash+0x288/0x6c0 [<c0230388>] test_hash+0x28/0xb0 [<c02304a4>] alg_test_hash+0x94/0xc0 [<c022fa94>] alg_test+0x114/0x2e0 Signed-off-by: Horia Geanta <horia.geanta@freescale.com> Acked-by: Kim Phillips <kim.phillips@freescale.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au> (cherry picked from commit ef62b2310b4c783a70eba78f29695687d8cdc8df) Change-Id: I9059e608d14ac8c67897ed7b8c04851550de6f37 Reviewed-on: http://git.am.freescale.net:8181/17743 Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com> Reviewed-by: Zhengxiong Jin <Jason.Jin@freescale.com> Tested-by: Zhengxiong Jin <Jason.Jin@freescale.com>
2014-12-11crypto: caam - fix DMA unmapping error in hash_digest_keyHoria Geanta
Key being hashed is unmapped using the digest size instead of initial length: caam_jr ffe301000.jr: DMA-API: device driver frees DMA memory with different size [device address=0x000000002eeedac0] [map size=80 bytes] [unmap size=20 bytes] ------------[ cut here ]------------ WARNING: at lib/dma-debug.c:1090 Modules linked in: caamhash(+) CPU: 0 PID: 1327 Comm: cryptomgr_test Not tainted 3.16.0-rc1 #23 task: eebda5d0 ti: ee26a000 task.ti: ee26a000 NIP: c0288790 LR: c0288790 CTR: c02d7020 REGS: ee26ba30 TRAP: 0700 Not tainted (3.16.0-rc1) MSR: 00021002 <CE,ME> CR: 44022082 XER: 00000000 GPR00: c0288790 ee26bae0 eebda5d0 0000009f c1de3478 c1de382c 00000000 00021002 GPR08: 00000007 00000000 01660000 0000012f 82022082 00000000 c07a1900 eeda29c0 GPR16: 00000000 c61deea0 000c49a0 00000260 c07e1e10 c0da1180 00029002 c0d9ef08 GPR24: c07a0000 c07a4acc ee26bb38 ee2765c0 00000014 ee130210 00000000 00000014 NIP [c0288790] check_unmap+0x640/0xab0 LR [c0288790] check_unmap+0x640/0xab0 Call Trace: [ee26bae0] [c0288790] check_unmap+0x640/0xab0 (unreliable) [ee26bb30] [c0288c78] debug_dma_unmap_page+0x78/0x90 [ee26bbb0] [f929c3d4] ahash_setkey+0x374/0x720 [caamhash] [ee26bc30] [c022fec8] __test_hash+0x228/0x6c0 [ee26bde0] [c0230388] test_hash+0x28/0xb0 [ee26be00] [c0230458] alg_test_hash+0x48/0xc0 [ee26be20] [c022fa94] alg_test+0x114/0x2e0 [ee26bea0] [c022cd1c] cryptomgr_test+0x4c/0x60 [ee26beb0] [c00497a4] kthread+0xc4/0xe0 [ee26bf40] [c000f2fc] ret_from_kernel_thread+0x5c/0x64 Instruction dump: 41de03e8 83da0020 3c60c06d 83fa0024 3863f520 813b0020 815b0024 80fa0018 811a001c 93c10008 93e1000c 4830cf6d <0fe00000> 3c60c06d 3863f0f4 4830cf5d ---[ end trace db1fae088c75c26c ]--- Mapped at: [<f929c15c>] ahash_setkey+0xfc/0x720 [caamhash] [<c022fec8>] __test_hash+0x228/0x6c0 [<c0230388>] test_hash+0x28/0xb0 [<c0230458>] alg_test_hash+0x48/0xc0 [<c022fa94>] alg_test+0x114/0x2e0 Signed-off-by: Horia Geanta <horia.geanta@freescale.com> Acked-by: Kim Phillips <kim.phillips@freescale.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au> (cherry picked from commit e11aa9f1351f150ee9f0166bffc5e007c81c1364) Change-Id: I570eaf170295c91e2ce7f7367ed31c9fd5c9369d Reviewed-on: http://git.am.freescale.net:8181/17742 Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com> Reviewed-by: Zhengxiong Jin <Jason.Jin@freescale.com> Tested-by: Zhengxiong Jin <Jason.Jin@freescale.com>
2014-12-11crypto: caam - fix "failed to check map error" DMA warningsHoria Geanta
Use dma_mapping_error for every dma_map_single / dma_map_page. Signed-off-by: Horia Geanta <horia.geanta@freescale.com> Acked-by: Kim Phillips <kim.phillips@freescale.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au> (cherry picked from commit ce572085282128d57324aabf415673dfbfa32d54) Conflicts: drivers/crypto/caam/caamalg.c Change-Id: I1e2466043f87dc74c955ebfae0aad45be7ac8de9 Reviewed-on: http://git.am.freescale.net:8181/17741 Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com> Reviewed-by: Horia Ioan Geanta Neag <horia.geanta@freescale.com> Reviewed-by: Zhengxiong Jin <Jason.Jin@freescale.com> Tested-by: Zhengxiong Jin <Jason.Jin@freescale.com>
2014-12-11crypto: caam - fix typo in dma_mapping_errorHoria Geanta
dma_mapping_error checks for an incorrect DMA address: s/ctx->sh_desc_enc_dma/ctx->sh_desc_dec_dma Signed-off-by: Horia Geanta <horia.geanta@freescale.com> Acked-by: Kim Phillips <kim.phillips@freescale.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au> (cherry picked from commit 71c65f7c90a176877ad1aa87b752217db61148a8) Change-Id: If55f0e154763c9a293adc6fbc44e9eb01e5fcbc5 Reviewed-on: http://git.am.freescale.net:8181/17740 Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com> Reviewed-by: Zhengxiong Jin <Jason.Jin@freescale.com> Tested-by: Zhengxiong Jin <Jason.Jin@freescale.com>
2014-12-11crypto: caam - fix DECO RSR pollingHoria Geanta
RSR (Request Source Register) is not used when virtualization is disabled, thus don't poll for Valid bit. Besides this, if used, timeout has to be reinitialized. Signed-off-by: Horia Geanta <horia.geanta@freescale.com> Acked-by: Kim Phillips <kim.phillips@freescale.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au> (cherry picked from commit 8f1da7b945b65513fb02b75ce25040c67ce32726) Change-Id: I970dc02469553034efe2bcf7431d104b911a6c76 Reviewed-on: http://git.am.freescale.net:8181/17739 Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com> Reviewed-by: Ruchika Gupta <ruchika.gupta@freescale.com> Reviewed-by: Zhengxiong Jin <Jason.Jin@freescale.com> Tested-by: Zhengxiong Jin <Jason.Jin@freescale.com>
2014-12-11crypto: caam - Correct the dma mapping for sg tableRuchika Gupta
At few places in caamhash and caamalg, after allocating a dmable buffer for sg table , the buffer was being modified. As per definition of DMA_FROM_DEVICE ,afer allocation the memory should be treated as read-only by the driver. This patch shifts the allocation of dmable buffer for sg table after it is populated by the driver, making it read-only as per the DMA API's requirement. Signed-off-by: Ruchika Gupta <ruchika.gupta@freescale.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au> (cherry picked from commit 1da2be33ad4c30a2b1d5fe3053b5b7f63e6e2baa) Change-Id: I485040b955e27772c20623f037e8a5167404c18d Reviewed-on: http://git.am.freescale.net:8181/17736 Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com> Reviewed-by: Zhengxiong Jin <Jason.Jin@freescale.com> Tested-by: Zhengxiong Jin <Jason.Jin@freescale.com>
2014-12-11crypto: caam - Add definition of rd/wr_reg64 for little endian platformRuchika Gupta
CAAM IP has certain 64 bit registers . 32 bit architectures cannot force atomic-64 operations. This patch adds definition of these atomic-64 operations for little endian platforms. The definitions which existed previously were for big endian platforms. Signed-off-by: Ruchika Gupta <ruchika.gupta@freescale.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au> (cherry picked from commit ef94b1d834aace7101de77c3a7c2631b9ae9c5f6) Change-Id: Ieb2e1cccb475f380f44735b6b6d633514e9ab3e3 Reviewed-on: http://git.am.freescale.net:8181/17735 Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com> Reviewed-by: Zhengxiong Jin <Jason.Jin@freescale.com> Tested-by: Zhengxiong Jin <Jason.Jin@freescale.com>
2014-12-11crypto: caam - Configuration for platforms with virtualization enabled in CAAMRuchika Gupta
For platforms with virtualization enabled 1. The job ring registers can be written to only is the job ring has been started i.e STARTR bit in JRSTART register is 1 2. For DECO's under direct software control, with virtualization enabled PL, BMT, ICID and SDID values need to be provided. These are provided by selecting a Job ring in start mode whose parameters would be used for the DECO access programming. Signed-off-by: Ruchika Gupta <ruchika.gupta@freescale.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au> (cherry picked from commit 17157c90a8abf9323ee2a3daac7ad9f696642dda) Conflicts: drivers/crypto/caam/ctrl.c drivers/crypto/caam/intern.h Change-Id: I8adb64fd4ba06f1007ae6838ad4f5b3ecd04bdc9 Reviewed-on: http://git.am.freescale.net:8181/17734 Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com> Reviewed-by: Ruchika Gupta <ruchika.gupta@freescale.com> Reviewed-by: Zhengxiong Jin <Jason.Jin@freescale.com> Tested-by: Zhengxiong Jin <Jason.Jin@freescale.com>
2014-12-11crypto: caam - Correct definition of registers in memory mapRuchika Gupta
Some registers like SECVID, CHAVID, CHA Revision Number, CTPR were defined as 64 bit resgisters. The IP provides a DWT bit(Double word Transpose) to transpose the two words when a double word register is accessed. However setting this bit would also affect the operation of job descriptors as well as other registers which are truly double word in nature. So, for the IP to work correctly on big-endian as well as little-endian SoC's, change is required to access all 32 bit registers as 32 bit quantities. Signed-off-by: Ruchika Gupta <ruchika.gupta@freescale.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au> (cherry picked from commit eb1139cd437afadc63f58159c111e3f166bddb51) Conflicts: drivers/crypto/caam/ctrl.c Change-Id: I4b9e3c8a438e6ce485a09dd485a1c463ec38953a Reviewed-on: http://git.am.freescale.net:8181/17733 Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com> Reviewed-by: Ruchika Gupta <ruchika.gupta@freescale.com> Reviewed-by: Zhengxiong Jin <Jason.Jin@freescale.com> Tested-by: Zhengxiong Jin <Jason.Jin@freescale.com>
2014-12-11crypto: caam - Define setbits32() and clrbits32() for ARM in the Freescale ↵Victoria Milhoan (b42089)
CAAM driver The kernel defines setbits32() and clrbits32() macros only for Power-based architectures. This patch modifies the Freescale CAAM driver to add macros for use on ARM architectures. Signed-off-by: Victoria Milhoan (b42089) <vicki.milhoan@freescale.com> Signed-off-by: Ruchika Gupta <ruchika.gupta@freescale.com> (cherry picked from commit 54fbc7392ac344cb94c44a2d8e1e0a16c950a5cd) Change-Id: Ia8065d9722bf5b7e60fd269d345b0b8c95ee96da Reviewed-on: http://git.am.freescale.net:8181/17732 Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com> Reviewed-by: Zhengxiong Jin <Jason.Jin@freescale.com> Tested-by: Zhengxiong Jin <Jason.Jin@freescale.com>
2014-12-11crypto: caam - writel() arguments are swappedDan Carpenter
My guess is that this little endian configuration is never found in real life, but if it were then the writel() arguments are in the wrong order so the driver would crash immediately. Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com> Acked-by: Kim Phillips <kim.phillips@freescale.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au> (cherry picked from commit f829e7a32c9434e31e565bc79f5804a7a984c10f) Change-Id: I8aa8e70dca9affa5da01b80e1968381beeb460eb Reviewed-on: http://git.am.freescale.net:8181/17731 Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com> Reviewed-by: Ruchika Gupta <ruchika.gupta@freescale.com> Reviewed-by: Zhengxiong Jin <Jason.Jin@freescale.com> Tested-by: Zhengxiong Jin <Jason.Jin@freescale.com>
2014-05-13crypto: caam/qi - FQs must be destroyed after being retiredAlex Porosanu
Once there is no further need for a QI context, and its attached FQ, this must be destroyed, so it can be reused later on. Change-Id: If7c1c57aede3242a726f3be345216de2176dc393 Signed-off-by: Alex Porosanu <alexandru.porosanu@freescale.com> Reviewed-on: http://git.am.freescale.net:8181/12227 Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com> Reviewed-by: Vakul Garg <vakul@freescale.com> Reviewed-by: Mircea Pop <mircea.pop@freescale.com> Reviewed-by: Horia Ioan Geanta Neag <horia.geanta@freescale.com> Reviewed-by: Cristian Stoica <cristian.stoica@freescale.com> Reviewed-by: Jose Rivera <German.Rivera@freescale.com>
2014-05-13crypto: caam/qi - rewrite logic on context releaseAlex Porosanu
The caam_drv_ctx_rel(...) function already performs a check if the drv_ctx is NULL. But this is not enough, it must also check if drv_ctx was set to an error code. If these checks are done in this function, there's no need to perfom them in caam_cra_exit(...) Change-Id: Ia4522dd6929c3676654569b27225b6666bebdbf5 Signed-off-by: Alex Porosanu <alexandru.porosanu@freescale.com> Reviewed-on: http://git.am.freescale.net:8181/12229 Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com> Reviewed-by: Mircea Pop <mircea.pop@freescale.com> Reviewed-by: Horia Ioan Geanta Neag <horia.geanta@freescale.com> Reviewed-by: Jose Rivera <German.Rivera@freescale.com>
2014-05-13crypto: caam/qi - fix handling of create_caam_req_fq(...) errorAlex Porosanu
When create_caam_req_fq(...) returns an error, it does so by using the ERR_PTR macro, due to its return type. Thus the return of this function needs to be checked by using the corresponding IS_ERR_* class of macros, and not by a "if(!ret)" construct. This patch adds the necessary macro calls in all the locations where create_caam_req_fq(...) is called. Change-Id: I41283fc1f728d959099351cc36ba07ba377a1848 Signed-off-by: Alex Porosanu <alexandru.porosanu@freescale.com> Reviewed-on: http://git.am.freescale.net:8181/12066 Reviewed-by: Mircea Pop <mircea.pop@freescale.com> Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com> Reviewed-by: Horia Ioan Geanta Neag <horia.geanta@freescale.com> Reviewed-by: Jose Rivera <German.Rivera@freescale.com>
2014-05-12Talitos support for RAID XORXuelin Shi
Expose Talitos's XOR functionality to be used for RAID parity calulation via the Async_tx layer. Signed-off-by: Dipen Dudhat <Dipen.Dudhat@freescale.com> Signed-off-by: Maneesh Gupta <Maneesh.Gupta@freescale.com> Signed-off-by: Kim Phillips <kim.phillips@freescale.com> Signed-off-by: Vishnu Suresh <Vishnu@freescale.com> Signed-off-by: Xuelin Shi <xuelin.shi@freescale.com> Change-Id: I9452e02b3d72f66f6df6b0e003a5539b46ce1df7 Reviewed-on: http://git.am.freescale.net:8181/12190 Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com> Reviewed-by: Richard Schmitt <richard.schmitt@freescale.com> Reviewed-by: Jose Rivera <German.Rivera@freescale.com>
2014-05-08crypto: talitos: init the priv->alg_list more earlier in talitos_probe()Kevin Hao
In function talitos_probe(), it will jump to err_out when getting an error in talitos_probe_irq(). Then the uninitialized list head priv->alg_list will be used in function talitos_remove(). In this case we would get a call trace like the following. So move up the initialization of priv->alg_list. Unable to handle kernel paging request for data at address 0x00000000 Faulting instruction address: 0xc0459ff4 Oops: Kernel access of bad area, sig: 11 [#1] SMP NR_CPUS=8 P1020 RDB Modules linked in: CPU: 1 PID: 1 Comm: swapper/0 Tainted: G W 3.13.0-08789-g54c0a4b46150 #33 task: cf050000 ti: cf04c000 task.ti: cf04c000 NIP: c0459ff4 LR: c0459fd4 CTR: c02f2438 REGS: cf04dcb0 TRAP: 0300 Tainted: G W (3.13.0-08789-g54c0a4b46150) MSR: 00029000 <CE,EE,ME> CR: 82000028 XER: 20000000 DEAR: 00000000 ESR: 00000000 GPR00: c045ac28 cf04dd60 cf050000 cf2579c0 00021000 00000000 c02f35b0 0000014e GPR08: c07e702c cf104300 c07e702c 0000014e 22000024 00000000 c0002a3c 00000000 GPR16: 00000000 00000000 00000000 00000000 00000000 00000000 c082e4e0 000000df GPR24: 00000000 00100100 00200200 cf257a2c cf0efe10 cf2579c0 cf0efe10 00000000 NIP [c0459ff4] talitos_remove+0x3c/0x1c8 LR [c0459fd4] talitos_remove+0x1c/0x1c8 Call Trace: [cf04dd60] [c07485d8] __func__.13331+0x1241c8/0x1391c0 (unreliable) [cf04dd90] [c045ac28] talitos_probe+0x244/0x998 [cf04dde0] [c0306a74] platform_drv_probe+0x28/0x68 [cf04ddf0] [c0304d38] really_probe+0x78/0x250 [cf04de10] [c030505c] __driver_attach+0xc8/0xcc [cf04de30] [c0302e98] bus_for_each_dev+0x6c/0xb8 [cf04de60] [c03043cc] bus_add_driver+0x168/0x220 [cf04de80] [c0305798] driver_register+0x88/0x130 [cf04de90] [c0002458] do_one_initcall+0x14c/0x198 [cf04df00] [c079f904] kernel_init_freeable+0x138/0x1d4 [cf04df30] [c0002a50] kernel_init+0x14/0x124 [cf04df40] [c000ec40] ret_from_kernel_thread+0x5c/0x64 Signed-off-by: Kevin Hao <haokexin@gmail.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au> Change-Id: I983008fb42edeb6bfdfe33c1f1f23cd4675b4f69 Reviewed-on: http://git.am.freescale.net:8181/11898 Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com> Reviewed-by: Alexandru Porosanu <alexandru.porosanu@freescale.com> Reviewed-by: Jose Rivera <German.Rivera@freescale.com>
2014-05-08crypto: talitos - fix locating offending descriptor in error pathHoria Geanta
Commit 3e721aeb3df3816e283ab18e327cd4652972e213 ("crypto: talitos - handle descriptor not found in error path") tried to address the fact that CDPR (Current Descriptor Pointer Register) is unreliable. As it turns out, there are still issues in the function detecting the offending descriptor: -only 32 bits of the descriptor address are read, however the address is 36-bit - since reset_channel() initializes channels with EAE (extended address) bit set -reading CDPR can return zero in cur_desc; when searching the channel fifo for this address, cur_desc == dma_desc (= 0) case might happen, leading to an oops when trying to return desc->hdr (desc is zero) -read channel's .tail only once; the tail is a moving target; use a local variable for the end of search condition Signed-off-by: Lei Xu <Lei.Xu@freescale.com> Signed-off-by: Horia Geanta <horia.geanta@freescale.com> Tested-by: Kalyani Chowdhury <Kalyani.Chowdhury@freescale.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au> Change-Id: Icfe3113e81a703b18a02dbb1ce74653f0b4f4e0e Reviewed-on: http://git.am.freescale.net:8181/11897 Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com> Reviewed-by: Alexandru Porosanu <alexandru.porosanu@freescale.com> Reviewed-by: Jose Rivera <German.Rivera@freescale.com>
2014-05-07crypto: caam - Fix uio job ring unbindingNitesh Lal
Job Ring UIO Driver registers are unmapped during driver detach while irq resources are released by devm_release_irq later. This result in a crash due to register space access done in irq handler being called from irq unmapping routine. Register mapping moved to devm_iomap for its unmapping after detach. Signed-off-by: Nitesh Lal <NiteshNarayanLal@freescale.com> Signed-off-by: Yashpal Dutta <yashpal.dutta@freescale.com> Change-Id: I4cea420d469bd40c01c7b4ea80d0f07cccdde4d9 Reviewed-on: http://git.am.freescale.net:8181/11652 Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com> Reviewed-by: Alexandru Porosanu <alexandru.porosanu@freescale.com> Reviewed-by: Jose Rivera <German.Rivera@freescale.com>
2014-05-07crypto: talitos - Replace the tasklet implementation with NAPISandeep Malik
This patch updates the current tasklet implement to NAPI so as the system is more balanced in the terms that the packet submission and the packet forwarding after being processed can be done at the same priority. During cherry pick the Kconfig change has not been picked because commit 62b8c978ee6b8d135d9e7953221de58000dba986 ("Rewind v3.13-rc3+ (78fd82238d0e5716) to v3.12") did not rewind drivers/crypto/Kconfig file, so the dependency of CRYPTO_DEV_TALITOS on NET is no longer required since it's already there. Signed-off-by: Sandeep Malik <Sandeep.Malik@freescale.com> Signed-off-by: Horia Geanta <horia.geanta@freescale.com> (cherry picked from commit d156604a4fdc9ee9030da37b65346c1affea4a5c) Change-Id: I2229831ee54c427655466283ce7810ae290d9aef Reviewed-on: http://git.am.freescale.net:8181/11917 Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com> Reviewed-by: Jose Rivera <German.Rivera@freescale.com>
2014-05-02crypto: caam/qi - make (#2) tls10 descriptors compatible with Era3 and Era2Tudor Ambarus
Prior commit - 96357638ce888b4a4c52622463370507eb54a904 (crypto: caam/qi - make tls10 descriptors compatible with Era3 and Era2) replaced Era3 and Era2 unsupported instructions. The length of the descriptor text was increased, but the specific macro (DESC_TLS10_ENC_LEN) was not updated. This led to uncovering two issues: - an incorect length value is being computed when checking if keys fit inline. - an incorect index in the descriptor buffer will be computed when using this macro. Signed-off-by: Tudor Ambarus <tudor.ambarus@freescale.com> Change-Id: I39a2e7cf795c4935a2fcec1315bc0cb5dd71e045 Reviewed-on: http://git.am.freescale.net:8181/11728 Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com> Reviewed-by: Mircea Pop <mircea.pop@freescale.com> Reviewed-by: Madalin-Cristian Bucur <madalin.bucur@freescale.com>
2014-05-01crypto: caam - Fix crash in caampkc module_initNitesh Lal
Added NULL check for private structure in caampkc module. It is NULL when the caam driver fails to properly initialize (e.g. RNG4 init failed), then the module should gracefully do a failed initialization. Signed-off-by: Nitesh Lal <NiteshNarayanLal@freescale.com> Change-Id: If5b3e6ead28c4f45e51b0b7d887fdc57d8a8d194 Reviewed-on: http://git.am.freescale.net:8181/11714 Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com> Reviewed-by: Ruchika Gupta <ruchika.gupta@freescale.com> Reviewed-by: Yashpal Dutta <yashpal.dutta@freescale.com> Reviewed-by: Jose Rivera <German.Rivera@freescale.com>
2014-04-30crypto: caam/qi - Fix key inlining in AEAD shared descriptorsVakul Garg
The variable 'keys_fit_inline' is initialised correctly to avoid using its stale value while creating shared descriptor for decryption and given-iv-encryption. Signed-off-by: Vakul Garg <vakul@freescale.com> Change-Id: Iac6521a229bbe2932b3052f8be795830cc533e4d Reviewed-on: http://git.am.freescale.net:8181/11566 Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com> Reviewed-by: Ruchika Gupta <ruchika.gupta@freescale.com> Reviewed-by: Horia Ioan Geanta Neag <horia.geanta@freescale.com> Reviewed-by: Jose Rivera <German.Rivera@freescale.com>
generated by cgit v0.10.2 at 2024-08-18 07:25:25 (GMT)