summaryrefslogtreecommitdiff
path: root/drivers/pinctrl
AgeCommit message (Collapse)Author
2013-04-03pinctrl: coh901: Fix error checking in u300_gpio_to_irqAxel Lin
The pointer "port" is always not NULL if gpio->port_list is not empty. Signed-off-by: Axel Lin <axel.lin@ingics.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-04-03pinctrl: pinctrl_select_state: set the old_state back on errorRichard Genoud
In unapply_new_state, the old state is re-applied, but p->state is not set back as it should. Signed-off-by: Richard Genoud <richard.genoud@gmail.com> Reviewed-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-04-03pinctrl: remove superfluous optimization in pinctrl_select_state_lockedRichard Genoud
As Stephen Warren suggested, checking first if the setting->node entry is the first in the list or not is superfluous, as it is checked again in the list_for_each_entry bellow. So, remove it, the code will be simpler and lighter ! Signed-off-by: Richard Genoud <richard.genoud@gmail.com> Reviewed-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-04-03pinctrl: use dev_info instead of pr_info in pinctrl_select_state_lockedRichard Genoud
And remove superfluous brackets. Signed-off-by: Richard Genoud <richard.genoud@gmail.com> Reviewed-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-04-03pinctrl: sunxi: add clock supportEmilio López
For the port controller to work, we need to enable the apb0_pio gate. This commit adds the ability to enable one clock specified on the device tree to the pinctrl driver. Signed-off-by: Emilio López <emilio@elopez.com.ar> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-04-03pinctrl: core: add dependence of GPIOLIBHaojian Zhuang
In file included from drivers/pinctrl/core.c:30:0: include/asm-generic/gpio.h: In function 'gpio_get_value_cansleep': include/asm-generic/gpio.h:270:2: error: implicit declaration of function '__gpio_get_value' [-Werror=implicit-function-declaration] include/asm-generic/gpio.h: In function 'gpio_set_value_cansleep': include/asm-generic/gpio.h:276:2: error: implicit declaration of function '__gpio_set_value' [-Werror=implicit-function-declaration] drivers/pinctrl/core.c: In function 'pinctrl_ready_for_gpio_range': drivers/pinctrl/core.c:297:9: error: implicit declaration of function 'gpio_to_chip' [-Werror=implicit-function-declaration] drivers/pinctrl/core.c:297:27: warning: initialization makes pointer from integer without a cast [enabled by default] drivers/pinctrl/core.c:304:45: error: dereferencing pointer to incomplete type drivers/pinctrl/core.c:305:26: error: dereferencing pointer to incomplete type drivers/pinctrl/core.c:305:39: error: dereferencing pointer to incomplete type cc1: some warnings being treated as errors make[2]: *** [drivers/pinctrl/core.o] Error 1 make[1]: *** [drivers/pinctrl] Error 2 make[1]: *** Waiting for unfinished jobs.... It's caused by CONFIG_GPIOLIB isn't enabled for some platform. So add the dependence on pinctrl_ready_for_gpio_range(). Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-04-03pinctrl/abx500: fix ab8505 alternate functionPatrice Chotard
This fix allows to correctly select default and alternate pin mode. By default for all ABx500 family chip, pin default mode is selected by clearing corresponding bit in GPIOSELx register except for pins which support alternate function, in this case, corresponding bit must be set. But, due to an unlogical hardware implementation, for one particular pin (GPIO11) reverse setting must be done. For that, update the alternate function array by declaring that this pin supports alternate function. Reported-by: Ramesh Chandrasekaran <ramesh.chandrasekaran@stericsson.com> Signed-off-by: Patrice Chotard <patrice.chotard@st.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-04-03Merge tag 'renesas-boards3-for-v3.10' of ↵Olof Johansson
git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/boards2 Third round of Renesas ARM SoC board updates for v3.10 Highlights: * Add Lager board support * Add ape6evm board support * Add Bock-W board support * Mackerel MMCIF/SDHI clean ups * Add ethernet support to kzm9g-reference This pull request is based on a merge of: git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas renesas-pinmux2-for-v3.10 git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas renesas-boards2-for-v3.10 The merge with renesas-pinmux2-for-v3.10 was made to provide run-time dependencies for the following changes: ARM: shmobile: APE6EVM LAN9220 support ARM: shmobile: APE6EVM PFC support * tag 'renesas-boards3-for-v3.10' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas: (307 commits) ARM: shmobile: mackerel: clean up MMCIF vs. SDHI1 selection ARM: shmobile: mackerel: add interrupt names for SDHI0 ARM: shmobile: mackerel: switch SDHI and MMCIF interfaces to slot-gpio ARM: shmobile: mackerel: remove OCR masks, where regulators are used ARM: shmobile: mackerel: SDHI resources do not have to be numbered ARM: shmobile: Initial r8a7790 Lager board support ARM: shmobile: APE6EVM LAN9220 support ARM: shmobile: APE6EVM PFC support ARM: shmobile: APE6EVM base support ARM: shmobile: kzm9g-reference: add ethernet support ARM: shmobile: add R-Car M1A Bock-W platform support sh-pfc: r8a73a4: Remove unused GPIO bias data ARM: shmobile: r8a73a4: Remove all GPIO enums sh-pfc: r8a73a4: Remove function GPIOs ARM: shmobile: r8a73a4: Remove IRQC function GPIOs ARM: shmobile: r8a73a4: Remove SCIF function GPIOs sh-pfc: r8a73a4: Remove IRQC function GPIOS sh-pfc: r8a73a4: Remove SCIF function GPIOS sh-pfc: r8a73a4: Add IRQC pin groups and functions sh-pfc: r8a73a4: Add SCIF pin groups and functions ... Signed-off-by: Olof Johansson <olof@lixom.net>
2013-04-03Merge tag 'renesas-pinmux2-for-v3.10' of ↵Olof Johansson
git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/soc2 Second round of Renesas ARM and SH based SoC pinmux updates for v3.10 Highlights: * Compilation fixes for sh7269 and for when CONFIG_BUG is not set * sh-pfc Support for r8a73a4 SoC * Move GPIOs handling from the PFC device to separate GPIO devices on the r8a7779 SoC This pull request is based on a merge of: git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas renesas-pinmux-for-v3.10 git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas renesas-soc2-for-v3.10 * tag 'renesas-pinmux2-for-v3.10' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas: (185 commits) sh-pfc: r8a73a4: Remove unused GPIO bias data ARM: shmobile: r8a73a4: Remove all GPIO enums sh-pfc: r8a73a4: Remove function GPIOs ARM: shmobile: r8a73a4: Remove IRQC function GPIOs ARM: shmobile: r8a73a4: Remove SCIF function GPIOs sh-pfc: r8a73a4: Remove IRQC function GPIOS sh-pfc: r8a73a4: Remove SCIF function GPIOS sh-pfc: r8a73a4: Add IRQC pin groups and functions sh-pfc: r8a73a4: Add SCIF pin groups and functions sh-pfc: r8a73a4: Add bias (pull-up/down) pinconf support sh-pfc: r8a73a4: GPIO IRQ support sh-pfc: r8a73a4: Support sparse GPIO numbers sh-pfc: Add r8a73a4 pinmux support sh-pfc: r8a7779: Split DU input and output pixel clocks sh-pfc: r8a7779: Remove GPIO data ARM: shmobile: r8a7779: Register GPIO devices sh-pfc: Configure pins as GPIOs at request time when handled externally sh-pfc: Skip gpiochip registration when no GPIO resource is found sh-pfc: Make GPIO support optional sh-pfc: Make function GPIOs support optional ... Signed-off-by: Olof Johansson <olof@lixom.net>
2013-04-03Merge tag 'renesas-soc2-for-v3.10' of ↵Olof Johansson
git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/soc2 Second round of Renesas ARM SoC updates for v3.10 Some Highlights: * Add r8a7790 SoC * Add r8a73a4 SoC * Migrate r8a7740 SoC from INTC to GIC * Add thermal driver support to r8a73a4 SoC * Add irqpin DT nodes to sh73a0 SoC * Add SCIF support to r8a7778 SoC This pull request is based on a merge of: git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas renesas-soc-for-v3.10 git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas renesas-intc-external-irq2-for-v3.10 * tag 'renesas-soc2-for-v3.10' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas: (88 commits) ARM: shmobile: r8a7790 SoC 64-bit DT support ARM: shmobile: r8a73a4 SoC 64-bit DT support ARM: shmobile: r8a7790 PFC support ARM: shmobile: r8a7790 IRQC support ARM: shmobile: r8a7790 SCIF support ARM: shmobile: Initial r8a7790 SoC support ARM: shmobile: r8a7779: move global functions to r8a7779.h ARM: shmobile: r8a7740: move global functions to r8a7740.h ARM: shmobile: sh73a0: move global functions to sh73a0.h ARM: shmobile: sh7372: move global functions to sh7372.h ARM: shmobile: r8a7779: remove DIV4 clocks and use fixed ratio clock ARM: shmobile: r8a7740: use fixed ratio clock ARM: shmobile: r8a7740: tidyup comment/implementation mismatch ARM: shmobile: sh73a0: use fixed ratio clock ARM: shmobile: sh7372: use fixed ratio clock ARM: shmobile: add struct clk_ratio and fixed ratio clock macro ARM: shmobile: sh7372: remove DIV4_ZT* clocks ARM: shmobile: sh73a0: remove DIV4_ZT* clocks ARM: shmobile: sh73a0: add a TWD clock ARM: shmobile: r8a7740: Migrate from INTC to GIC ... Signed-off-by: Olof Johansson <olof@lixom.net>
2013-04-03sh-pfc: r8a73a4: Remove unused GPIO bias dataMagnus Damm
Remove unused pull-up/down data from the r8a73a4 PFC code. Signed-off-by: Magnus Damm <damm@opensource.se> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2013-04-03sh-pfc: r8a73a4: Remove function GPIOsMagnus Damm
All r8a73a4 platforms use the pinctrl API to control pin functions. Function GPIOs are no longer needed. Signed-off-by: Magnus Damm <damm@opensource.se> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2013-04-03sh-pfc: r8a73a4: Remove IRQC function GPIOSMagnus Damm
The r8a73a4 board support will use the pinctrl API to control the external IRQ pins so remove the unused function GPIOS. Signed-off-by: Magnus Damm <damm@opensource.se> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2013-04-03sh-pfc: r8a73a4: Remove SCIF function GPIOSMagnus Damm
The r8a73a4 board support will use the pinctrl API to control the SCIF pins, remove the corresponding unused function GPIOS. Signed-off-by: Magnus Damm <damm@opensource.se> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2013-04-03sh-pfc: r8a73a4: Add IRQC pin groups and functionsMagnus Damm
V2 of PINCTRL support for r8a73a4 IRQC hardware and in particular the external pins IRQ0 -> IRQ57. Signed-off-by: Magnus Damm <damm@opensource.se> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2013-04-03sh-pfc: r8a73a4: Add SCIF pin groups and functionsMagnus Damm
Add PINCTRL support for r8a73a4 SCIF ports SCIFA0->SCIFA1 and SCIFB0->SCIFB3. Signed-off-by: Magnus Damm <damm@opensource.se> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2013-04-03sh-pfc: r8a73a4: Add bias (pull-up/down) pinconf supportMagnus Damm
Implement pull-up/down support for r8a73a4 similar to the implementation for sh73a0. Signed-off-by: Magnus Damm <damm@opensource.se> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2013-04-03sh-pfc: r8a73a4: GPIO IRQ supportMagnus Damm
V2 of code to add GPIO -> IRQ mappings to the PFC table for the r8a73a4 SoC. Requires the IRQs to be mapped at a fixed location in Linux IRQ space. The actual IRQs are not handled by the PFC, instead IRQC is used on r8a73a4. Signed-off-by: Magnus Damm <damm@opensource.se> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2013-04-03sh-pfc: r8a73a4: Support sparse GPIO numbersMagnus Damm
The r8a73a4 SoC has sparse GPIO numbers. Declare ranges for pin numbers in the PFC SoC data. Pin numbers shall be used with the GPIO API from this point on. Signed-off-by: Magnus Damm <damm@opensource.se> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2013-04-03sh-pfc: Add r8a73a4 pinmux supportMagnus Damm
Add initial PFC support for the r8a73a4 SoC. At this point only GPIO interface is supported, move to newer interfaces planned as incremental changes. Original authors are Morimoto-san with help from Yoshii-san, thanks to them for the heavy lifting. Adjusted by Magnus to work together with updated code in drivers/pinctrl. Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Signed-off-by: Takashi Yoshii <takashi.yoshii.zj@renesas.com> Signed-off-by: Magnus Damm <damm@opensource.se> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2013-04-03sh-pfc: r8a7779: Split DU input and output pixel clocksLaurent Pinchart
The output pixel clocks can be used without the input pixel clocks. Split them in different groups. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2013-04-03sh-pfc: r8a7779: Remove GPIO dataLaurent Pinchart
GPIOs are now handled by a separate driver, remove GPIO data from the SoC information structure. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2013-04-03sh-pfc: Configure pins as GPIOs at request time when handled externallyLaurent Pinchart
When a GPIO is handled by a separate driver the pinmux gpio_set_direction() handler won't be called. The pin mux type then need to be configured to GPIO at request time. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2013-04-03sh-pfc: Skip gpiochip registration when no GPIO resource is foundLaurent Pinchart
Boards/platforms that register dedicated GPIO devices will not supply a memory resource for GPIOs. Try to locate the GPIO memory resource at initialization time, and skip registration of the gpiochip if the resource can't be found. This is a temporary modification to ease the transition to separate GPIO drivers. It should be reverted when all boards and platforms will have been moved. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2013-04-03sh-pfc: Make GPIO support optionalLaurent Pinchart
When implemented as a separate IP block, GPIOs should be handled by a separate driver. To make this possible GPIO support needs to be optional in the sh-pfc driver. If no GPIO data registers are supplied in the SoC information structure skip registration of the gpiochip. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2013-04-03sh-pfc: Make function GPIOs support optionalLaurent Pinchart
The target is to get rid of function GPIOs completely. To reach this, make function GPIOs support optional by skipping the function GPIO chip registration if no function GPIOS are defined in SoC data. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2013-04-02sh-pfc: r8a7779: Don't use GPIO enum entriesLaurent Pinchart
Refactor the GPIO macro magic to use GPIO numbers directly instead of the GPIO_GP_x_y enum entries. This will allow removing the GPIO enum entries from the mach/r8a7779.h header. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2013-04-02sh-pfc: r8a7779: Remove function GPIOsLaurent Pinchart
All r8a7779 platforms use the pinctrl API to control functions. Function GPIOs are unused and unneeded, remove them. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2013-04-02sh-pfc: Fix compiler warning when BUG()Laurent Pinchart
The sh_pfc_phys_to_virt() function ends with a BUG() statement without a return. When CONFIG_BUG isn't set the function will thus have no return value. Fix it. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2013-04-02Merge branch 'soc' into pinmux-baseSimon Horman
Conflicts: drivers/pinctrl/sh-pfc/pfc-r8a7740.c This merge is to provide r8a73a4 SoC files, which are added in the soc branch and depended on by r8a73a4 pfc-changes which are to be added to the pinmux branch.
2013-04-02ARM: shmobile: r8a7740: Migrate from INTC to GICBastian Hecht
With the added capabilty of the intc_irqpin driver to handle shared external IRQs, all prerequisites are fulfilled and we are ready to migrate completely to GIC. This includes the following steps: - Kconfig: select ARM_GIC and RENESAS_INTC_IRQPIN - intc-r8a7740: Throw out all legacy INTC code and init the GIC. We need to mask out all shared IRQs as it is needed by the shared intc_irqpin driver. - setup-r8a7740: Add 4 irqpin devices to handle external IRQs and update all IRQ numbers to point to the GIC SPI. - board-armadillo: Update all IRQ numbers to point to the GIC SPI. - pfc-r8a7740: Update all IRQ numbers of the GPIOs to point to the GIC SPI. Signed-off-by: Bastian Hecht <hechtb+renesas@gmail.com> Acked-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2013-03-27pinctrl: mvebu: prevent walking off the end of group arrayDavid Woodhouse
While investigating (ab)use of krealloc, David found this bug. It's unlikely to occur, but now we detect the condition and error out appropriately. Signed-off-by: David Woodhouse <David.Woodhouse@intel.com> Signed-off-by: Jason Cooper <jason@lakedaemon.net> Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Acked-by: Jason Cooper <jason@lakedaemon.net> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-03-27pinctrl: re-enable old state in case of error in pinctrl_select_stateRichard Genoud
If a new state is applied, the groups configured in the old state but not in the new state are disabled. If something goes wrong and the new state can't be applied, we have to re-enable those groups. Signed-off-by: Richard Genoud <richard.genoud@gmail.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-03-27pinctrl: disable and free setting in select_state in case of errorRichard Genoud
If enabling a pin fails in pinctrl_select_state_locked(), all the previous enabled pins have to be disabled to get back to the previous state. Signed-off-by: Richard Genoud <richard.genoud@gmail.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-03-27pinctrl: create pinctrl_free_setting functionRichard Genoud
This prepares the implementation of pinctrl_select_state_locked() free code. No functionnal change. Signed-off-by: Richard Genoud <richard.genoud@gmail.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-03-27pinctrl: fix typo in headerRichard Genoud
Clearly, "node" was meant instead of "not" Signed-off-by: Richard Genoud <richard.genoud@gmail.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-03-27pinctrl: sirf: using for_each_set_bit to simplify the codeWei Yongjun
Using for_each_set_bit() to simplify the code. Signed-off-by: Wei Yongjun <yongjun_wei@trendmicro.com.cn> Acked-by: Barry Song <Baohua.Song@csr.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-03-27pinctrl: coh901: Fix checkpatch errorSachin Kamat
Fixes the following checkpatch error: ERROR: space required before the open parenthesis '(' Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-03-27pinctrl: generic: Fix checkpatch errorsSachin Kamat
Fixes the following type of checkpatch errors: ERROR: space required before the open parenthesis '(' Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-03-27pinctrl: generic: Make 'conf_items' staticSachin Kamat
'conf_items' is used only in this file. Silences the below sparse warning: drivers/pinctrl/pinconf-generic.c:37:24: warning: symbol 'conf_items' was not declared. Should it be static? Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-03-27pinctrl: at91: Fix checkpatch errorsSachin Kamat
Fixes the following types of checkpatch errors: ERROR: "foo * bar" should be "foo *bar" ERROR: "foo* bar" should be "foo *bar" ERROR: space required before the open parenthesis '(' ERROR: "(foo*)" should be "(foo *)" ERROR: space required after that ',' (ctx:WxV) ERROR: "(foo*const*)" should be "(foo *const*)" ERROR: space required before that '*' (ctx:VxB) Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-03-27pinctrl: at91: Remove duplicate constSachin Kamat
const declared twice. Fixes the following sparse warning: drivers/pinctrl/pinctrl-at91.c:815:21: warning: duplicate const drivers/pinctrl/pinctrl-at91.c:849:21: warning: duplicate const Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-03-27pinctrl: exynos5440: fix invalid use of sizeof in exynos5440_pinctrl_probe()Wei Yongjun
sizeof() when applied to a pointer typed expression gives the size of the pointer, not that of the pointed data. Signed-off-by: Wei Yongjun <yongjun_wei@trendmicro.com.cn> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-03-27pinctrl/nomadik: Fix checkpatch errorsSachin Kamat
Fixes the following types of checkpatch errors: ERROR: space required after that ',' (ctx:VxV) ERROR: space prohibited before that close parenthesis ')' Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-03-27pinctrl/nomadik-db8500: Fix checkpatch errorsSachin Kamat
Silences the following type of checkpatch errors: ERROR: space required after that ',' (ctx:VxV) Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-03-27pinctrl: remove pxa pinctrl driverHaojian Zhuang
pinctrl-pxa driver doesn't support well on DT mode. Now pinctrl-single could support DT mode & pin configuration. Use pinctrl-single driver to support MMP/PXA silicons instead. Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-03-26arm: Move chained_irq_(enter|exit) to a generic fileCatalin Marinas
These functions have been introduced by commit 10a8c383 (irq: introduce entry and exit functions for chained handlers) in asm/mach/irq.h. This patch moves them to linux/irqchip/chained_irq.h so that generic irqchip drivers do not rely on architecture specific header files. Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> Tested-by: Marc Zyngier <marc.zyngier@arm.com> Cc: Russell King <linux@arm.linux.org.uk> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Rob Herring <rob.herring@calxeda.com>
2013-03-25pinctrl: sirf: convert to linear irq domainArnd Bergmann
The sirf platforms use no hardcoded IRQ numbers, so there is no reason to use the legacy domain, and by converting to the linear domain, we get a more efficient representation of sparse IRQs and remove the dependency on the mach/irqs.h header file. Signed-off-by: Arnd Bergmann <arnd@arndb.de> Cc: Linus Walleij <linus.walleij@linaro.org>
2013-03-24Merge tag 'pinctrl-fixes-for-v3.9' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl Pull pinctrl fixes from Linus Walleij: "Here are a few pinctrl fixes for the v3.9 rc series: - Usecount bounds checking so we do not go below zero on mux usecounts. - Loop range checking in GPIO ranges in the DT range parser. - Proper print in debugfs for pinconf state. - Fix compilation bug in generic pinconf code. - Minor bugfixes to abx500 and mvebu drivers." * tag 'pinctrl-fixes-for-v3.9' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: pinmux: forbid mux_usecount to be set at UINT_MAX pinctrl: mvebu: fix checking for SoC specific controls pinctrl: generic: Fix compilation error pinctrl: Print the correct information in debugfs pinconf-state file pinctrl: abx500: Fix checking if pin use AlternateFunction register gpio: fix wrong checking condition for gpio range
2013-03-21pinmux: forbid mux_usecount to be set at UINT_MAXRichard Genoud
If pin_free is called on a pin already freed, mux_usecount is set to UINT_MAX which is really a bad idea. This will issue a warning, so that we can correct the code responsible for the double free. Signed-off-by: Richard Genoud <richard.genoud@gmail.com> Reviewed-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
generated by cgit v0.10.2 at 2024-08-29 20:03:14 (GMT)