Age | Commit message (Collapse) | Author |
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ACPI part of the driver accidentally used sizeof(*ssp) instead of the
correct sizeof(*pdata). This leads to nasty memory corruptions like the one
below:
BUG: unable to handle kernel paging request at 0000000749fd30b8
IP: [<ffffffff813fe8a1>] __list_del_entry+0x31/0xd0
PGD 0
Oops: 0000 [#1] PREEMPT SMP
Modules linked in:
CPU: 0 PID: 30 Comm: kworker/0:1 Not tainted 3.10.0-rc6v3.10-rc6_sdhci_modprobe+ #443
task: ffff8801483a0940 ti: ffff88014839e000 task.ti: ffff88014839e000
RIP: 0010:[<ffffffff813fe8a1>] [<ffffffff813fe8a1>] __list_del_entry+0x31/0xd0
RSP: 0000:ffff88014839fde8 EFLAGS: 00010046
RAX: ffff880149fd30b0 RBX: ffff880149fd3040 RCX: dead000000200200
RDX: 0000000749fd30b0 RSI: ffff880149fd3058 RDI: ffff88014834d640
RBP: ffff88014839fde8 R08: ffff88014834d640 R09: 0000000000000001
R10: ffff8801483a0940 R11: 0000000000000001 R12: ffff880149fd3040
R13: ffffffff810e0b30 R14: ffff8801483a0940 R15: ffff88014834d640
FS: 0000000000000000(0000) GS:ffff880149e00000(0000) knlGS:0000000000000000
CS: 0010 DS: 0000 ES: 0000 CR0: 0000000080050033
CR2: 0000000000000168 CR3: 0000000001e0b000 CR4: 00000000001407f0
DR0: 0000000000000000 DR1: 0000000000000000 DR2: 0000000000000000
DR3: 0000000000000000 DR6: 00000000ffff0ff0 DR7: 0000000000000400
Stack:
ffff88014839fe48 ffffffff810e0baf ffffffff81120abd ffff88014839fe20
ffff8801483a0940 ffff8801483a0940 ffff8801483a0940 ffff8801486b1c90
ffff88014834d640 ffffffff810e0b30 0000000000000000 0000000000000000
Call Trace:
[<ffffffff810e0baf>] worker_thread+0x7f/0x390
[<ffffffff81120abd>] ? trace_hardirqs_on+0xd/0x10
[<ffffffff810e0b30>] ? manage_workers.isra.22+0x2b0/0x2b0
[<ffffffff810e6c09>] kthread+0xd9/0xe0
[<ffffffff810f93df>] ? local_clock+0x3f/0x50
[<ffffffff810e6b30>] ? kthread_create_on_node+0x110/0x110
[<ffffffff818c5dec>] ret_from_fork+0x7c/0xb0
[<ffffffff810e6b30>] ? kthread_create_on_node+0x110/0x110
Fix this by using the right structure size in devm_kzalloc().
Reported-by: Jerome Blin <jerome.blin@intel.com>
Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
Cc: stable@vger.kernel.org # 3.9+
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pxa2xx_spi_map_dma_buffer() gets called in tasklet context so we can't
sleep when we allocate a new sg table. Use GFP_ATOMIC here instead.
Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
Cc: stable@vger.kernel.org
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If the device is already in a runtime PM enabled state
pm_runtime_get_sync() will return 1, so a test for negative
value should be used to check for errors.
Without this patch there are seen errors like:
[ 8.540000] s3c64xx-spi 13930000.spi: Failed to enable device: 1
[ 8.545000] spi_master spi1: failed to prepare transfer hardware
Likely because the driver uses synchronous API to runtime enable
the device and asynchronous one to disable it.
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Mark Brown <broonielinaro.org>
Cc: stable@vger.kernel.org
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Current HSPI driver is using msleep(20) on hspi_status_check_timeout(),
but it was too long delay for SPI device.
Bock-W board SPI access was too slow without this patch.
This patch uses udelay(10) for it.
Tested-by: Yusuke Goda <yusuke.goda.sx@renesas.com>
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
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The ISR currently consumes the rx buffer data and re-enables transmission
from within interrupt context. This is bad because if the interrupt
occurs again before the ISR exits, the new interrupt will be erroneously
cleared by the still completing ISR.
Simplified the ISR by just setting the completion variable and exiting with
no action. Then just looped the transmit functionality in
xilinx_spi_txrx_bufs().
Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
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Fix to return -ENOMEM in the platform_device_alloc() error handling
case instead of 0, as done elsewhere in this function.
Signed-off-by: Wei Yongjun <yongjun_wei@trendmicro.com.cn>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
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free_irq() expects the same pointer that was passed to request_irq(), otherwise
the IRQ is not freed.
The issue was found using the following coccinelle script:
<smpl>
@r1@
type T;
T devid;
@@
request_irq(..., devid)
@r2@
type r1.T;
T devid;
position p;
@@
free_irq@p(..., devid)
@@
position p != r2.p;
@@
*free_irq@p(...)
</smpl>
Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
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git://git.kernel.org/pub/scm/linux/kernel/git/wsa/linux
Pull devm usage cleanup from Wolfram Sang:
"Lately, I have been experimenting how to improve the devm interface to
make writing device drivers easier and less error prone while also
getting rid of its subtle issues. I think it has more potential but
still needs work and definately conistency, especiall in its usage.
The first thing I come up with is a low hanging fruit regarding
devm_ioremap_resouce(). This function already checks if the passed
resource is valid and gives an error message if not. So, we can
remove similar checks from the drivers and get rid of a bit of code
and a number of inconsistent error strings.
This series only removes the unneeded check iff devm_ioremap_resource
follows platform_get_resource directly. The previous version tried to
shuffle code if needed, too, what lead to an embarrasing bug. It
turned out to me that shuffling code for all cases found will make the
automated script too complex, so I am unsure if an automated cleanup
is the proper tool for this case. Removing the easy stuff seems
worthwhile to me, though.
Despite various architectures and platform dependencies, I managed to
compile test 45 out of 57 modified files locally using heuristics and
defconfigs."
Pulled because: 296 deletions, 0 additions.
* 'devm_no_resource_check' of git://git.kernel.org/pub/scm/linux/kernel/git/wsa/linux: (33 commits)
sound/soc/kirkwood: don't check resource with devm_ioremap_resource
sound/soc/fsl: don't check resource with devm_ioremap_resource
arch/mips/lantiq/xway: don't check resource with devm_ioremap_resource
arch/arm/plat-samsung: don't check resource with devm_ioremap_resource
arch/arm/mach-tegra: don't check resource with devm_ioremap_resource
drivers/watchdog: don't check resource with devm_ioremap_resource
drivers/w1/masters: don't check resource with devm_ioremap_resource
drivers/video/omap2/dss: don't check resource with devm_ioremap_resource
drivers/video/omap2: don't check resource with devm_ioremap_resource
drivers/usb/phy: don't check resource with devm_ioremap_resource
drivers/usb/host: don't check resource with devm_ioremap_resource
drivers/usb/gadget: don't check resource with devm_ioremap_resource
drivers/usb/chipidea: don't check resource with devm_ioremap_resource
drivers/thermal: don't check resource with devm_ioremap_resource
drivers/staging/nvec: don't check resource with devm_ioremap_resource
drivers/staging/dwc2: don't check resource with devm_ioremap_resource
drivers/spi: don't check resource with devm_ioremap_resource
drivers/rtc: don't check resource with devm_ioremap_resource
drivers/pwm: don't check resource with devm_ioremap_resource
drivers/pinctrl: don't check resource with devm_ioremap_resource
...
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devm_ioremap_resource does sanity checks on the given resource. No need to
duplicate this in the driver.
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
Acked-by: Stephen Warren <swarren@nvidia.com>
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Pull removal of GENERIC_GPIO from Grant Likely:
"GENERIC_GPIO now synonymous with GPIOLIB. There are no longer any
valid cases for enableing GENERIC_GPIO without GPIOLIB, even though it
is possible to do so which has been causing confusion and breakage.
This branch does the work to completely eliminate GENERIC_GPIO."
* tag 'gpio-for-linus' of git://git.secretlab.ca/git/linux:
gpio: update gpio Chinese documentation
Remove GENERIC_GPIO config option
Convert selectors of GENERIC_GPIO to GPIOLIB
blackfin: force use of gpiolib
m68k: coldfire: use gpiolib
mips: pnx833x: remove requirement for GENERIC_GPIO
openrisc: default GENERIC_GPIO to false
avr32: default GENERIC_GPIO to false
xtensa: remove explicit selection of GENERIC_GPIO
sh: replace CONFIG_GENERIC_GPIO by CONFIG_GPIOLIB
powerpc: remove redundant GENERIC_GPIO selection
unicore32: default GENERIC_GPIO to false
unicore32: remove unneeded select GENERIC_GPIO
arm: plat-orion: use GPIO driver on CONFIG_GPIOLIB
arm: remove redundant GENERIC_GPIO selection
mips: alchemy: require gpiolib
mips: txx9: change GENERIC_GPIO to GPIOLIB
mips: loongson: use GPIO driver on CONFIG_GPIOLIB
mips: remove redundant GENERIC_GPIO select
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git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM SoC late cleanups from Arnd Bergmann:
"These are cleanups and smaller changes that either depend on earlier
feature branches or came in late during the development cycle. We
normally try to get all cleanups early, so these are the exceptions:
- A follow-up on the clocksource reworks, hopefully the last time we
need to merge clocksource subsystem changes through arm-soc.
A first set of patches was part of the original 3.10 arm-soc
cleanup series because of interdependencies with timer drivers now
moved out of arch/arm.
- Migrating the SPEAr13xx platform away from using auxdata for DMA
channel descriptions towards using information in device tree,
based on the earlier SPEAr multiplatform series
- A few follow-ups on the Atmel SAMA5 support and other changes for
Atmel at91 based on the larger at91 reworks.
- Moving the armada irqchip implementation to drivers/irqchip
- Several OMAP cleanups following up on the larger series already
merged in 3.10."
* tag 'cleanup-for-linus-2' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (50 commits)
ARM: OMAP4: change the device names in usb_bind_phy
ARM: OMAP2+: Fix mismerge for timer.c between ff931c82 and da4a686a
ARM: SPEAr: conditionalize SMP code
ARM: arch_timer: Silence debug preempt warnings
ARM: OMAP: remove unused variable
serial: amba-pl011: fix !CONFIG_DMA_ENGINE case
ata: arasan: remove the need for platform_data
ARM: at91/sama5d34ek.dts: remove not needed compatibility string
ARM: at91: dts: add MCI DMA support
ARM: at91: dts: add i2c dma support
ARM: at91: dts: set #dma-cells to the correct value
ARM: at91: suspend both memory controllers on at91sam9263
irqchip: armada-370-xp: slightly cleanup irq controller driver
irqchip: armada-370-xp: move IRQ handler to avoid forward declaration
irqchip: move IRQ driver for Armada 370/XP
ARM: mvebu: move L2 cache initialization in init_early()
devtree: add binding documentation for sp804
ARM: integrator-cp: convert use CLKSRC_OF for timer init
ARM: versatile: use OF init for sp804 timer
ARM: versatile: add versatile dtbs to dtbs target
...
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git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM SoC device tree updates (part 2) from Arnd Bergmann:
"These are mostly new device tree bindings for existing drivers, as
well as changes to the device tree source files to add support for
those devices, and a couple of new boards, most notably Samsung's
Exynos5 based Chromebook.
The changes depend on earlier platform specific updates and touch the
usual platforms: omap, exynos, tegra, mxs, mvebu and davinci."
* tag 'dt-for-linus-2' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (169 commits)
ARM: exynos: dts: cros5250: add EC device
ARM: dts: Add sbs-battery for exynos5250-snow
ARM: dts: Add i2c-arbitrator bus for exynos5250-snow
ARM: dts: add mshc controller node for Exynos4x12 SoCs
ARM: dts: Add chip-id controller node on Exynos4/5 SoC
ARM: EXYNOS: Create virtual I/O mapping for Chip-ID controller using device tree
ARM: davinci: da850-evm: add SPI flash support
ARM: davinci: da850: override SPI DT node device name
ARM: davinci: da850: add SPI1 DT node
spi/davinci: add DT binding documentation
spi/davinci: no wildcards in DT compatible property
ARM: dts: mvebu: Convert mvebu device tree files to 64 bits
ARM: dts: mvebu: introduce internal-regs node
ARM: dts: mvebu: Convert all the mvebu files to use the range property
ARM: dts: mvebu: move all peripherals inside soc
ARM: dts: mvebu: fix cpus section indentation
ARM: davinci: da850: add EHRPWM & ECAP DT node
ARM/dts: OMAP3: fix pinctrl-single configuration
ARM: dts: Add OMAP3430 SDP NOR flash memory binding
ARM: dts: Add NOR flash bindings for OMAP2420 H4
...
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This is support for the ARM Chromebook, originally scheduled
as a "late" pull request. Since it's already late now, we
can combine this into the existing next/dt2 branch.
* late/dt:
ARM: exynos: dts: cros5250: add EC device
ARM: dts: Add sbs-battery for exynos5250-snow
ARM: dts: Add i2c-arbitrator bus for exynos5250-snow
ARM: dts: Add chip-id controller node on Exynos4/5 SoC
ARM: EXYNOS: Create virtual I/O mapping for Chip-ID controller using device tree
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Fix using PIO transfer mode only support 8 bits transfer, doesn't support 16 bits.
Signed-off-by: Richard Genoud <richard.genoud@gmail.com>
[wenyou.yang@atmel.com: submit the patch]
Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
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git://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi
Pull spi updates from Mark Brown:
"A fairly quiet release for SPI, mainly driver work. A few highlights:
- Supports bits per word compatibility checking in the core.
- Allow use of the IP used in Freescale SPI controllers outside
Freescale SoCs.
- DMA support for the Atmel SPI driver.
- New drivers for the BCM2835 and Tegra114"
* tag 'spi-v3.10' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi: (68 commits)
spi-topcliff-pch: fix to use list_for_each_entry_safe() when delete list items
spi-topcliff-pch: missing platform_driver_unregister() on error in pch_spi_init()
ARM: dts: add pinctrl property for spi node for atmel SoC
ARM: dts: add spi nodes for the atmel boards
ARM: dts: add spi nodes for atmel SoC
ARM: at91: add clocks for spi dt entries
spi/spi-atmel: add dmaengine support
spi/spi-atmel: add flag to controller data for lock operations
spi/spi-atmel: add physical base address
spi/sirf: fix MODULE_DEVICE_TABLE
MAINTAINERS: Add git repository and update my address
spi/s3c64xx: Check for errors in dmaengine prepare_transfer()
spi/s3c64xx: Fix non-dmaengine usage
spi: omap2-mcspi: fix error return code in omap2_mcspi_probe()
spi/s3c64xx: let device core setup the default pin configuration
MAINTAINERS: Update Grant's email address and maintainership
spi: omap2-mcspi: Fix transfers if DMADEVICES is not set
spi: s3c64xx: move to generic dmaengine API
spi-gpio: init CS before spi_bitbang_setup()
spi: spi-mpc512x-psc: let transmiter/receiver enabled when in xfer loop
...
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Since we will remove items off the list using list_del_init() we need
to use a safe version of the list_for_each_entry() macro aptly named
list_for_each_entry_safe().
Signed-off-by: Wei Yongjun <yongjun_wei@trendmicro.com.cn>
Signed-off-by: Mark Brown <broonie@sirena.org.uk>
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pch_spi_init()
Add the missing platform_driver_unregister() before return
from pch_spi_init() in the error handling case.
Signed-off-by: Wei Yongjun <yongjun_wei@trendmicro.com.cn>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
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Add dmaengine support.
Using "has_dma_support" member of struct is used to select
the transfer mode: dmaengine or pdc.
For the dmaengine transfer mode, it supports both 8 bits and 16 bits transfer.
For the dmaengine transfer mode, if it fails to config dmaengine,
or if the message length is less than 16 bytes, it will use the PIO transfer mode.
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
[wenyou.yang@atmel.com: using "has_dma_support" to select dmaengine as the spi xfer mode]
[wenyou.yang@atmel.com: fix DMA: OOPS if buffer > 4096 bytes]
[wenyou.yang@atmel.com: submit the patch]
Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
Signed-off-by: Richard Genoud <richard.genoud@gmail.com>
[richard.genoud@gmail.com: update with dmaengine interface]
[richard.genoud@gmail.com: fix __init/__devinit sections mismatch]
[richard.genoud@gmail.com: adapt to slave_config changes]
[richard.genoud@gmail.com: add support t0 16 bits transfer]
Tested-by: Richard Genoud <richard.genoud@gmail.com>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
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Will allow to drop the lock during DMA operations.
Replacing non-irqsave versions with irqsave versions of the lock
to make it correct in both pdc and dmaengine transfer mode
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
[wenyou.yang@atmel.com: submit the patch]
Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
Tested-by: Richard Genoud <richard.genoud@gmail.com>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
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Needed for future use with dmaengine enabled driver.
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
[wenyou.yang@atmel.com: submit the patch]
Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
Tested-by: Richard Genoud <richard.genoud@gmail.com>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
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This fixes building the spi-sirf driver as a loadable module, which uses
an incorrect MODULE_DEVICE_TABLE, by changing the reference to the
correct symbol.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
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This is a series originally prepared for inclusion in 3.9, which did
not work out because of dependencies on the dmaengine driver. All the
changes for the dmaengine code are merged in 3.9 now, so we can finally
do the switchover and remove the now unnecessary dma definitions for
spear13xx from the platform code.
The dma platform_data actually made up the majority of the spear13xx
platform code overall, so moving that into device tree files makes the
code substantially smaller.
* spear/dwdma:
ata: arasan: remove the need for platform_data
ARM: SPEAr13xx: Pass generic DW DMAC platform data from DT
serial: pl011: use generic DMA slave configuration if possible
spi: pl022: use generic DMA slave configuration if possible
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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Don't silently ignore errors, report them.
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
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The multiplatform conversion in commit 788437 (spi: s3c64xx: move to
generic dmaengine API) tested for the use of the Samsung-specific DMA
API with SAMSUNG_DMADEV when in fact S3C_DMA should be used. This
renderd DMA based transfers non-functional on platforms not using
dmaengine.
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
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Fix to return a negative error code from the error handling
case instead of 0, as returned elsewhere in this function.
Signed-off-by: Wei Yongjun <yongjun_wei@trendmicro.com.cn>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
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git://git.kernel.org/pub/scm/linux/kernel/git/nsekhar/linux-davinci into next/dt2
From Sekhar Nori:
v3.10 DT updates for DaVinci
This set of patches adds support for PWMs and SPI
controller present on DA850 and for SPI flash present on
DA850 EVM.
* tag 'davinci-for-v3.10/dt-2-v2' of git://git.kernel.org/pub/scm/linux/kernel/git/nsekhar/linux-davinci:
ARM: davinci: da850-evm: add SPI flash support
ARM: davinci: da850: override SPI DT node device name
ARM: davinci: da850: add SPI1 DT node
spi/davinci: add DT binding documentation
spi/davinci: no wildcards in DT compatible property
ARM: davinci: da850: add EHRPWM & ECAP DT node
ARM: davinci: da850: override mmc DT node device name
ARM: davinci: da850: add mmc DT entries
mmc: davinci_mmc: add DT support
ARM: davinci: da850: add tps6507x regulator DT data
ARM: regulator: add tps6507x device tree data
ARM: davinci: remove test for undefined Kconfig macro
ARM: davinci: mmc: derive version information from device name
ARM: davinci: da850: add ECAP & EHRPWM clock nodes
ARM: davinci: clk framework support for enable/disable functionality
Signed-off-by: Olof Johansson <olof@lixom.net>
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Follow DT naming convention for compatible property of the blob.
Use first chip name that introduced the specific version of the
device.
Signed-off-by: Manjunathappa, Prakash <prakash.pm@ti.com>
Acked-by: Grant Likely <grant.likely@secretlab.ca>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
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With device core now able to setup the default pin configuration,
the pin configuration code based on the deprecated Samsung specific
gpio bindings is removed.
Signed-off-by: Thomas Abraham <thomas.abraham@linaro.org>
Signed-off-by: Doug Anderson <dianders@chromium.org>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Reviewed-by: Doug Anderson <dianders@chromium.org>
Tested-by: Doug Anderson <dianders@chromium.org>
Signed-off-by: Grant Likely <grant.likely@linaro.org>
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GENERIC_GPIO is now equivalent to GPIOLIB and features that depended on
GENERIC_GPIO can now depend on GPIOLIB to allow removal of this option.
Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Acked-by: Grant Likely <grant.likely@secretlab.ca>
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Selecting CONFIG_DMADEVICES is optional, and we must
be able to continue even without DMA. Otherwise things
like omap4430sdp nfsroot will fail if DMA is not
selected.
Note that the driver already supports PIO mode, but
we fail to fall back to PIO if requesting DMA channels
fails.
Signed-off-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
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The spi-s3c64xx uses a Samsung proprietary interface for
talking to the DMA engine, which does not work with
multiplatform kernels.
This version of the patch leaves the old code in place,
behind an #ifdef. This can be removed in the future,
after the s3c64xx platform start supporting the regular
dmaengine interface. An earlier version of this patch was
tested successfully on exynos5250 by Padma Venkat.
The conversion was rather mechanical, since the samsung
interface is just a shallow wrapper around the dmaengine
interface.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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spi_bitbang_setup() deasserts the chip select line to initialise
the device. The chip select GPIO line is obtained from
spi_gpio->cs_gpios[] private data.
Currently, devices that are not registered under devicetree
environment will call into spi_bitbang_setup() with stale
cs_gpios[].
This patch ensures spi_gpio->cs_gpios[] is always initialised prior
to calling spi_bitbang_setup().
Reviewed-by: Daniel Mack <zonque@gmail.com>
Signed-off-by: Josef Ahmad <josef.ahmad@intel.com>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
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There is no need to disable transmitter/receiver after each loop
iteration and re-enable it for next loop iteration. Enable the
transmitter/receiver before xfer loop starts and disable it when
the whole transfer is done.
Signed-off-by: Anatolij Gustschin <agust@denx.de>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
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Currently the driver only uses one internal chip select.
Add support for gpio chip selects configured by cs-gpios
DT binding.
Signed-off-by: Anatolij Gustschin <agust@denx.de>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
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speed_hz is a write only member, so we can safely remove it and its
generation. Also fixes the missing clk_put after getting the periph
clock.
Signed-off-by: Jonas Gorski <jogo@openwrt.org>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
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Neither tegra20_spi_cdata nor tegra30_spi_cdata are used outside this
file so they can, and should, be static.
Signed-off-by: Wei Yongjun <yongjun_wei@trendmicro.com.cn>
Reviewed-by: Thierry Reding <thierry.reding@avionic-design.de>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
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Use the newly introduced devm_ioremap_resource() instead of
devm_request_and_ioremap() which provides more consistent error handling.
devm_ioremap_resource() provides its own error messages; so all explicit
error messages can be removed from the failure code paths.
Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org>
Acked-by: Eric Miao <eric.y.miao@gmail.com>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
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Fix below module build error:
CC [M] drivers/spi/spi-davinci.o
drivers/spi/spi-davinci.c:774:1: error: '__mod_of_device_table' aliased
to undefined symbol 'davini_spi_of_match'
drivers/spi/spi-davinci.c:774:1: error: '__mod_of_device_table' aliased
to undefined symbol 'davini_spi_of_match'
make[2]: *** [drivers/spi/spi-davinci.o] Error 1
make[1]: *** [drivers/spi] Error 2
make[1]: *** Waiting for unfinished jobs....
make: *** [drivers] Error 2
Signed-off-by: Manjunathappa, Prakash <prakash.pm@ti.com>
Acked-by: Sekhar Nori <nsekhar@ti.com>
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
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This makes sure that an error is returned on an incorrectly formed
"cs-gpios" property, but reports success when the "cs-gpios" property is
well formed or missing.
When holes in the cs-gpios property phandle list is used to indicate
that some other form of chipselect is to be used it is important that
failure to read a broken "cs-gpios" property does not silently fail
leading to the spi controller to use an unintended chipselect.
Signed-off-by: Andreas Larsson <andreas@gaisler.com>
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
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The return value from of_get_named_gpio is -ENOENT when the given index
matches a hole in the "cs-gpios" property phandle list. However, the
default value of cs_gpio in struct spi_device and entries of cs_gpios in
struct spi_master is -EINVAL, which is documented to indicate that a
GPIO line should not be used for the given spi_device.
This sets the default value of cs_gpio in struct spi_device and entries
of cs_gpios in struct spi_master to -ENOENT. Thus, -ENOENT is the only
value used to indicate that no GPIO line should be used.
Signed-off-by: Andreas Larsson <andreas@gaisler.com>
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
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atmel_spi_transfer() would check speed_hz and fail if
the speed was changed in the transfer. After commit
"spi: make sure all transfer has proper speed set"
this would happen on all transfers.
Change speed_hz check to only fail if a lower speed
than max is requested.
Signed-off-by: Joachim Eastwood <manabian@gmail.com>
Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
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Add SPI driver for NVIDIA's Tegra114 SPI controller. This controller
is different than the older SoCs SPI controller in internal design as
well as register interface.
This driver supports the:
- non DMA based transfer for smaller transfer i.e. less than FIFO depth.
- APB DMA based transfer for larger transfer i.e. more than FIFO depth.
- Clock gating through runtime PM callbacks.
- registration through DT only.
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
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Tegra only supports, and always enables, device tree. Remove all ifdefs
and runtime checks for DT support from the driver. Platform data is
therefore no longer required. Rework the driver to parse the device tree
directly into struct tegra_slink_data.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
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Tegra only supports, and always enables, device tree. Remove all ifdefs
and runtime checks for DT support from the driver. Platform data is
therefore no longer required. Rework the driver to parse the device tree
directly into struct tegra_sflash_data.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
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