Age | Commit message (Collapse) | Author |
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Fixed coding style issue where lines are indented with spaces
instead of tabs.
Signed-off-by: Luis Ortega Perez de Villar <luiorpe1@upv.es>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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The transfer scheduler in the dwc2 driver is pretty basic, not to
mention buggy. It works fairly well with just a couple of devices
plugged in, but if you add, say, multiple devices with periodic
endpoints, the scheduler breaks down and can't even enumerate all
the devices.
To improve this, import the "microframe scheduler" patch from the
driver in the downstream Raspberry Pi kernel, which is based on
the Synopsys vendor driver. The original patch came from Denx
(http://git.denx.de/?p=linux-denx.git) and was commited to the
raspberrypi.org git tree by "popcornmix" (Dom Cobley).
I have added a driver parameter for this, enabled by default, in
case anyone has problems with it and needs to disable it. I don't
think we should add a DT binding for that, though, since I plan
to remove the option once any bugs are fixed.
[raspberrypi.org patch from Dom Cobley]
Signed-off-by: Dom Cobley <popcornmix@gmail.com>
[adapted to dwc2 driver by Paul Zimmerman]
Signed-off-by: Paul Zimmerman <paulz@synopsys.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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Correct spelling typo in comments
Singend-off-by: Masanari Iida <standby24x7@gmail.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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The HWCFG4 register stores the supported utmi width values (8, 16 or
both). This commit reads that value and validates the configured value
against that.
If no (valid) value is given, the parameter defaulted to 8 bits
previously. However, the documentation for dwc2_core_params_struct
suggests that the default should have been 16. Also, the pci bindings
explicitely set the value to 16, so this commit changes the default to
16 bits (if supported, 8 bits otherwise).
With the default changed, the value set in pci.c is changed to -1 to
make it autodetected as well.
Signed-off-by: Matthijs Kooijman <matthijs@stdin.nl>
Acked-by: Paul Zimmerman <paulz@synopsys.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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Before, the hwcfg registers were read at device init time, but
interpreted at various parts in the code. This commit unpacks the hwcfg
register values into a struct with properly labeled variables at init
time, which makes all the other code using these values more consise and
easier to read. Some values that were previously stored in the hsotg
struct are now moved into this new struct as well.
In addition to the hwcfg registers, the contents of some fifo size
registers are also unpacked. The hwcfg registers are read-only, so they
can be safely stored. The fifo size registers are read-write registers,
but their power-on values are significant: they give the maximum depth
of the fifo they describe.
This commit mostly moves code, but also attempts to simplify some
expressions from (val >> shift) & (mask >> shift) to
(val & mask) >> shift.
Finally, all of the parameters read from the hardware are debug printed
after unpacking them, so a bunch of debug prints can be removed from
other places.
Signed-off-by: Matthijs Kooijman <matthijs@stdin.nl>
Acked-by: Paul Zimmerman <paulz@synopsys.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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Bits 16-31 are reserved, so the old code just reads the whole register to
get bits 0-15, assuming the reserved bits would be 0 (which seems true
on current hardware, but who knows...).
This commit properly masks out the reserved bits when reading and
doesn't touch the reserved bits while writing.
Signed-off-by: Matthijs Kooijman <matthijs@stdin.nl>
Acked-by: Paul Zimmerman <paulz@synopsys.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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For calculating FIFO offsets, the sizes of preceding fifos need to be
known. For filling the GDFIFOCFG register, these fifo sizes were read
from hardware registers. However, these values were written to these
registers just a few lines before, so we can just use the values written
instead.
Signed-off-by: Matthijs Kooijman <matthijs@stdin.nl>
Acked-by: Paul Zimmerman <paulz@synopsys.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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For some reason, the value of the HPTXFSIZ register was built in the
ptxfsiz variable, while there was also a hptxfsiz variable availble.
Better just use that and remove the (now unused) ptxfsiz variable.
Signed-off-by: Matthijs Kooijman <matthijs@stdin.nl>
Acked-by: Paul Zimmerman <paulz@synopsys.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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The value of the hcchar register is built from individual values by
shifting and masking. Before, the debug output extracted the individual
values out of the complete hcchar register again by doing the reverse.
This commit makes the debug output use the original values instead.
One debug message got removed, since it would always print a fixed value
of zero.
Signed-off-by: Matthijs Kooijman <matthijs@stdin.nl>
Acked-by: Paul Zimmerman <paulz@synopsys.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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This commit changes expressions from (val >> shift) & (mask >> shift) to
(val & mask) >> shift.
Signed-off-by: Matthijs Kooijman <matthijs@stdin.nl>
Acked-by: Paul Zimmerman <paulz@synopsys.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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Various register fields wider than one bit have constants defined for
their value. Previously, these registers would define the values as they
appear in the register, so shifted to the right to the position the
value appears in the register.
This commit changes those constants to their natural values (e.g, 0, 1,
2, etc.), as they are after shifting the register value to the right.
This also changes all relevant code to shift the values before comparing
them with constants.
This has the advantage that the values can be stored in smaller
variables (now they always require a u32) and makes the handling of
these values more consistent with other register fields that represent
natural numbers instead of enumerations (e.g., number of host channels).
Signed-off-by: Matthijs Kooijman <matthijs@stdin.nl>
Acked-by: Paul Zimmerman <paulz@synopsys.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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Previously, the max_packet_count could be set to 1 << x, where x is the
number of bits available (width + 4 in the code). Since 1 << x requires
x + 1 bits to represent, this will not work. The real maximum value is
(1 << x) - 1. This value is already used the default when the set value
is invalid, but the upper limit for the set value was off-by-one.
This change makes the check the same as the one for max_transfer_size,
which was already correct.
Signed-off-by: Matthijs Kooijman <matthijs@stdin.nl>
Acked-by: Paul Zimmerman <paulz@synopsys.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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The dwc2 driver sets the value of the DWC2 GAHBCFG register to 0x6,
which is GAHBCFG_HBSTLEN_INCR4. But different platforms may require
different values. In particular, the Broadcom 2835 SOC used in the
Raspberry Pi needs a value of 0x10, otherwise the DWC2 controller
stops working after a short period of heavy USB traffic.
So this patch adds another driver parameter named 'ahbcfg'. The
default value is 0x6. Any platform needing a different value should
add a DT attribute to set it.
This patch also removes the 'ahb_single' driver parameter, since
that bit can now be set using 'ahbcfg'.
This patch does not add DT support to platform.c, I will leave that
to whoever owns the first platform that needs a non-default value.
(Stephen?)
Signed-off-by: Paul Zimmerman <paulz@synopsys.com>
Tested-by: Stephen Warren <swarren@wwwdotorg.org>
Reviewed-by: Matthijs Kooijman <matthijs@stdin.nl>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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I screwed up the sense of this if() statement while porting our
vendor driver to create the dwc2 driver. This caused frame overrun
errors on periodic transfers when there were other transfers
active in the same (micro)frame.
With this fix, the dwc2 driver now works on the Raspberry Pi
platform even with the USB Ethernet controller enabled, where
before that would cause all USB devices to stop working.
Thanks to Ray Jui and Jerry Lin at Broadcom for tracking this down.
Reported-by: Ray Jui <rjui@broadcom.com>
Signed-off-by: Paul Zimmerman <paulz@synopsys.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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Now the functions use proper const annotations, the global variable with
default params can be marked const, which prevents these values from
being changed for a specific device (in theory there could be multiple
controllers with different settings, for example).
Signed-off-by: Stephen Warren <swarren@wwwdotorg.org>
[matthijs@stdin.nl: Split patch from bigger patch, marked
dwc2_module_params in pci.c as const and added
commit message]
Signed-off-by: Matthijs Kooijman <matthijs@stdin.nl>
Acked-by: Paul Zimmerman <paulz@synopsys.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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The value in params->enable_dynamic_fifo can only be true if the
corresponding bit in hwcfg2 is set, this is already checked by
dwc2_set_param_enable_dynamic_fifo.
Signed-off-by: Matthijs Kooijman <matthijs@stdin.nl>
Acked-by: Paul Zimmerman <paulz@synopsys.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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This code appears to be partially incorrect. Since this is only debug
code and only applies to device mode, it seems better to remove this
code for now than to invest time fixing it.
Signed-off-by: Matthijs Kooijman <matthijs@stdin.nl>
Acked-by: Paul Zimmerman <paulz@synopsys.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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Before, there were two places that manually read the FRNUM registers,
while there is a function to do this.
Signed-off-by: Matthijs Kooijman <matthijs@stdin.nl>
Acked-by: Paul Zimmerman <paulz@synopsys.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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There were already macros for these, they just weren't being used in a
few places.
Signed-off-by: Matthijs Kooijman <matthijs@stdin.nl>
Acked-by: Paul Zimmerman <paulz@synopsys.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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Before, this was initialized in pci.c, after the dwc2_hcd_init was
called and the interrupts were enabled. This opened up a small time
window where common interrupts could be triggered, but there was no
handler for them, causing them to keep triggering infinitely and locking
up the machine.
On my RT3052 board this bug could be easily reproduced by hardcoding
the console log level to 8, so that a bunch of debug output from the dwc2
driver was generated inside this time window. This caused the interrupt
lockup to occur almost every time.
By requesting the irq inside dwc2_core_init and by disabling interrupts
before calling dwc2_core_init instead of after, we can be sure the
handler is registered before the interrupts are enabled, which should
close this window.
Reported-by: Stephen Warren <swarren@wwwdotorg.org>
Signed-off-by: Matthijs Kooijman <matthijs@stdin.nl>
Acked-by: Paul Zimmerman <paulz@synopsys.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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This adds a config option USB_DWC2_DEBUG_PERIODIC that allows debugging
output be suppressed for periodic transfers. This helps when debugging
non-periodic transfers while there are also periodic transfers going on
(both to make the debug output less polluted and to prevent all CPU time
going to debug messages).
In addition, a debug message from dwc2_hcd_is_status_changed is removed
entirely, since it often floods the log regardless of periodic
transfers.
Signed-off-by: Matthijs Kooijman <matthijs@stdin.nl>
Cc: Paul Zimmerman <Paul.Zimmerman@synopsys.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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The core code provides basic services for accessing and managing
the DWC_otg hardware. These services are used by both the Host
Controller Driver and (in future) the Peripheral Controller Driver.
Signed-off-by: Paul Zimmerman <paulz@synopsys.com>
Reviewed-by: Felipe Balbi <balbi@ti.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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