Age | Commit message (Collapse) | Author |
|
All 4 transfer types can work well on EHCI HCD after switching to run
URB giveback in tasklet context, so mark all HCD drivers to support
it.
Also we don't need to release ehci->lock during URB giveback any more.
>From below test results on 3 machines(2 ARM and one x86), time
consumed by EHCI interrupt handler droped much without performance
loss.
1 test description
1.1 mass storage performance test:
- run below command 10 times and compute the average performance
dd if=/dev/sdN iflag=direct of=/dev/null bs=200M count=1
- two usb mass storage device:
A: sandisk extreme USB 3.0 16G(used in test case 1 & case 2)
B: kingston DataTraveler G2 4GB(only used in test case 2)
1.2 uvc function test:
- run one simple capture program in the below link
http://kernel.ubuntu.com/~ming/up/capture.c
- capture format 640*480 and results in High Bandwidth mode on the
uvc device: Z-Star 0x0ac8/0x3450
- on T410(x86) laptop, also use guvcview to watch video capture/playback
1.3 about test2 and test4
- both two devices involved are tested concurrently by above test items
1.4 how to compute irq time(the time consumed by ehci_irq)
- use trace points of irq:irq_handler_entry and irq:irq_handler_exit
1.5 kernel
3.10.0-rc3-next-20130528
1.6 test machines
Pandaboard A1: ARM CortexA9 dural core
Arndale board: ARM CortexA15 dural core
T410: i5 CPU 2.67GHz quad core
2 test result
2.1 test case1: single mass storage device performance test
--------------------------------------------------------------------
upstream | patched
perf(MB/s)+irq time(us) | perf(MB/s)+irq time(us)
--------------------------------------------------------------------
Pandaboard A1: 25.280(avg:145,max:772) | 25.540(avg:14, max:75)
Arndale board: 29.700(avg:33, max:129) | 29.700(avg:10, max:50)
T410: 34.430(avg:17, max:154*)| 34.660(avg:12, max:155)
---------------------------------------------------------------------
2.2 test case2: two mass storage devices' performance test
--------------------------------------------------------------------
upstream | patched
perf(MB/s)+irq time(us) | perf(MB/s)+irq time(us)
--------------------------------------------------------------------
Pandaboard A1: 15.840/15.580(avg:158,max:1216) | 16.500/16.160(avg:15,max:139)
Arndale board: 17.370/16.220(avg:33 max:234) | 17.480/16.200(avg:11, max:91)
T410: 21.180/19.820(avg:18 max:160) | 21.220/19.880(avg:11, max:149)
---------------------------------------------------------------------
2.3 test case3: one uvc streaming test
- uvc device works well(on x86, luvcview can be used too and has
same result with uvc capture)
--------------------------------------------------------------------
upstream | patched
irq time(us) | irq time(us)
--------------------------------------------------------------------
Pandaboard A1: (avg:445, max:873) | (avg:33, max:44)
Arndale board: (avg:316, max:630) | (avg:20, max:27)
T410: (avg:39, max:107) | (avg:10, max:65)
---------------------------------------------------------------------
2.4 test case4: one uvc streaming plus one mass storage device test
--------------------------------------------------------------------
upstream | patched
perf(MB/s)+irq time(us) | perf(MB/s)+irq time(us)
--------------------------------------------------------------------
Pandaboard A1: 20.340(avg:259,max:1704)| 20.390(avg:24, max:101)
Arndale board: 23.460(avg:124,max:726) | 23.370(avg:15, max:52)
T410: 28.520(avg:27, max:169) | 28.630(avg:13, max:160)
---------------------------------------------------------------------
2.5 test case5: read single mass storage device with small transfer
- run below command 10 times and compute the average speed
dd if=/dev/sdN iflag=direct of=/dev/null bs=4K count=4000
1), test device A:
--------------------------------------------------------------------
upstream | patched
perf(MB/s)+irq time(us) | perf(MB/s)+irq time(us)
--------------------------------------------------------------------
Pandaboard A1: 6.5(avg:21, max:64) | 6.5(avg:10, max:24)
Arndale board: 8.13(avg:12, max:23) | 8.06(avg:7, max:17)
T410: 6.66(avg:13, max:131) | 6.84(avg:11, max:149)
---------------------------------------------------------------------
2), test device B:
--------------------------------------------------------------------
upstream | patched
perf(MB/s)+irq time(us) | perf(MB/s)+irq time(us)
--------------------------------------------------------------------
Pandaboard A1: 5.5(avg:21,max:43) | 5.49(avg:10, max:24)
Arndale board: 5.9(avg:12, max:22) | 5.9(avg:7, max:17)
T410: 5.48(avg:13, max:155) | 5.48(avg:7, max:140)
---------------------------------------------------------------------
* On T410, sometimes read ehci status register in ehci_irq takes more
than 100us, and the problem has been reported on the link:
http://marc.info/?t=137065867300001&r=1&w=2
Acked-by: Alan Stern <stern@rowland.harvard.edu>
Signed-off-by: Ming Lei <ming.lei@canonical.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
|
|
Use the wrapper function for retrieving the platform data instead of
accessing dev->platform_data directly.
Signed-off-by: Jingoo Han <jg1.han@samsung.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
|
|
set the owner of platform_driver, to ensure that the
caller of driver holds a module refernece
Signed-off-by: Libo Chen <libo.chen@huawei.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
|
|
Commit 756aa6b3d536afe85e151138cb03a293998887b3 (ehci-hub: improved
over-current recovery) added port power cycling on overcurrent indications as
needed by the MPC8349 USB controller after resolving of the overcurrent
situation in order to have the host state machine assert the correct port
status again.
Commit 81463c1d707186adbbe534016cd1249edeab0dac (EHCI: only power off port if
over-current is active) solved a thus resulting issue of endless overcurrent
changes in combination with the MAX4967 USB power supply chip that signals
overcurrent when power is not enabled by only powering off a port if the
overcurrent is currently active.
Added quirks flag need_oc_pp_cycle in order to specify the needed behaviour as
there is no common behaviour that can comply with both requirements.
Activated the quirks handling for Freescale 83xx based boards.
Signed-off-by: Christian Engelmayer <christian.engelmayer@frequentis.com>
Acked-by: Alan Stern <stern@rowland.harvard.edu>
Acked-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
|
|
mpc5121e doesn't have system interface registers, accessing this
register address space cause the machine check exception and a
kernel crash:
...
Machine check in kernel mode.
Caused by (from SRR1=49030): Transfer error ack signal
Oops: Machine check, sig: 7 [#1]
MPC5121 ADS
Modules linked in:
NIP: c025fd60 LR: c0265bb4 CTR: 00000000
REGS: df82dac0 TRAP: 0200 Not tainted
(3.7.0-rc7-00641-g81e6c91)
MSR: 00049030 <EE,ME,IR,DR> CR: 42002024 XER: 20000000
TASK = df824b70[1] 'swapper' THREAD: df82c000
GPR00: 00000000 df82db70 df824b70 df3ed0f0 00000003 00000000 00000000 00000000
GPR08: 00000020 32000000 c03550ec 20000000 22002028 00000000 c0003f5c 00000000
GPR16: 00000000 00000000 00000000 00000000 00000000 00000000 c0423898 c0450000
GPR24: 00000077 00000002 e5086180 1c000c00 e5086000 df33ec00 00000003 df34e000
NIP [c025fd60] ehci_fsl_setup_phy+0xd0/0x354
LR [c0265bb4] ehci_fsl_setup+0x220/0x284
...
Fix it by checking 'have_sysif_regs' flag before register access.
Signed-off-by: Anatolij Gustschin <agust@denx.de>
Acked-by: Alan Stern <stern@rowland.harvard.edu>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
|
|
This patch (as1623) removes the ehci_port_power() routine and all the
places that call it. There's no reason for ehci-hcd to change the
port power settings; the hub driver takes care of all that stuff.
There is one exception: When the controller is resumed from
hibernation or following a loss of power, the ports that are supposed
to be handed over to a companion controller must be powered on first.
Otherwise the handover won't work. This process is not visible to the
hub driver, so it has to be handled in ehci-hcd.
Signed-off-by: Alan Stern <stern@rowland.harvard.edu>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
|
|
ehci_fsl_setup_phy is supposed to return an int, but had a void return
value in the case of controller_ver being invalid.
Introduced by commit 3735ba8db8e6 ("powerpc/usb: fix bug of CPU hang
when missing USB PHY clock"), which missed one return.
Signed-off-by: Ben Collins <ben.c@servergy.com>
Cc: Shengzhou Liu <Shengzhou.Liu@freescale.com>
Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
|
|
PHY_CLK_VALID bit doesn't work properly with UTMI PHY.
e.g. This bit is always zero on P5040, etc.
There is no need to check this bit for UTMI PHY, just keep
checking for ULPI PHY to prevent system hanging.
This patch should be squashed into previous commit 3735ba8db8e6e
"powerpc/usb: fix bug of CPU hang when missing USB PHY clock"
Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
|
|
when missing USB PHY clock, kernel booting up will hang during USB
initialization. We should check USBGP[PHY_CLK_VALID] bit to avoid
CPU hanging in this case.
Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
|
|
We need to use CONFIG_FSL_SOC_BOOKE instead of CONFIG_PPC_85xx as
CONFIG_PPC_85xx isn't defined when we build support for 64-bit embedded
FSL PPC SoCs.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
|
|
This patch (as1564c) converts the EHCI platform drivers to use the
central ehci_setup() routine for generic controller initialization
rather than each having its own idiosyncratic approach.
The major point of difficulty lies in ehci-pci's many vendor- and
device-specific workarounds. Some of them have to be applied before
calling ehci_setup() and some after, which necessitates a fair amount
of code motion. The other platform drivers require much smaller
changes.
One point not addressed by the patch is whether ports should be
powered on or off following initialization. The different drivers
appear to handle this pretty much at random. In fact it shouldn't
matter, because the hub driver turns on power to all ports when it
binds to the root hub. Straightening that out will be left for
another day.
Signed-off-by: Alan Stern <stern@rowland.harvard.edu>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
|
|
git://git.kernel.org/pub/scm/linux/kernel/git/balbi/usb into usb-next
usb: phy: patches for v3.6 merge window
We are starting to support multiple USB phys as
we should thanks for Kishon's work. DeviceTree support
for USB PHYs won't come until discussion with DeviceTree
maintainer is finished.
Together with that series, we have one fix for twl4030
which missed a IRQF_ONESHOT annotation when requesting
a threaded IRQ without a top half handler, and removal
of an unused variable compilation warning to isp1301_omap.
|
|
usb_get_phy will return -ENODEV if it's not able to find the phy. Hence
fixed all the callers of usb_get_phy to check for this error condition
instead of relying on a non-zero value as success condition.
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Felipe Balbi <balbi@ti.com>
|
|
Add a linked list for keeping multiple PHY instances with different
types so that we can have separate USB2 and USB3 PHYs on one single
board. _get_phy_ has been changed so that the controller gets
the transceiver by type. _remove_phy_ has been added to let the phy
be removed from the phy list.
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Felipe Balbi <balbi@ti.com>
|
|
_transceiver() in otg.c is replaced with _phy. usb_set_transceiver is
replaced with usb_add_phy to make it similar to other usb standard
function names like usb_add_hcd.
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Felipe Balbi <balbi@ti.com>
|
|
- to decrease redundant since both ehci_hcd and ohci_hcd have the same variable
- it helps access phy in usb core code
- phy is more meaningful than transceiver
Signed-off-by: Richard Zhao <richard.zhao@freescale.com>
Acked-by: Alan Stern <stern@rowland.harvard.edu>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
|
|
Currently usb_put_transceiver calls put_device so this is a no-op but it
is better to keep API usage consistent as ehci->transceiver is allocated
with usb_get_transceiver.
While at there remove one extra ehci->transceiver test as the code block
has already tested it.
Signed-off-by: Jarkko Nikula <jarkko.nikula@bitmer.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
|
|
This resolves the conflict in:
drivers/usb/host/ehci-fsl.c
And picks up loads of xhci bugfixes to make it easier for others to test
with.
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
|
|
Since commit 28c56ea1431421dec51b7b229369e991481453df
(powerpc/usb: fix bug of kernel hang when initializing usb)
the kernel crashes on mpc5121e. mpc5121e doesn't have system interface
registers, accessing this register address space cause the machine check
exception and a kernel crash:
...
[ 1.294596] ehci_hcd: USB 2.0 'Enhanced' Host Controller (EHCI) Driver
[ 1.316491] fsl-ehci fsl-ehci.0: Freescale On-Chip EHCI Host Controller
[ 1.337334] fsl-ehci fsl-ehci.0: new USB bus registered, assigned bus number 1
[ 1.358548] Machine check in kernel mode.
[ 1.375917] Caused by (from SRR1=49030): Transfer error ack signal
[ 1.395505] Oops: Machine check, sig: 7 [#1]
[ 1.413113] MPC5121 ADS
[ 1.428718] Modules linked in:
[ 1.444841] NIP: c026efc4 LR: c0278b50 CTR: 00000000
[ 1.463342] REGS: df837ba0 TRAP: 0200 Not tainted (3.3.0-08839-gb5174fa)
[ 1.484083] MSR: 00049030 <EE,ME,IR,DR> CR: 42042022 XER: 20000000
[ 1.504099] TASK = df834000[1] 'swapper' THREAD: df836000
[ 1.509667] GPR00: 1c000000 df837c50 df834000 df9d74e0 00000003 00000010 00000000 00000000
[ 1.531650] GPR08: 00000020 00000000 c037cdd8 e1088000 22042028 1001a69c 00000000 00000000
[ 1.553762] GPR16: 1ffbce70 00000000 1fef5b28 1fef3e08 00000000 00000000 1ffcbc7c c045b264
[ 1.575824] GPR24: 0000008b 00000002 c04a7dd0 e1088000 df33c960 df9d74e0 00000000 df9d7400
[ 1.612295] NIP [c026efc4] ehci_fsl_setup_phy+0x110/0x124
[ 1.632454] LR [c0278b50] ehci_fsl_setup+0x29c/0x304
[ 1.652065] Call Trace:
[ 1.668923] [df837c50] [c0278a40] ehci_fsl_setup+0x18c/0x304 (unreliable)
[ 1.690332] [df837c70] [c025cba4] usb_add_hcd+0x1f0/0x66c
[ 1.710377] [df837cb0] [c0277ab8] ehci_fsl_drv_probe+0x180/0x308
[ 1.731322] [df837ce0] [c01fc7a8] platform_drv_probe+0x20/0x30
[ 1.752202] [df837cf0] [c01fb0ac] driver_probe_device+0x8c/0x214
[ 1.773491] [df837d10] [c01f956c] bus_for_each_drv+0x6c/0xa8
[ 1.794279] [df837d40] [c01fafdc] device_attach+0xb4/0xd8
[ 1.814574] [df837d60] [c01fa44c] bus_probe_device+0xa4/0xb4
[ 1.835343] [df837d80] [c01f87a8] device_add+0x52c/0x5dc
[ 1.855462] [df837dd0] [c01fcd58] platform_device_add+0x124/0x1d0
[ 1.876558] [df837df0] [c036dcec] fsl_usb2_device_register+0xa0/0xd4
[ 1.897512] [df837e10] [c036df28] fsl_usb2_mph_dr_of_probe+0x208/0x264
[ 1.918253] [df837e90] [c01fc7a8] platform_drv_probe+0x20/0x30
[ 1.938300] [df837ea0] [c01fb0ac] driver_probe_device+0x8c/0x214
[ 1.958511] [df837ec0] [c01fb2f0] __driver_attach+0xbc/0xc0
[ 1.978088] [df837ee0] [c01f9608] bus_for_each_dev+0x60/0x9c
[ 1.997589] [df837f10] [c01fab88] driver_attach+0x24/0x34
[ 2.016757] [df837f20] [c01fa744] bus_add_driver+0x1ac/0x274
[ 2.036339] [df837f50] [c01fb898] driver_register+0x88/0x150
[ 2.056052] [df837f70] [c01fcabc] platform_driver_register+0x68/0x78
[ 2.076650] [df837f80] [c0446500] fsl_usb2_mph_dr_driver_init+0x18/0x28
[ 2.097734] [df837f90] [c0003988] do_one_initcall+0x148/0x1b0
[ 2.117934] [df837fc0] [c042d89c] kernel_init+0xfc/0x190
[ 2.137667] [df837ff0] [c000d2c4] kernel_thread+0x4c/0x68
[ 2.157240] Instruction dump:
[ 2.174119] 90050004 4e800020 2f840003 419e0014 2f840004 409eff64 6400c000 4bffff5c
[ 2.196000] 64001000 7c0004ac 812b0500 0c090000 <4c00012c> 61290200 7c0004ac 912b0500
[ 2.218100] ---[ end trace 21659aedb84ad816 ]---
[ 2.237089]
[ 3.232940] Kernel panic - not syncing: Attempted to kill init! exitcode=0x00000007
[ 3.232954]
[ 3.271575] Rebooting in 1 seconds..
Check pdata->have_sysif_regs flag before accessing system interface
registers.
Signed-off-by: Anatolij Gustschin <agust@denx.de>
Cc: Shengzhou Liu <Shengzhou.Liu@freescale.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
|
|
Add support for ULPI and UTMI PHYs based on usb controller
version info read from device-tree
Example of USB Controller versioning info:
Version 1.2 and below : MPC8536, MPC8315, etc
Version 1.6 : P1020, P1010, P2020, P5020, etc
Version 2.2 : PSC9131, PSC9132, P3060, etc
No changes for non-DT users
Signed-off-by: Ramneek Mehresh <ramneek.mehresh@freescale.com>
Acked-by: Li Yang <leoli@freescale.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
|
|
This resolves the conflict with drivers/usb/host/ehci-fsl.h that
happened with changes in Linus's and this branch at the same time.
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
|
|
This reverts commit 529febeee680dc22416fca033151a5e8bc620447.
To quote Dirk:
This commit introduces a check for the USB PHY clock.
Problem is that CTRL_PHY_CLK_VALID bit seems not to be present
on all Freescale ehci implementations, at least P1022 does not
have it. So this check always fails and the driver never gets
loaded.
So we need to revert this patch.
Reported-by: Dirk Eibach <Eibach@gdsys.de>
Cc: Shengzhou Liu <Shengzhou.Liu@freescale.com>
Cc: Felipe Balbi <balbi@ti.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
|
|
git://git.kernel.org/pub/scm/linux/kernel/git/balbi/usb into usb-next
USB: transceiver changes for 3.4
Here we have a big rework done by Heikki Krogerus (thanks) which
splits OTG functionality away from transceivers.
We have known for quite a long time that struct otg_transceiver was
a bad name for the structure, considering transceiver is far from
being OTG-specific (see 4e67185).
|
|
This reverts commit 79857e8e7b1ba740f8025b540f1e171c9a0a5d31.
To quote Shengzhou Liu:
I'm sorry, please don't apply this patch.
It appears not only on P1022 platform.
There will be more breaks on other platforms regarding
CTRL_PHY_CLK_VALID bit.
I will post a new patch with well compatibility on all
platforms as soon as I get necessary confirmations.
Cc: Shengzhou Liu <Shengzhou.Liu@freescale.com>
Cc: stable <stable@vger.kernel.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
|
|
Fix checking of CTRL_PHY_CLK_VALID bit break on some platform on which
there is not USB CTRL_PHY_CLK_VALID bit.
- P1023/P3041/P5020 etc,have this bit
- P3060/4080/PSC913x do have this bit, but not mentioned in RM.
- P1022(perhaps and other) has no this bit
Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com>
Cc: stable <stable@vger.kernel.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
|
|
This changes the otg functions so that they receive struct
otg instead of struct usb_phy as parameter and
converts all users of these functions to pass the otg member
of their usb_phy.
Includes fixes to IMX code from Sascha Hauer.
[ balbi@ti.com : fixed a compile warning on ehci-mv.c ]
Signed-off-by: Heikki Krogerus <heikki.krogerus@linux.intel.com>
Acked-by: Sascha Hauer <s.hauer@pengutronix.de>
Acked-by: Igor Grinberg <grinberg@compulab.co.il>
Acked-by: Pavankumar Kondeti <pkondeti@codeaurora.org>
Acked-by: Li Yang <leoli@freescale.com>
Acked-by: Alan Stern <stern@rowland.harvard.edu>
Reviewed-by: Marek Vasut <marek.vasut@gmail.com>
Signed-off-by: Felipe Balbi <balbi@ti.com>
|
|
Use the new usb_phy_* functions with transceiver
operations instead of the old otg functions.
Includes fixes from Sascha Hauer.
Signed-off-by: Heikki Krogerus <heikki.krogerus@linux.intel.com>
Acked-by: Sascha Hauer <s.hauer@pengutronix.de>
Acked-by: Pavankumar Kondeti <pkondeti@codeaurora.org>
Acked-by: Li Yang <leoli@freescale.com>
Acked-by: Alan Stern <stern@rowland.harvard.edu>
Reviewed-by: Marek Vasut <marek.vasut@gmail.com>
Signed-off-by: Felipe Balbi <balbi@ti.com>
|
|
If USB UTMI PHY is not enable, writing to portsc register will lead to
kernel hang during boot up.
Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com>
Reported-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Cc: stable <stable@vger.kernel.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
|
|
If a MPC8xxx was being used, 'have_sysif_regs' should be set and
it should setup cache snooping for all the 4GB space on both PPC32
and PPC64.
Signed-off-by: Pan Jiafei <Jiafei.Pan@freescale.com>
Acked-by: Li Yang <leoli@freescale.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
|
|
This is done to resolve a merge conflict with:
drivers/usb/class/cdc-wdm.c
and to better handle future patches for this driver as it is under
active development at the moment.
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
|
|
when missing USB PHY clock, kernel booting up will halt during USB
initialization. We should check USBGP[PHY_CLK_VALID] bit to avoid
CPU hang in this case.
Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
|
|
Use INCR8 mode for system bus interface of the USB controller
on MPC512x. This is a work-around for the AHB bus lock up
problem observed on MPC512x when there is heavy simultaneous
PATA write or network (FEC) activity.
See also "12.4 The USB controller can issue transactions that lock
up the AHB bus under certain conditions" in MPC5121e (M36P) Errata.
Signed-off-by: Anatolij Gustschin <agust@denx.de>
Tested-by: Matthias Fuchs <matthias.fuchs@esd.ue>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
|
|
Add missing iounmap in error handling code, in a case where the function
already preforms iounmap on some other execution path.
A simplified version of the semantic match that finds this problem is as
follows: (http://coccinelle.lip6.fr/)
// <smpl>
@@
expression e;
statement S,S1;
int ret;
@@
e = \(ioremap\|ioremap_nocache\)(...)
... when != iounmap(e)
if (<+...e...+>) S
... when any
when != iounmap(e)
*if (...)
{ ... when != iounmap(e)
return ...; }
... when any
iounmap(e);
// </smpl>
Signed-off-by: Julia Lawall <Julia.Lawall@lip6.fr>
Acked-by: Alan Stern <stern@rowland.harvard.edu>
Cc: stable <stable@vger.kernel.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
|
|
This flag is a NOOP and can be removed now.
Signed-off-by: Yong Zhang <yong.zhang0@gmail.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
|
|
This patch (as1483) improves the ehci-hcd driver family by getting rid
of the reliance on the hcd->state variable. It has no clear owner and
it isn't protected by the usual HCD locks. In its place, the patch
adds a new, private ehci->rh_state field to record the state of the
root hub.
Along the way, the patch removes a couple of lines containing
redundant assignments to the state variable. Also, the QUIESCING
state simply gets changed to the RUNNING state, because the driver
doesn't make any distinction between them.
Signed-off-by: Alan Stern <stern@rowland.harvard.edu>
Acked-by: Jingoo Han <jg1.han@samsung.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
|
|
Several fixes as well where the +1 was missing.
Done via coccinelle scripts like:
@@
struct resource *ptr;
@@
- ptr->end - ptr->start + 1
+ resource_size(ptr)
and some grep and typing.
Mostly uncompiled, no cross-compilers.
Signed-off-by: Joe Perches <joe@perches.com>
Signed-off-by: Jiri Kosina <jkosina@suse.cz>
|
|
The two first HC capability registers (CAPLENGTH and HCIVERSION)
are defined as one 8-bit and one 16-bit register. Most HC
implementations have selected to treat these registers as part
of a 32-bit register, giving the same layout for both big and
small endian systems.
This patch adds a new quirk, big_endian_capbase, to support
controllers with big endian register interfaces that treat
HCIVERSION and CAPLENGTH as individual registers.
Signed-off-by: Jan Andersson <jan@gaisler.com>
Acked-by: Alan Stern <stern@rowland.harvard.edu>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
|
|
Signed-off-by: Anatolij Gustschin <agust@denx.de>
Cc: Li Yang <leoli@freescale.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
|
|
Signed-off-by: Anatolij Gustschin <agust@denx.de>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
|
|
Previously a check was done on an ID register at the base of a CPU's
internal USB registers to determine if system interface regsiters were
present. The check looked for an ID register that had the format
ID[0:5] == ~ID[8:13] as described in the MPC5121 User's Manual to
determine if a MPC5121 or MPC83xx/85xx was being used.
There are two issues with this method:
- The ID register is not defined on the MPC83xx/85xx CPUs, so its
unclear what is being checked on them.
- Newer CPUs such as the P4080 also don't document the ID register, but
do share the same format as the MPC5121. Thus the previous code did
not set 'have_sysif_regs' properly which results in the P4080 not
properly initializing its USB ports.
Using the device tree 'compatible' node is a cleaner way to determine if
'have_sysif_regs' should be set and resolves the USB initialization issue
seen on the P4080.
Tested on a P4080-based system and compile tested on mpc512x_defconfig
with Freescale EHCI driver enabled.
Cc: Anatolij Gustschin <agust@denx.de>
Cc: David Brownell <dbrownell@users.sourceforge.net>
Cc: Kumar Gala <galak@kernel.crashing.org>
Cc: linuxppc-dev@lists.ozlabs.org
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
|
|
Extends FSL EHCI platform driver glue layer to support
MPC5121 USB controllers. MPC5121 Rev 2.0 silicon EHCI
registers are in big endian format. The appropriate flags
are set using the information in the platform data structure.
MPC83xx system interface registers are not available on
MPC512x, so the access to these registers is isolated in
MPC512x case. Furthermore the USB controller clocks
must be enabled before 512x register accesses which is
done by providing platform specific init callback.
The MPC512x internal USB PHY doesn't provide supply voltage.
For boards using different power switches allow specifying
DRVVBUS and PWR_FAULT signal polarity of the MPC5121 internal
PHY using "fsl,invert-drvvbus" and "fsl,invert-pwr-fault"
properties in the device tree USB nodes. Adds documentation
for this new device tree bindings.
Signed-off-by: Anatolij Gustschin <agust@denx.de>
Cc: Grant Likely <grant.likely@secretlab.ca>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
|
|
tdi_reset is already taking care of setting host mode for tdi devices.
Don't duplicate code in platform driver.
Make ehci_halt a nop if the controller is not in host mode (otherwise it
will fail), and let's ehci_reset do the tdi_reset.
We need to move hcd->has_tt flags before ehci_halt, in order ehci_halt
knows we are a tdi device.
Before the setup routine was doing :
- put controller in host mode
- ehci_halt
- ehci_init
- hcd->has_tt = 1;
- ehci_reset
Now we do :
- hcd->has_tt = 1;
- ehci_halt
- ehci_init
- ehci_reset
PS : now we handle correctly the device -> host transition.
Signed-off-by: Matthieu CASTET <matthieu.castet@parrot.com>
Cc: Alan Stern <stern@rowland.harvard.edu>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
|
|
This patch (as1385) adds a "do_wakeup" parameter to the pci_suspend
method used by PCI-based host controller drivers. ehci-hcd in
particular needs to know whether or not to enable wakeup when
suspending a controller. Although that information is currently
available through device_may_wakeup(), when support is added for
runtime suspend this will no longer be true.
Signed-off-by: Alan Stern <stern@rowland.harvard.edu>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
|
|
This patch (as1380) fixes a bug in the wakeup settings for EHCI host
controllers. When the controller is suspended, if it isn't enabled
for remote wakeup then we have to turn off all the port wakeup flags.
Disabling PCI PME# isn't good enough, because some systems (Intel)
evidently use alternate wakeup signalling paths.
In addition, the patch improves the handling of the Intel Moorestown
hardware by performing various power-up and power-down delays just
once instead of once for each port (i.e., the delays are moved outside
of the port loops). This requires extra code, but the total delay
time is reduced.
There are also a few additional minor cleanups.
Signed-off-by: Alan Stern <stern@rowland.harvard.edu>
Reported-by: Ondrej Zary <linux@rainbow-software.org>
CC: Alek Du <alek.du@intel.com>
CC: stable <stable@kernel.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
|
|
EHCI FSL controller preserve its state during sleep mode, so nothing
fancy needs to be done.
Though, during 'deep sleep' mode (as found in MPC831x CPUs) the
controller turns off and needs to be reinitialized upon resume.
This patch adds support for hibernation and resuming after deep sleep.
Based on Dave Liu and Jerry Huang's work[1].
[1] http://www.bitshrine.org/gpp/linux-fsl-2.6.24.3-MPC8315ERDB-usb-power-mangement.patch
Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
|
|
This patch fixes following warnings:
ehci-fsl.c:43:5: warning: symbol 'usb_hcd_fsl_probe' was not declared. Should it be static?
ehci-fsl.c:150:6: warning: symbol 'usb_hcd_fsl_remove' was not declared. Should it be static?
Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
|
|
This patch (as1256) changes ehci-hcd and all the other drivers in the
EHCI family to make use of the new clear_tt_buffer callbacks. When a
Clear-TT-Buffer request is in progress for a QH, the QH is not allowed
to be linked into the async schedule until the request is finished.
At that time, if there are any URBs queued for the QH, it is linked
into the async schedule.
Signed-off-by: Alan Stern <stern@rowland.harvard.edu>
Cc: stable <stable@kernel.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
|
|
This patch (as1245) fixes a bug in ehci-hcd. When an URB is queued
for an endpoint whose QH is already in the LINKED state, the QH
doesn't get refreshed. As a result, if usb_clear_halt() was called
during the time that the QH was linked but idle, the data toggle value
in the QH doesn't get reset.
The symptom is that after a clear_halt, data gets lost and transfers
time out. This problem is starting to show up now because the
"ehci-hcd unlink speedups" patch causes QHs with no queued URBs to
remain linked for a suitable time.
The patch utilizes the new endpoint_reset mechanism to fix the
problem. When an endpoint is reset, the new method forcibly unlinks
the QH (if necessary) and safely updates the toggle value. This
allows qh_update() to be simplified and avoids using usb_device's
toggle bits in a rather unintuitive way.
Signed-off-by: Alan Stern <stern@rowland.harvard.edu>
CC: David Brownell <david-b@pacbell.net>
Tested-by: David <david@unsolicited.net>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
|
|
A couple of USB register initializations had to be changed on MPC85xx
platforms. This is due to the internal SoC buses being different on
MPC83xx SoCs vs MPC85xx SoCs.
We currently handle this via an ifdef since 83xx and 85xx are mutually
exclusive kernel builds.
Signed-off-by: Srikanth Srinivasan <srikanth.srinivasan@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
|
|
The bus_id field is going away, use the dev_name() function instead.
Signed-off-by: Kay Sievers <kay.sievers@vrfy.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
|