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path: root/include/asm-blackfin/mach-bf561
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2008-05-07Blackfin Serial Driver: abstract away DLAB differences into headerMike Frysinger
Signed-off-by: Mike Frysinger <vapier.adi@gmail.com> Signed-off-by: Bryan Wu <cooloney@kernel.org>
2008-05-07Blackfin Serial Driver: macro away the IER differences between processorsMike Frysinger
Signed-off-by: Mike Frysinger <vapier.adi@gmail.com> Signed-off-by: Bryan Wu <cooloney@kernel.org>
2008-05-09[Blackfin] arch: remove useless IRQ_SW_INT definesMichael Hennerich
IRQ_SW_INT1 and IRQ_SW_INT2 obsolete: Remove useless defines Fix SYS_IRQS Keep numbering scheme, so we don't break existing configurations. Signed-off-by: Michael Hennerich <michael.hennerich@analog.com> Signed-off-by: Bryan Wu <cooloney@kernel.org>
2008-05-07[Blackfin] arch: Equalize include files: Add VR_CTL masksMichael Hennerich
Signed-off-by: Michael Hennerich <michael.hennerich@analog.com> Signed-off-by: Bryan Wu <cooloney@kernel.org>
2008-04-24[Blackfin] arch: Equalize include files: Add PLL_DIV MasksMichael Hennerich
Signed-off-by: Michael Hennerich <michael.hennerich@analog.com> Signed-off-by: Bryan Wu <cooloney@kernel.org>
2008-04-24[Blackfin] arch: add Blackfin on-chip SIR IrDA driver supportGraf Yang
- add platform device resources in board files - add new bfin_sir.h to each machines Signed-off-by: Graf Yang <graf.yang@analog.com> Signed-off-by: Bryan Wu <cooloney@kernel.org>
2008-04-24[Blackfin] arch: Update anomaly list.Sonic Zhang
Signed-off-by: Sonic Zhang <sonic.zhang@analog.com> Signed-off-by: Michael Hennerich <michael.hennerich@analog.com> Signed-off-by: Bryan Wu <cooloney@kernel.org>
2008-04-23[Blackfin] arch: Prevent potential Core Hang situationMichael Hennerich
If the new value written to the PLL_CTL or VR_CTL register is the same as the previous value, the PLL wake-up will occur immediately (PLL is already locked), but the core and system clock will be bypassed for the PLL_LOCKCNT duration. For this interval, code will execute at the CLKIN rate instead of at the expected CCLK rate. Software should guard against this condition by comparing the current value to the new value before writing the new value. Signed-off-by: Michael Hennerich <michael.hennerich@analog.com> Signed-off-by: Bryan Wu <cooloney@kernel.org>
2008-04-23[Blackfin] arch: Give the DMA base registers a more descriptive nameBernd Schmidt
The DMA base registers are available in a global named "base_addr" for every Blackfin variant. Give this a more descriptive name, and remove duplicate tables from some drivers. Signed-off-by: Bernd Schmidt <bernds_cb1@t-online.de> Signed-off-by: Bryan Wu <cooloney@kernel.org>
2008-04-23[Blackfin] arch: Resolve the clash issue of UART defines between blackfin ↵Graf Yang
headers and include/linux/serial_reg. Signed-off-by: Graf Yang <graf.yang@analog.com> Cc: Robin Getz <rgetz@blackfin.uclinux.org> Signed-off-by: Bryan Wu <cooloney@kernel.org>
2008-02-02[Blackfin] serial driver: Fix bug Poll RTS/CTS status in DMA mode as wellSonic Zhang
https://blackfin.uclinux.org/gf/project/uclinux-dist/tracker/?action=TrackerItemEdit&tracker_item_id=3858 Signed-off-by: Sonic Zhang <sonic.zhang@analog.com> Signed-off-by: Bryan Wu <bryan.wu@analog.com>
2007-12-24[Blackfin] serial driver: rework break flood anomaly handling to be more ↵Mike Frysinger
robust/realistic about what we can actually work around Signed-off-by: Mike Frysinger <michael.frysinger@analog.com> Signed-off-by: Bryan Wu <bryan.wu@analog.com>
2007-12-24[Blackfin] serial driver: fix bug - cache the bits of the LSR on systems ↵Mike Frysinger
where the LSR is read-to-clear Cache the bits of the LSR on systems where the LSR is read-to-clear so that we can safely read the LSR in random places. this fixes older parts where break/framing/parity/overflow was not being detected at all in PIO mode, and this fixes newer parts where break/framing/parity/overflow was being reported all the time without being cleared. Signed-off-by: Mike Frysinger <michael.frysinger@analog.com> Signed-off-by: Bryan Wu <bryan.wu@analog.com>
2008-02-25[Blackfin] arch: add bfin_clear_PPIx_STATUS() helper funcs like we have for ↵Mike Frysinger
other parts Signed-off-by: Mike Frysinger <vapier.adi@gmail.com> Signed-off-by: Bryan Wu <cooloney@kernel.org>
2008-02-25[Blackfin] arch: Fix CONFIG_PM support for BF561Michael Hennerich
Signed-off-by: Michael Hennerich <michael.hennerich@analog.com> Signed-off-by: Bryan Wu <cooloney@kernel.org>
2008-02-08[Blackfin] arch: Merge BF561 support into ints-priorityMichael Hennerich
Merge single core ints-priority-sc.c and dual core ints-priority-dc.c into one common code ints-priority.c Signed-off-by: Michael Hennerich <michael.hennerich@analog.com> Signed-off-by: Bryan Wu <bryan.wu@analog.com>
2008-01-22[Blackfin] arch: Fix BUG gpio_direction_output API is not compatitable with ↵Michael Hennerich
GENERIC_GPIO API interface signef-off-by: Michael Hennerich <michael.hennerich@analog.com> Signed-off-by: Bryan Wu <bryan.wu@analog.com>
2007-12-24[Blackfin] arch: update to latest anomaly sheetsMike Frysinger
Signed-off-by: Mike Frysinger <michael.frysinger@analog.com> Signed-off-by: Bryan Wu <bryan.wu@analog.com>
2007-12-24[Blackfin] arch: Fix gpio label handlingMichael Hennerich
early serial init also utilizes the peripheral request api - however at this point bfin_gpio_init didn't allocate memory for the labels. So we always have two zombies (allocated pin functions without labels) This happens before the initcalls - We now allocate memory statically. Define MAX_RESOURCES individually for each cpu. Signed-off-by: Michael Hennerich <michael.hennerich@analog.com> Signed-off-by: Bryan Wu <bryan.wu@analog.com>
2007-11-21Blackfin arch: cplb and map header file cleanupMike Frysinger
- remove duplicated defines for the BF561 - generalize L2 support (so that it works for BF54x) and mark it executable - add support for reading/executing the Boot ROM sections (since it has data/functions we may need at runtime) - and fixup names for each map Signed-off-by: Mike Frysinger <michael.frysinger@analog.com> Signed-off-by: Bryan Wu <bryan.wu@analog.com>
2007-11-21Blackfin arch: fix broken on BF52x, remove silly checks on processors for ↵Mike Frysinger
L1_SCRATCH defines Signed-off-by: Mike Frysinger <michael.frysinger@analog.com> Signed-off-by: Bryan Wu <bryan.wu@analog.com>
2007-11-15Blackfin arch: fix double fault definition for BF561 core A and core BMike Frysinger
VDSP has double fault on core a/b inverted for BF561 -- bit 11 is core a while bit 12 is core b Signed-off-by: Mike Frysinger <michael.frysinger@analog.com> Signed-off-by: Bryan Wu <bryan.wu@analog.com>
2007-11-15Blackfin arch: remove useless CONFIG_IRQCHIP_DEMUX_GPIOMike Frysinger
since we have this always turned on now and dont want it off (and hasnt been an option in a while) Signed-off-by: Mike Frysinger <michael.frysinger@analog.com> Signed-off-by: Bryan Wu <bryan.wu@analog.com>
2007-11-12Blackfin arch: add a compatible DOUBLE_FAULT define to enable resets on ↵Mike Frysinger
double faults in either core Signed-off-by: Mike Frysinger <michael.frysinger@analog.com> Signed-off-by: Bryan Wu <bryan.wu@analog.com>
2007-10-30Blackfin arch: Add missing definitions for BF561Mike Frysinger
Signed-off-by: Mike Frysinger <michael.frysinger@analog.com> Signed-off-by: Bryan Wu <bryan.wu@analog.com>
2007-10-10Blackfin arch: add TWIx_REGBASE and SPIx_REGBASE to specific CPU header ↵Bryan Wu
files, use the new REGBASE for board platform resources Signed-off-by: Bryan Wu <bryan.wu@analog.com>
2007-10-10Blackfin arch: to do some consolidation of common code and common name spacesRobin Getz
now all BLKFIN should be BFIN, should be no functional changes. Signed-off-by: Robin Getz <robin.getz@analog.com> Signed-off-by: Bryan Wu <bryan.wu@analog.com>
2007-08-03Blackfin arch: Fix CCLK and SCLK checksRobin Getz
Fix CCLK and SCLK checks, combine all arch checks into one file for maintance. Checkins that remove more lines than they add are always good. Signed-off-by: Robin Getz <robin.getz@analog.com> Signed-off-by: Bryan Wu <bryan.wu@analog.com>
2007-07-25Blackfin arch: scrub remaining ASSEMBLY usage since the switch to __ASSEMBLY__Mike Frysinger
Signed-off-by: Mike Frysinger <michael.frysinger@analog.com> Signed-off-by: Bryan Wu <bryan.wu@analog.com>
2007-08-05Blackfin arch: fix bugs report by Andy Liu <yjhsou@gmail.com>, AD1836 can't ↵Bryan Wu
be probed in BF561-EZ Cc: Andy Liu <yjhsou@gmail.com> Signed-off-by: Bryan Wu <bryan.wu@analog.com>
2007-07-24Blackfin arch: Finalize the generic gpio support - add gpio_to_irq and ↵Michael Hennerich
irq_to_gpio Signed-off-by: Michael Hennerich <michael.hennerich@analog.com> Signed-off-by: Bryan Wu <bryan.wu@analog.com>
2007-08-05Blackfin arch: update to latest anomaly sheetsMike Frysinger
Signed-off-by: Mike Frysinger <michael.frysinger@analog.com> Signed-off-by: Bryan Wu <bryan.wu@analog.com>
2007-07-25Blackfin arch: reorganize headers slightly so we can be sure things are ↵Mike Frysinger
defined early enough Signed-off-by: Mike Frysinger <michael.frysinger@analog.com> Signed-off-by: Bryan Wu <bryan.wu@analog.com>
2007-07-25Blackfin arch: use the [CS]SYNC() macros which include anomaly workarounds ↵Mike Frysinger
rather than __builtin_bfin_[cs]sync() Signed-off-by: Mike Frysinger <michael.frysinger@analog.com> Signed-off-by: Bryan Wu <bryan.wu@analog.com>
2007-07-25Blackfin arch: revise anomaly handling by basing things on the compiler not ↵Mike Frysinger
the kconfig defines revise anomaly handling by basing things on the compiler not the kconfig defines, so the header is stable and usable outside of the kernel. This also allows us to move some code from preprocessing to compiling (gcc culls dead code) which should help with code quality (readability, catch minor bugs, etc...). Signed-off-by: Mike Frysinger <michael.frysinger@analog.com> Signed-off-by: Bryan Wu <bryan.wu@analog.com>
2007-07-24Blackfin arch: cleanup and standardize anomaly.h file format -- no ↵Mike Frysinger
functional changes Signed-off-by: Mike Frysinger <michael.frysinger@analog.com> Signed-off-by: Bryan Wu <bryan.wu@analog.com>
2007-10-03Blackfin arch: gpio pinmux and resource allocation API required by BF537 on ↵Michael Hennerich
chip ethernet mac driver Signed-off-by: Michael Hennerich <michael.hennerich@analog.com> Signed-off-by: Bryan Wu <bryan.wu@analog.com>
2007-08-05Blackfin arch: fix the aliased write macrosRobin Getz
Signed-off-by: Robin Getz <robin.getz@analog.com> Signed-off-by: Bryan Wu <bryan.wu@analog.com>
2007-07-24Blackfin arch: setup aliases for some core Core A MMRsMike Frysinger
setup aliases for some core Core A MMRs to ease porting in cases where common code would actually want Core A (or Core B MMR is reserved) Signed-off-by: Mike Frysinger <michael.frysinger@analog.com> Signed-off-by: Bryan Wu <bryan.wu@analog.com>
2007-07-12Blackfin arch: clean up some coding style issuesBryan Wu
Signed-off-by: Bryan Wu <bryan.wu@analog.com>
2007-07-12Blackfin arch: Add Support for Peripheral PortMux and resouce allocationMichael Hennerich
Signed-off-by: Michael Hennerich <michael.hennerich@analog.com> Signed-off-by: Bryan Wu <bryan.wu@analog.com>
2007-06-21Blackfin arch: add missing implementations SIC_IWR crosses several registersMichael Hennerich
SIC_IWR crosses several registers - add missing implementations - make sure SIC_IWR is SET after boot Signed-off-by: Michael Hennerich <michael.hennerich@analog.com> Signed-off-by: Bryan Wu <bryan.wu@analog.com>
2007-07-12Blackfin arch: initial supporting for BF548-EZKITRoy Huang
The ADSP-BF54x was specifically designed to meet the needs of convergent multimedia applications where system performance and cost are essential ingredients. The integration of multimedia, human interface, and connectivity peripherals combined with increased system bandwidth and on-chip memory provides customers a platform to design the most demanding applications. Since now, ADSP-BF54x will be supported in the Linux kernel and bunch of related drivers such as USB OTG, ATAPI, NAND flash controller, LCD framebuffer, sound, touch screen will be submitted later. Please enjoy the show. Signed-off-by: Roy Huang <roy.huang@analog.com> Signed-off-by: Bryan Wu <bryan.wu@analog.com>
2007-06-21Blackfin arch: add missing braces around array bfin serial initMike Frysinger
Signed-off-by: Mike Frysinger <michael.frysinger@analog.com> Signed-off-by: Bryan Wu <bryan.wu@analog.com>
2007-05-21Blackfin arch: update blackfin header files to latest one in VDSP.Bryan Wu
a) add new processor BF52x/BF54x header files b) update blackfin BF533/BF537/BF561 header files to latest one in VDSP. c) scrub watchdog/rtc masks from headers as we dont need/want them (too generic and the drivers dont use them) Signed-off-by: Mike Frysinger <michael.frysinger@analog.com> Signed-off-by: Roy Huang <roy.huang@analog.com> Signed-off-by: Sonic Zhang <sonic.zhang@analog.com> Signed-off-by: Bryan Wu <bryan.wu@analog.com> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2007-05-21Blackfin arch: Move write to VR_CTL closer to IDLEMichael Hennerich
Signed-off-by: Michael Hennerich <michael.hennerich@analog.com> Signed-off-by: Bryan Wu <bryan.wu@analog.com> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2007-05-07blackfin architectureBryan Wu
This adds support for the Analog Devices Blackfin processor architecture, and currently supports the BF533, BF532, BF531, BF537, BF536, BF534, and BF561 (Dual Core) devices, with a variety of development platforms including those avaliable from Analog Devices (BF533-EZKit, BF533-STAMP, BF537-STAMP, BF561-EZKIT), and Bluetechnix! Tinyboards. The Blackfin architecture was jointly developed by Intel and Analog Devices Inc. (ADI) as the Micro Signal Architecture (MSA) core and introduced it in December of 2000. Since then ADI has put this core into its Blackfin processor family of devices. The Blackfin core has the advantages of a clean, orthogonal,RISC-like microprocessor instruction set. It combines a dual-MAC (Multiply/Accumulate), state-of-the-art signal processing engine and single-instruction, multiple-data (SIMD) multimedia capabilities into a single instruction-set architecture. The Blackfin architecture, including the instruction set, is described by the ADSP-BF53x/BF56x Blackfin Processor Programming Reference http://blackfin.uclinux.org/gf/download/frsrelease/29/2549/Blackfin_PRM.pdf The Blackfin processor is already supported by major releases of gcc, and there are binary and source rpms/tarballs for many architectures at: http://blackfin.uclinux.org/gf/project/toolchain/frs There is complete documentation, including "getting started" guides available at: http://docs.blackfin.uclinux.org/ which provides links to the sources and patches you will need in order to set up a cross-compiling environment for bfin-linux-uclibc This patch, as well as the other patches (toolchain, distribution, uClibc) are actively supported by Analog Devices Inc, at: http://blackfin.uclinux.org/ We have tested this on LTP, and our test plan (including pass/fails) can be found at: http://docs.blackfin.uclinux.org/doku.php?id=testing_the_linux_kernel [m.kozlowski@tuxland.pl: balance parenthesis in blackfin header files] Signed-off-by: Bryan Wu <bryan.wu@analog.com> Signed-off-by: Mariusz Kozlowski <m.kozlowski@tuxland.pl> Signed-off-by: Aubrey Li <aubrey.li@analog.com> Signed-off-by: Jie Zhang <jie.zhang@analog.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
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