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2013-07-29Merge tag 'pinctrl-for-v3.11-2' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl Pull pin control fixes from Linus Walleij: - Driver fixes for AM33xx, SIRF and PFC pin controllers - Fix a compile warning from the pinctrl single-register driver - Fix a little nasty memory leak * tag 'pinctrl-for-v3.11-2' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: pinctrl: fix a memleak when freeing maps pinctrl: pinctrl-single: fix compile warning when no CONFIG_PM pinctrl: sh-pfc: fix SDHI0 VccQ regulator on sh73a0 with DT arm/dts: sirf: fix the pingroup name mismatch between drivers and dts pinctrl: sirf: add usp0_uart_nostreamctrl pin group for usp-uart without flowctrl pinctrl: sirf: fix the pin number and mux bit for usp0 pinctrl: am33xx dt binding: correct include path
2013-07-21pinctrl: am33xx dt binding: correct include pathIan Campbell
Using #include <include/...> is a bit odd. It happens to work because the DTC flags include -Iarch/FOO/boot/dts as well as arch/FOO/boot/dts/include and arch/FOO/boot/dts/include/dt-bindings is a symlink to include/dt-bindings. Signed-off-by: Ian Campbell <ian.campbell@citrix.com> Cc: Grant Likely <grant.likely@secretlab.ca> Cc: Linus Walleij <linus.walleij@linaro.org> Cc: linux-kernel@vger.kernel.org Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-07-15ARM: imx: fix vf610 enet module clock selectionShawn Guo
The fec/enet driver calculates MDC rate with the formula below. ref_freq / ((MII_SPEED + 1) x 2) The ref_freq here is the fec internal module clock, which is missing from clk-vf610 clock driver right now. And clk-vf610 driver mistakenly supplies RMII clock (50 MHz) as the source to fec. This results in the situation that fec driver gets ref_freq as 50 MHz, while physically it runs at 66 MHz (fec module clock physically sources from ipg which runs at 66 MHz). That's why software expects MDC runs at 2.5 MHz, while the measurement tells it runs at 3.3 MHz. And this causes the PHY KSZ8041 keeps swithing between Full and Half mode as below. libphy: 400d0000.etherne:00 - Link is Up - 100/Full libphy: 400d0000.etherne:00 - Link is Up - 100/Half libphy: 400d0000.etherne:00 - Link is Up - 100/Full libphy: 400d0000.etherne:00 - Link is Up - 100/Half libphy: 400d0000.etherne:00 - Link is Up - 100/Full libphy: 400d0000.etherne:00 - Link is Up - 100/Half Add the missing module clock for ENET0 and ENET1, and correct the clock supplying in device tree to fix above issue. Thanks to Alison Wang <b18965@freescale.com> for debugging the issue. Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-07-03Merge tag 'pinctrl-for-v3.11-1' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl Pull pin control changes from Linus Walleij: - A large slew of improvements of the Genric pin configuration support, and deployment in four different platforms: Rockchip, Super-H PFC, ABx500 and TZ1090. Support BIAS_BUS_HOLD, get device tree parsing and debugfs support into shape. - We also have device tree support with generic naming conventions for the generic pin configuration. - Delete the unused and confusing direct pinconf API. Now state transitions is *the* way to control pins and multiplexing. - New drivers for Rockchip, TZ1090, and TZ1090 PDC. - Two pin control states related to power management are now handled in the device core: "sleep" and "idle", removing a lot of boilerplate code in drivers. We do not yet know if this is the final word for pin PM, but it already make things a lot easier to handle. - Handle sparse GPIO ranges passing a list of disparate pins, and utilize these in the new BayTrail (x86 Atom SoC) driver. - Make the sunxi (AllWinner) driver handle external interrupts. - Make it possible for pinctrl-single to handle the case where several pins are managed by a single register, and augment it to handle sleep modes. - Cleanups and improvements for the abx500 drivers. - Move Sirf pin control drivers to their own directory, support save/restore of context and add support for the SiRFatlas6 SoC. - PMU muxing for the Dove pinctrl driver. - Finalization and support for VF610 in the i.MX6 pinctrl driver. - Smoothen out various Exynos rough edges. - Generic cleanups of various kinds. * tag 'pinctrl-for-v3.11-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: (82 commits) pinctrl: vt8500: wmt: remove redundant dev_err call in wmt_pinctrl_probe() pinctrl: remove bindings for pinconf options needing more thought pinctrl: remove slew-rate parameter from tz1090 pinctrl: set unit for debounce time pinconfig to usec pinctrl: more clarifications for generic pull configs pinctrl: rip out the direct pinconf API pinctrl-tz1090-pdc: add TZ1090 PDC pinctrl driver pinctrl-tz1090: add TZ1090 pinctrl driver pinctrl: samsung: Staticize drvdata_list pinctrl: rockchip: Add missing irq_gc_unlock() call before return error pinctrl: abx500: rework error path pinctrl: abx500: suppress hardcoded value pinctrl: abx500: factorize code pinctrl: abx500: fix abx500_gpio_get() pinctrl: abx500: fix abx500_pin_config_set() pinctrl: abx500: Add device tree support sh-pfc: Guard DT parsing with #ifdef CONFIG_OF pinctrl: add Intel BayTrail GPIO/pinctrl support pinctrl: fix pinconf_ops::pin_config_dbg_parse_modify kerneldoc pinctrl: Staticize local symbols ... Conflicts: drivers/net/ethernet/ti/davinci_mdio.c drivers/pinctrl/Makefile
2013-07-02Merge tag 'drivers-for-linus' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc Pull ARM SoC driver specific changes from Arnd Bergmann: "These changes are all driver specific and cross over between arm-soc contents and some other subsystem, in these cases cpufreq, crypto, dma, pinctrl, mailbox and usb, and the subsystem owners agreed to have these changes merged through arm-soc. As we proceed to untangle the dependencies between platform code and driver code, the amount of changes in this category is fortunately shrinking, for 3.11 we have 16 branches here and 101 non-merge changesets, the majority of which are for the stedma40 dma engine driver used in the ux500 platform. Cleaning up that code touches multiple subsystems, but gets rid of the dependency in the end. The mailbox code moved out from mach-omap2 to drivers/mailbox is an intermediate step and is still omap specific at the moment. Patches exist to generalize the subsystem and add other drivers with the same API, but those did not make it for 3.11." * tag 'drivers-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (101 commits) crypto: ux500: use dmaengine_submit API crypto: ux500: use dmaengine_prep_slave_sg API crypto: ux500: use dmaengine_device_control API crypto: ux500/crypt: add missing __iomem qualifiers crypto: ux500/hash: add missing static qualifiers crypto: ux500/hash: use readl on iomem addresses dmaengine: ste_dma40: Declare memcpy config as static ARM: ux500: Remove mop500_snowball_ethernet_clock_enable() ARM: ux500: Correct the EN_3v3 regulator's on/off GPIO ARM: ux500: Provide a AB8500 GPIO Device Tree node gpio: rcar: fix gpio_rcar_of_table gpio-rcar: Remove #ifdef CONFIG_OF around OF-specific sections gpio-rcar: Reference core gpio documentation in the DT bindings clk: exynos5250: Add enum entries for divider clock of i2s1 and i2s2 ARM: dts: Update Samsung I2S documentation ARM: dts: add clock provider information for i2s controllers in Exynos5250 ARM: dts: add Exynos audio subsystem clock controller node clk: samsung: register audio subsystem clocks using common clock framework ARM: dts: use #include for all device trees for Samsung pinctrl: s3c24xx: use correct header for chained_irq functions ...
2013-06-20Merge branch 'for_3.11/dts' of ↵Arnd Bergmann
git://git.kernel.org/pub/scm/linux/kernel/git/bcousson/linux-omap-dt into next/dt From Benoit Cousson: omap devicetree changes for v3.11 merge window - Add mandatory DT support for missing IPs, like USB host, bandgap, LED, NAND, LAN, CPSW, PWM for OMAP and AMXX devices. - Introduce new AM43x silicon. * 'for_3.11/dts' of git://git.kernel.org/pub/scm/linux/kernel/git/bcousson/linux-omap-dt: (52 commits) ARM: dts: omap5-uevm: Provide USB Host PHY clock frequency ARM: dts: omap4-panda: Fix DVI EDID reads ARM: dts: omap4-panda: Add USB Host support ARM: dts: AM43x EPOS EVM support ARM: dts: OMAP5: Add bandgap DT entry ARM: dts: AM33XX: Add pinmux configuration for CPSW to am335x EVM ARM: dts: AM33XX: Add pinmux configuration for CPSW to EVMsk ARM: dts: AM33XX: Add pinmux configuration for CPSW to beaglebone ARM: dts: omap3-overo: Add default trigger for TWL4030 LED ARM: dts: omap3-tobi: Correct polarity for GPIO LED ARM: dts: omap3-tobi: Add SMSC911X node ARM: dts: OMAP3: Include IRQ header ARM: dts: Protect pinctrl headers against multiple inclusions ARM: AM33XX: clock data: Enable clkout2 as part of init ARM: AM33XX: clock: Add debugSS clock nodes ARM: dts: OMAP5: Add Palmas MFD node and regulator nodes ARM: dts: AM33XX: Add PWM backlight DT data to am335x-evmsk ARM: dts: AM33XX: Add PWM backlight DT data to am335x-evm ARM: dts: AM33XX: Add PWMSS device tree nodes ARM: dts: OMAP4460: Add bandgap entry for OMAP4460 devices ... Signed-off-by: Arnd Bergmann <arnd@arndb.de> Acked-by: Tony Lindgren <tony@atomide.com>
2013-06-20Merge tag 'common-clk-audio' of ↵Arnd Bergmann
git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung into next/drivers From Kukjin Kim: based on exynos-dt-2 and s3c24xx-dt-2 - use #include for all Samsung DT - add clk for exynos audio subsystem (audss) and i2s - support audss and i2s for exynos5250 * tag 'common-clk-audio' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung: clk: exynos5250: Add enum entries for divider clock of i2s1 and i2s2 ARM: dts: Update Samsung I2S documentation ARM: dts: add clock provider information for i2s controllers in Exynos5250 ARM: dts: add Exynos audio subsystem clock controller node clk: samsung: register audio subsystem clocks using common clock framework ARM: dts: use #include for all device trees for Samsung Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2013-06-20Merge tag 'imx-soc-3.11' of git://git.linaro.org/people/shawnguo/linux-2.6 ↵Arnd Bergmann
into next/dt This is a dependency for imx/dt Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2013-06-19ARM: dts: Protect pinctrl headers against multiple inclusionsFlorian Vaussard
Pinctrl headers were not protected with #ifndef. Signed-off-by: Florian Vaussard <florian.vaussard@epfl.ch> Acked-by: Grant Likely <grant.likely@secretlab.ca> Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
2013-06-18ARM: dts: AM33XX: Specific pinctrl headerFlorian Vaussard
The pinctrl IP inside the AM33XX family differs slightly from what is found on OMAP2+. Define a specific header to take account of the differences. Signed-off-by: Florian Vaussard <florian.vaussard@epfl.ch> Tested-by: Afzal Mohammed <afzal@ti.com> Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
2013-06-18ARM: dts: OMAP2+: Header file for pinctrl constantsFlorian Vaussard
Most of the constants are taken from arch/arm/mach-omap2/mux.h. Define some others for the PIN_OUTPUT_* flavours. Signed-off-by: Florian Vaussard <florian.vaussard@epfl.ch> Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Reviewed-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
2013-06-18clk: samsung: register audio subsystem clocks using common clock frameworkPadmavathi Venna
Audio subsystem is introduced in s5pv210 and exynos platforms. This has seperate clock controller which can control i2s0 and pcm0 clocks. This patch registers the audio subsystem clocks with the common clock framework on Exynos family. Signed-off-by: Padmavathi Venna <padma.v@samsung.com> Reviewed-by: Sylwester Nawrocki <s.nawrocki@samsung.com> Reviewed-by: Doug Anderson <dianders@chromium.org> Acked-by: Mike Turquette <mturquette@linaro.org> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2013-06-17ARM: imx: add VF610 clock supportJingchang Lu
Add clock support for Vybrid VF610. It uses dtc macro support to define all clock IDs in vf610-clock.h to keep clock IDs coherence between kernel and DT. Signed-off-by: Jingchang Lu <b35083@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-06-17ARM: imx: add clock support for imx6slShawn Guo
Add clock support for i.MX6 SoloLite. It uses the dtc marco support to define all clock IDs in imx6sl-clock.h, which will be included by both clock driver and device tree sources, so that the data will stay sync all the time between kernel and DT. Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-06-16pinctrl: add pinctrl driver for Rockchip SoCsHeiko Stübner
This driver adds support the Cortex-A9 based SoCs from Rockchip, so at least the RK2928, RK3066 (a and b) and RK3188. Earlier Rockchip SoCs seem to use similar mechanics for gpio handling so should be supportable with relative small changes. Pull handling on the rk3188 is currently a stub, due to it being a bit different to the earlier SoCs. Pinmuxing as well as gpio (and interrupt-) handling tested on a rk3066a based machine. Signed-off-by: Heiko Stuebner <heiko@sntech.de> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-06-15Merge tag 'at91-dt' of git://github.com/at91linux/linux-at91 into next/dtOlof Johansson
From Nicolas Ferre: Again some nice DT updates for AT91: - DMA binding update with one patch shared with slave-dma tree - more SPI DT activation - enable the USB gadget HS for DT platforms * tag 'at91-dt' of git://github.com/at91linux/linux-at91: ARM: at91: sam9m10g45ek add udc DT support ARM: at91: sam9g45 add udc DT support ARM: at91: sam9x5ek add udc DT support ARM: at91: sam9x5 add udc DT support ARM: at91: dt: at91sam9x5: add SPI DMA client infos ARM: at91: dt: switch DMA DT bindings to pre-processor ARM: at91: dt: add header to define at_hdmac configuration
2013-06-15Merge tag 'tegra-for-3.11-dt' of ↵Olof Johansson
git://git.kernel.org/pub/scm/linux/kernel/git/swarren/linux-tegra into next/dt From Stephen Warren: ARM: tegra: device tree updates This branch contains all device tree updates for Tegra boards. The changes are: * Converted all DT files to use the C pre-processor, to support the use of named constants. This included use of defines for GPIO, IRQ, and clock constants. * Enabling new features such as: - SPI on Dalmore. - Audio on Dalmore and Beaver. - gpio-leds on Beaver. - Power-supply/batter linkage on Dalmore. * A minor fix to the RAM size node on Beaver. It is based on previous pull request tegra-for-3.11-deps-for-usb followed by a merge of tegra-for-3.11-deps-for-clk. * tag 'tegra-for-3.11-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/swarren/linux-tegra: (21 commits) ARM: tegra: enable audio on Beaver ARM: tegra: enable audio on Dalmore ARM: tegra: add power-supplies link between battery and charger ARM: tegra: add audio-related nodes to Tegra114 DT ARM: tegra114: convert device tree files to use CLK defines ARM: tegra30: convert device tree files to use CLK defines ARM: tegra20: convert device tree files to use CLK defines ARM: tegra: Add charger subnode to tps65090 node ARM: tegra: convert device tree files to use IRQ defines ARM: tegra: convert device tree files to use GPIO defines ARM: tegra: create a DT header defining GPIO IDs ARM: tegra: use #include for all device trees ARM: tegra: Add gpio-leds to Tegra30 Beaver ARM: tegra: fix memory size on Beaver ARM: tegra: enable spi4 on Dalmore ARM: tegra114: create a DT header defining CLK IDs ARM: tegra30: create a DT header defining CLK IDs ARM: tegra20: create a DT header defining CLK IDs ARM: tegra: update device trees for USB binding rework ARM: tegra: modify ULPI reset GPIO properties ... Signed-off-by: Olof Johansson <olof@lixom.net>
2013-06-14ARM: at91: dt: add header to define at_hdmac configurationLudovic Desroches
DMA-cell content is a concatenation of several values. In order to keep this stuff human readable, macros are introduced. The values for the FIFO configuration are not the same as the ones used in the configuration register in order to keep backward compatibility. Most devices use the half FIFO configuration but USART ones have to use the ASAP configuration. This parameter was not initially planed to be into the at91 dma dt binding. The third cell will be used to store this parameter, it will become a concatenation of the FIFO configuration and of the peripheral ID. In order to keep backward compatibility i.e. FIFO configuration is equal to 0, we have to perform a translation since the value to put in the register to set half FIFO is 1. Acked-by: Arnd Bergmann <arnd@arndb.de> Acked-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Signed-off-by: Ludovic Desroches <ludovic.desroches@atmel.com> Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
2013-05-28ARM: tegra: create a DT header defining GPIO IDsStephen Warren
All Tegra GPIOs are named after the GPIO bank and GPIO number within the bank. Define a macro to calculate the GPIO ID based on those parameters. Make the macro available via all Tegra .dtsip files. Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-05-28ARM: tegra114: create a DT header defining CLK IDsHiroshi Doyu
Create a header file to define the clock IDs used by the Tegra114 clock binding. Remove the list of definitions from the binding documentation, and refer the reader to the header file. This will allow the same header to be used by both device tree files, and drivers implementing this binding, which guarantees that the two stay in sync. This also makes device trees more readable by using names instead of magic numbers. Signed-off-by: Hiroshi Doyu <hdoyu@nvidia.com> [swarren, add header to clock/ instead of clk/ to match binding location] Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-05-28ARM: tegra30: create a DT header defining CLK IDsHiroshi Doyu
Create a header file to define the clock IDs used by the Tegra30 clock binding. Remove the list of definitions from the binding documentation, and refer the reader to the header file. This will allow the same header to be used by both device tree files, and drivers implementing this binding, which guarantees that the two stay in sync. This also makes device trees more readable by using names instead of magic numbers. Signed-off-by: Hiroshi Doyu <hdoyu@nvidia.com> [swarren, add header to clock/ instead of clk/ to match binding location] Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-05-28ARM: tegra20: create a DT header defining CLK IDsHiroshi Doyu
Create a header file to define the clock IDs used by the Tegra20 clock binding. Remove the list of definitions from the binding documentation, and refer the reader to the header file. This will allow the same header to be used by both device tree files, and drivers implementing this binding, which guarantees that the two stay in sync. This also makes device trees more readable by using names instead of magic numbers. Signed-off-by: Hiroshi Doyu <hdoyu@nvidia.com> [swarren, add header to clock/ instead of clk/ to match binding location] Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-05-17ARM: at91: dt: add pinctrl pre-processor defineJean-Christophe PLAGNIOL-VILLARD
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
2013-04-05ARM: dt: create a DT header for the GICStephen Warren
The ARM GIC binding defines a few custom cells and flags for its IRQ specifier. Provide names for those. Signed-off-by: Stephen Warren <swarren@nvidia.com> Acked-by: Rob Herring <rob.herring@calxeda.com>
2013-04-05ARM: dt: add header to define IRQ flagsStephen Warren
Many IRQ device tree bindings use the same flags. Create a header to define those. Signed-off-by: Stephen Warren <swarren@nvidia.com> Acked-by: Rob Herring <rob.herring@calxeda.com>
2013-04-05ARM: dt: add header to define GPIO flagsStephen Warren
Many GPIO device tree bindings use the same flags. Create a header to define those. Signed-off-by: Stephen Warren <swarren@nvidia.com> Acked-by: Rob Herring <rob.herring@calxeda.com>