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author | Mike Frysinger <vapier@gentoo.org> | 2008-06-01 05:26:29 (GMT) |
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committer | Mike Frysinger <vapier@gentoo.org> | 2009-01-28 18:26:14 (GMT) |
commit | 4f6a313240c531042f16909a3a170ab047b95779 (patch) | |
tree | 7244f2f7673b74cad2972e9d63f726784222227d | |
parent | dc2bfb0b58d7462b9eba68f3ae38e38cada0ad33 (diff) | |
download | u-boot-fsl-qoriq-4f6a313240c531042f16909a3a170ab047b95779.tar.xz |
Blackfin: respect CONFIG_CLKIN_HALF
As pointed out by Ivan Koryakovskiy, the initialization code was not
actually respecting the CONFIG_CLKIN_HALF option when configuring the
PLL_CTL register.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
-rw-r--r-- | cpu/blackfin/initcode.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/cpu/blackfin/initcode.c b/cpu/blackfin/initcode.c index ffc8420..e733dd2 100644 --- a/cpu/blackfin/initcode.c +++ b/cpu/blackfin/initcode.c @@ -158,7 +158,7 @@ static inline void serial_putc(char c) #endif #ifndef CONFIG_PLL_CTL_VAL -# define CONFIG_PLL_CTL_VAL (SPORT_HYST | (CONFIG_VCO_MULT << 9)) +# define CONFIG_PLL_CTL_VAL (SPORT_HYST | (CONFIG_VCO_MULT << 9) | CONFIG_CLKIN_HALF) #endif #ifndef CONFIG_EBIU_RSTCTL_VAL |