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authorAxel Lin <axel.lin@ingics.com>2015-01-06 00:08:25 (GMT)
committerJagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>2015-01-06 10:22:27 (GMT)
commit501943696ea4f4194705b7449547fd3d66c13e97 (patch)
tree2bca892c4f617a13727cfec6d6389a7e2b9e83ec
parentd622ac39274a949b6445f1bfd92dc1644014388b (diff)
downloadu-boot-fsl-qoriq-501943696ea4f4194705b7449547fd3d66c13e97.tar.xz
spi: designware_spi: Fix detecting FIFO depth
Current code tries to find the highest valid fifo depth by checking the value it wrote to DW_SPI_TXFLTR. There are a few problems in current code: 1) There is an off-by-one in dws->fifo_len setting because it assumes the latest register write fails so the latest valid value should be fifo - 1. 2) We know the depth could be from 2 to 256 from HW spec, so it is not necessary to test fifo == 257. In the case fifo is 257, it means the latest valid setting is fifo = 256. So after the for loop iteration, we should check fifo == 2 case instead of fifo == 257 if detecting the FIFO depth fails. This patch fixes above issues. Signed-off-by: Axel Lin <axel.lin@ingics.com> Acked-by: Stefan Roese <sr@denx.de> Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
-rw-r--r--drivers/spi/designware_spi.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/drivers/spi/designware_spi.c b/drivers/spi/designware_spi.c
index 98c9f03..0210667 100644
--- a/drivers/spi/designware_spi.c
+++ b/drivers/spi/designware_spi.c
@@ -164,13 +164,13 @@ static void spi_hw_init(struct dw_spi_priv *priv)
if (!priv->fifo_len) {
u32 fifo;
- for (fifo = 2; fifo <= 257; fifo++) {
+ for (fifo = 2; fifo <= 256; fifo++) {
dw_writew(priv, DW_SPI_TXFLTR, fifo);
if (fifo != dw_readw(priv, DW_SPI_TXFLTR))
break;
}
- priv->fifo_len = (fifo == 257) ? 0 : fifo;
+ priv->fifo_len = (fifo == 2) ? 0 : fifo - 1;
dw_writew(priv, DW_SPI_TXFLTR, 0);
}
debug("%s: fifo_len=%d\n", __func__, priv->fifo_len);