diff options
| author | Álvaro Fernández Rojas <noltari@gmail.com> | 2017-05-07 18:13:03 (GMT) |
|---|---|---|
| committer | Daniel Schwierzeck <daniel.schwierzeck@gmail.com> | 2017-05-10 14:16:09 (GMT) |
| commit | 5b14e13c24f6a26fc30147404af8c570530f0a8d (patch) | |
| tree | 3e16d62f04183b273713f58ac193b3d2793099fc | |
| parent | 70789bd2a5d885671f5256b5c2717fec30ac3fe7 (diff) | |
| download | u-boot-fsl-qoriq-5b14e13c24f6a26fc30147404af8c570530f0a8d.tar.xz | |
mips: bmips: add bcm6345-clk driver support for BCM6328
This driver can control up to 32 clocks.
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
| -rw-r--r-- | arch/mips/dts/brcm,bcm6328.dtsi | 7 | ||||
| -rw-r--r-- | include/dt-bindings/clock/bcm6328-clock.h | 25 |
2 files changed, 32 insertions, 0 deletions
diff --git a/arch/mips/dts/brcm,bcm6328.dtsi b/arch/mips/dts/brcm,bcm6328.dtsi index a5b43ae..6b5c5dd 100644 --- a/arch/mips/dts/brcm,bcm6328.dtsi +++ b/arch/mips/dts/brcm,bcm6328.dtsi @@ -4,6 +4,7 @@ * SPDX-License-Identifier: GPL-2.0+ */ +#include <dt-bindings/clock/bcm6328-clock.h> #include <dt-bindings/gpio/gpio.h> #include "skeleton.dtsi" @@ -43,6 +44,12 @@ clock-frequency = <50000000>; u-boot,dm-pre-reloc; }; + + periph_clk: periph-clk { + compatible = "brcm,bcm6345-clk"; + reg = <0x10000004 0x4>; + #clock-cells = <1>; + }; }; ubus { diff --git a/include/dt-bindings/clock/bcm6328-clock.h b/include/dt-bindings/clock/bcm6328-clock.h new file mode 100644 index 0000000..5d0fc11 --- /dev/null +++ b/include/dt-bindings/clock/bcm6328-clock.h @@ -0,0 +1,25 @@ +/* + * Copyright (C) 2017 Álvaro Fernández Rojas <noltari@gmail.com> + * + * Derived from linux/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef __DT_BINDINGS_CLOCK_BCM6328_H +#define __DT_BINDINGS_CLOCK_BCM6328_H + +#define BCM6328_CLK_PHYMIPS 0 +#define BCM6328_CLK_ADSL_QPROC 1 +#define BCM6328_CLK_ADSL_AFE 2 +#define BCM6328_CLK_ADSL 3 +#define BCM6328_CLK_MIPS 4 +#define BCM6328_CLK_SAR 5 +#define BCM6328_CLK_PCM 6 +#define BCM6328_CLK_USBD 7 +#define BCM6328_CLK_USBH 8 +#define BCM6328_CLK_HSSPI 9 +#define BCM6328_CLK_PCIE 10 +#define BCM6328_CLK_ROBOSW 11 + +#endif /* __DT_BINDINGS_CLOCK_BCM6328_H */ |