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author | Bo Shen <voice.shen@atmel.com> | 2014-08-01 08:37:09 (GMT) |
---|---|---|
committer | Andreas Bießmann <andreas.devel@googlemail.com> | 2014-09-18 22:11:17 (GMT) |
commit | 7b1dc26fae813fcf7650340803972feb8829853e (patch) | |
tree | ad6a2b6db42f373056f51fb45636183e44ed4e2a | |
parent | d6b79434644f67d04d089061f449535675a640eb (diff) | |
download | u-boot-fsl-qoriq-7b1dc26fae813fcf7650340803972feb8829853e.tar.xz |
ARM: atmel: sama5d3: add timings register
Signed-off-by: Bo Shen <voice.shen@atmel.com>
Reviewed-by: Andreas Bießmann <andreas.devel@googlemail.com>
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
-rw-r--r-- | arch/arm/include/asm/arch-at91/sama5d3_smc.h | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/arch/arm/include/asm/arch-at91/sama5d3_smc.h b/arch/arm/include/asm/arch-at91/sama5d3_smc.h index 6caa9b6..a859b6d 100644 --- a/arch/arm/include/asm/arch-at91/sama5d3_smc.h +++ b/arch/arm/include/asm/arch-at91/sama5d3_smc.h @@ -14,7 +14,8 @@ #define AT91_ASM_SMC_SETUP0 (ATMEL_BASE_SMC + 0x600) #define AT91_ASM_SMC_PULSE0 (ATMEL_BASE_SMC + 0x604) #define AT91_ASM_SMC_CYCLE0 (ATMEL_BASE_SMC + 0x608) -#define AT91_ASM_SMC_MODE0 (ATMEL_BASE_SMC + 0x60C) +#define AT91_ASM_SMC_TIMINGS0 (ATMEL_BASE_SMC + 0x60c) +#define AT91_ASM_SMC_MODE0 (ATMEL_BASE_SMC + 0x610) #else struct at91_cs { u32 setup; /* 0x600 SMC Setup Register */ |