diff options
author | Bo Shen <voice.shen@atmel.com> | 2014-08-06 09:24:57 (GMT) |
---|---|---|
committer | Andreas Bießmann <andreas.devel@googlemail.com> | 2014-09-18 22:11:21 (GMT) |
commit | 97b2043da6d4e4cc65df90f405583c020429d798 (patch) | |
tree | f71052767ca79b14a2b69b03e8ed419c1eaaecb6 | |
parent | 01c8bf5a6faf3173f130ca58ecc8656bc71adc5a (diff) | |
download | u-boot-fsl-qoriq-97b2043da6d4e4cc65df90f405583c020429d798.tar.xz |
USB: ehci-atmel: use pcr to enable or disable clock
If the SoC has pcr, we use pcr (peripheral control register)
to enable or disable clock.
Signed-off-by: Bo Shen <voice.shen@atmel.com>
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
-rw-r--r-- | drivers/usb/host/ehci-atmel.c | 8 |
1 files changed, 8 insertions, 0 deletions
diff --git a/drivers/usb/host/ehci-atmel.c b/drivers/usb/host/ehci-atmel.c index 9ffe501..9a8f004 100644 --- a/drivers/usb/host/ehci-atmel.c +++ b/drivers/usb/host/ehci-atmel.c @@ -40,7 +40,11 @@ int ehci_hcd_init(int index, enum usb_init_type init, } /* Enable USB Host clock */ +#ifdef CPU_HAS_PCR + at91_periph_clk_enable(ATMEL_ID_UHPHS); +#else writel(1 << ATMEL_ID_UHPHS, &pmc->pcer); +#endif *hccr = (struct ehci_hccr *)ATMEL_BASE_EHCI; *hcor = (struct ehci_hcor *)((uint32_t)*hccr + @@ -55,7 +59,11 @@ int ehci_hcd_stop(int index) ulong start_time, tmp_time; /* Disable USB Host Clock */ +#ifdef CPU_HAS_PCR + at91_periph_clk_disable(ATMEL_ID_UHPHS); +#else writel(1 << ATMEL_ID_UHPHS, &pmc->pcdr); +#endif start_time = get_timer(0); /* Disable UTMI PLL */ |