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authorYork Sun <yorksun@freescale.com>2011-05-05 23:14:14 (GMT)
committerKumar Gala <galak@kernel.crashing.org>2011-05-13 05:36:11 (GMT)
commitd49f8e04dba056803a80388798b735814b893bbf (patch)
tree9ab87f0d59db8f30653b055e212762c5e8924c62
parentee4756d4cb9a7a1fccd8601a614740c810722332 (diff)
downloadu-boot-fsl-qoriq-d49f8e04dba056803a80388798b735814b893bbf.tar.xz
powerpc/mpc8xxx: reword max tCKmin message
Reword "The DIMM max tCKmin is ..." to "The DDR clock is faster than the slowest DIMM(s) can support". Fixed interger type in printf as well. Signed-off-by: York Sun <yorksun@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
-rw-r--r--arch/powerpc/cpu/mpc8xxx/ddr/lc_common_dimm_params.c6
1 files changed, 3 insertions, 3 deletions
diff --git a/arch/powerpc/cpu/mpc8xxx/ddr/lc_common_dimm_params.c b/arch/powerpc/cpu/mpc8xxx/ddr/lc_common_dimm_params.c
index 00f3d6c..8132e68 100644
--- a/arch/powerpc/cpu/mpc8xxx/ddr/lc_common_dimm_params.c
+++ b/arch/powerpc/cpu/mpc8xxx/ddr/lc_common_dimm_params.c
@@ -38,9 +38,9 @@ compute_cas_latency_ddr3(const dimm_params_t *dimm_params,
}
/* validate if the memory clk is in the range of dimms */
if (mclk_ps < tCKmin_X_ps) {
- printf("The DIMM max tCKmin is %d ps,"
- "doesn't support the MCLK cycle %d ps\n",
- tCKmin_X_ps, mclk_ps);
+ printf("DDR clock (MCLK cycle %u ps) is faster than "
+ "the slowest DIMM(s) (tCKmin %u ps) can support.\n",
+ mclk_ps, tCKmin_X_ps);
return 1;
}
/* determine the acutal cas latency */