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authorShengzhou Liu <Shengzhou.Liu@freescale.com>2011-10-14 08:26:06 (GMT)
committerKumar Gala <galak@kernel.crashing.org>2011-10-18 05:37:31 (GMT)
commitf81f19fafaa8e88649e252a6d84096c83e682853 (patch)
tree6e34597030279366841e3521fefa2827641df762
parent2a523f524090d7fc5600ece9f12d7c955db567d7 (diff)
downloadu-boot-fsl-qoriq-f81f19fafaa8e88649e252a6d84096c83e682853.tar.xz
powerpc/85xx: Update USB device tree status based on pin settings
For P3060 and P4080, USB pins are multiplexed with other functions. Update the device tree status for USB ports based on setting of RCW[EC1] & RCW[EC2] which describe if pins are muxed to usb. Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
-rw-r--r--arch/powerpc/cpu/mpc85xx/fdt.c23
1 files changed, 23 insertions, 0 deletions
diff --git a/arch/powerpc/cpu/mpc85xx/fdt.c b/arch/powerpc/cpu/mpc85xx/fdt.c
index 9d2d769..9d31568 100644
--- a/arch/powerpc/cpu/mpc85xx/fdt.c
+++ b/arch/powerpc/cpu/mpc85xx/fdt.c
@@ -537,6 +537,27 @@ void fdt_fixup_fman_firmware(void *blob)
#define fdt_fixup_fman_firmware(x)
#endif
+#if defined(CONFIG_PPC_P4080) || defined(CONFIG_PPC_P3060)
+static void fdt_fixup_usb(void *fdt)
+{
+ ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR);
+ u32 rcwsr11 = in_be32(&gur->rcwsr[11]);
+ int off;
+
+ off = fdt_node_offset_by_compatible(fdt, -1, "fsl,mpc85xx-usb2-mph");
+ if ((rcwsr11 & FSL_CORENET_RCWSR11_EC1) !=
+ FSL_CORENET_RCWSR11_EC1_FM1_USB1)
+ fdt_status_disabled(fdt, off);
+
+ off = fdt_node_offset_by_compatible(fdt, -1, "fsl,mpc85xx-usb2-dr");
+ if ((rcwsr11 & FSL_CORENET_RCWSR11_EC2) !=
+ FSL_CORENET_RCWSR11_EC2_USB2)
+ fdt_status_disabled(fdt, off);
+}
+#else
+#define fdt_fixup_usb(x)
+#endif
+
void ft_cpu_setup(void *blob, bd_t *bd)
{
int off;
@@ -641,6 +662,8 @@ void ft_cpu_setup(void *blob, bd_t *bd)
do_fixup_by_compat_u32(blob, "fsl,flexcan-v1.0",
"clock_freq", gd->bus_clk, 1);
+
+ fdt_fixup_usb(blob);
}
/*