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author | Peng Fan <peng.fan@nxp.com> | 2017-02-22 08:21:42 (GMT) |
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committer | Stefano Babic <sbabic@denx.de> | 2017-03-17 08:27:08 (GMT) |
commit | d0f8516d9e6a327b39cacdeb9a4e930c1348d907 (patch) | |
tree | cf67611feca62b5d3d8109dfd5b0d4988a65efa6 /Makefile | |
parent | 0cb3d82c68012887475eba12ee3d8b82894b460b (diff) | |
download | u-boot-fsl-qoriq-d0f8516d9e6a327b39cacdeb9a4e930c1348d907.tar.xz |
imx: mx7ulp: Add clock framework and functions
Add a clock framework to support SCG1/PCC2/PCC3 for A7 to support get/set
clock source, divider, clock rate and parent source.
Users need to include pcc.h to use the APIs to for peripherals clock. Each
peripheral clock is defined in enum pcc_clk type.
SCG relevants APIs are defined in scg.h which supports clock rate get, PLL/PFD
enablement and settings, and all SCG clock initialization. User need use enum
scg_clk to access each clock source.
In clock.c, we initialize necessary clocks at u-boot s_init and implement the
clock functions used by driver modules to operate clocks dynamically.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Ye Li <ye.li@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Diffstat (limited to 'Makefile')
0 files changed, 0 insertions, 0 deletions