diff options
| author | Simon Glass <sjg@chromium.org> | 2016-06-20 01:43:01 (GMT) |
|---|---|---|
| committer | Tom Rini <trini@konsulko.com> | 2016-07-14 22:33:09 (GMT) |
| commit | 397b5697ad242408979a00dda14138aa1439f52b (patch) | |
| tree | ce92deb6c96587ecf024b22a77aeb6ff8771fa9e /arch/arm/cpu/arm11 | |
| parent | ba169d981f80517f057bf635df7e3dab203b9cea (diff) | |
| download | u-boot-fsl-qoriq-397b5697ad242408979a00dda14138aa1439f52b.tar.xz | |
arm: Move check_cache_range() into a common place
This code is common, so move it into a common file.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Marek Vasut <marex@denx.de>
Diffstat (limited to 'arch/arm/cpu/arm11')
| -rw-r--r-- | arch/arm/cpu/arm11/cpu.c | 17 |
1 files changed, 0 insertions, 17 deletions
diff --git a/arch/arm/cpu/arm11/cpu.c b/arch/arm/cpu/arm11/cpu.c index 1e4c214..7244c2e 100644 --- a/arch/arm/cpu/arm11/cpu.c +++ b/arch/arm/cpu/arm11/cpu.c @@ -69,23 +69,6 @@ void flush_dcache_all(void) asm volatile("mcr p15, 0, %0, c7, c10, 4" : : "r" (0)); } -static int check_cache_range(unsigned long start, unsigned long stop) -{ - int ok = 1; - - if (start & (CONFIG_SYS_CACHELINE_SIZE - 1)) - ok = 0; - - if (stop & (CONFIG_SYS_CACHELINE_SIZE - 1)) - ok = 0; - - if (!ok) - debug("CACHE: Misaligned operation at range [%08lx, %08lx]\n", - start, stop); - - return ok; -} - void invalidate_dcache_range(unsigned long start, unsigned long stop) { if (!check_cache_range(start, stop)) |