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author | Peng Fan <Peng.Fan@freescale.com> | 2015-01-29 10:03:39 (GMT) |
---|---|---|
committer | Tom Rini <trini@ti.com> | 2015-01-30 14:19:17 (GMT) |
commit | 0f274f5376f02ccf30327bf3e5c88d26d3ea8827 (patch) | |
tree | c4782c013f59c7a86490048edfdf32d580ca54ce /arch/arm/cpu/armv7/cpu.c | |
parent | 2d73f0d6cd42a0ed9a791d665ddbd3d3bf287801 (diff) | |
download | u-boot-fsl-qoriq-0f274f5376f02ccf30327bf3e5c88d26d3ea8827.tar.xz |
ARM: armv7 fix spelling of SCTRL
SCTLR is the abbreviation of System Control Register, so we should
use SCTLR but not SCTRL.
Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
Diffstat (limited to 'arch/arm/cpu/armv7/cpu.c')
-rw-r--r-- | arch/arm/cpu/armv7/cpu.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm/cpu/armv7/cpu.c b/arch/arm/cpu/armv7/cpu.c index 01cdb7e..c56417d 100644 --- a/arch/arm/cpu/armv7/cpu.c +++ b/arch/arm/cpu/armv7/cpu.c @@ -53,7 +53,7 @@ int cleanup_before_linux(void) * After D-cache is flushed and before it is disabled there may * be some new valid entries brought into the cache. We are sure * that these lines are not dirty and will not affect our execution. - * (because unwinding the call-stack and setting a bit in CP15 SCTRL + * (because unwinding the call-stack and setting a bit in CP15 SCTLR * is all we did during this. We have not pushed anything on to the * stack. Neither have we affected any static data) * So just invalidate the entire d-cache again to avoid coherency |