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authorYork Sun <york.sun@nxp.com>2016-10-04 21:45:01 (GMT)
committerYork Sun <york.sun@nxp.com>2016-10-06 16:59:10 (GMT)
commitb4b60d06c6f902cdd80236717375d03267dd949a (patch)
tree41a1c6b6c2cae31acbce0f18a92f966c69b4dbe5 /arch/arm/cpu/armv7/ls102xa
parentfb2bf8c2c6c5e80a941987d7c8abcf47c825f942 (diff)
downloadu-boot-fsl-qoriq-b4b60d06c6f902cdd80236717375d03267dd949a.tar.xz
arm: Move MAX_CPUS to Kconfig
Move MAX_CPUS option to Kconfig and clean up existing uses for ARM. This option is used by Freescale Layerscape SoCs. Signed-off-by: York Sun <york.sun@nxp.com> Reviewed-by: Simon Glass <sjg@chromium.org>
Diffstat (limited to 'arch/arm/cpu/armv7/ls102xa')
-rw-r--r--arch/arm/cpu/armv7/ls102xa/Kconfig11
1 files changed, 11 insertions, 0 deletions
diff --git a/arch/arm/cpu/armv7/ls102xa/Kconfig b/arch/arm/cpu/armv7/ls102xa/Kconfig
index 2648416..e8264f5 100644
--- a/arch/arm/cpu/armv7/ls102xa/Kconfig
+++ b/arch/arm/cpu/armv7/ls102xa/Kconfig
@@ -9,6 +9,17 @@ config LS1_DEEP_SLEEP
bool "Deep sleep"
depends on ARCH_LS1021A
+config MAX_CPUS
+ int "Maximum number of CPUs permitted for LS102xA"
+ depends on ARCH_LS1021A
+ default 2
+ help
+ Set this number to the maximum number of possible CPUs in the SoC.
+ SoCs may have multiple clusters with each cluster may have multiple
+ ports. If some ports are reserved but higher ports are used for
+ cores, count the reserved ports. This will allocate enough memory
+ in spin table to properly handle all cores.
+
config SYS_FSL_ERRATUM_A010315
bool "Workaround for PCIe erratum A010315"